[time-nuts] 35601A as stand-in for 11848A ?
SAIDJACK at aol.com
SAIDJACK at aol.com
Sun Jan 6 22:44:30 EST 2008
In a message dated 1/6/2008 14:54:17 Pacific Standard Time,
bruce.griffiths at xtra.co.nz writes:
>Another issue to consider is mixer dc offset and mixer induced phase shift.
>Both of these effects will cause the PLL to lock with the RF and LO
>signals not in exact phase quadrature (unless the correct dc offset is
>used at the PLL input amplifier).
Hi Bruce,
I am pretty sure the Mixers' DC output is near zero when I am in lock, since
it only needs to compensate for the Opamps' offset voltage (very small).
While the PLL is working on lock, the Mixer is slowly "homing-in" on the
lock voltage, and I don't really see that affecting the noise floor at all (the
PLL loop bandwidth is about 1/2Hz, and thus below the analyzers' cut off, so
I am actually seeing measurements before the PLL is fully locked already).
Something else is a bit awry here...
bye,
Said
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