[time-nuts] 20logN was Re: phase noise questions (long)
christophe.huygens at cs.kuleuven.ac.be
Wed Jan 23 15:12:50 EST 2008
Hi John, Steve, et al,
While I am not a phase noise buff at all, in talking to many on this subject
I feel that this is not well understood. When I ask where the 6db/Hz for
doubling or 20logN in general comes from, I very often get an unsatisfying
answer and I have seen strange notes on this mailing list on this
For me to understand what happens in a simplified way 2 things are key:
1. Phase noise is subject to FM theory - you can think of the carrier
being FM modulated with a very low modulation index, with
modulation frequency the offset from the carrier. This is easy
enough to accept for most. The noise phasor sits on top of the carrier.
This give amplitude noise, that can be limited away, and well...
phase noise. The actual modulation index in our case is always
very small I guess, except when you looking real close to the
carrier, but then still - if the oscillator is good, the deviation will
still be small hence low modulation index theory still applies..
2. What happens with an FM signal when applied to an ideal doubler -
this is a bit of a trickier. Say I have a narrowband (low modulation
index) signal of 200Hz, modulated by 20Hz.
a. The spectrum is:
sideband 1 (180) - carrier (200) - sideband 2 (220).
AFTER the doubler the spectrum is:
sideband 1 (380) - carrier (400) - sideband 2 (420).
I have a hard time to find an intuitive explanation for this,
but it only takes 20 lines of octave/matlab code to verify...
I am getting too old (or I m too young) to get into the Bessel
So no need to multiply the offset also by N as sometimes seen.
b. The amplitude of the sidebands does grow with respect to
the carrier (all this for small modulation indexes) by about
6 db. Also easy to show in a a simulation.
The duality of multiplication in the time domain and convolution
in the frequency domain also explains this I think, like it
can explain a.
Maybe somebody on the list can step in and give a clear and
concise explanation for the above.
John Miles wrote:
> Doubling your clock frequency adds 6 dBc/Hz to whatever the noise level was
> at the input, at all offsets within the doubler's bandwidth. Only if the
> input noise level is near or below the multiplier's own residual noise floor
> will the increase be worse than 6 dBc/Hz.
> That will not happen when ordinary crystal oscillators and conventional
> Schottky-diode multipliers are used together; high-performance active
> multipliers are needed only when working with exceptionally clean inputs.
> At input noise levels higher than -155 to -160 dBc/Hz, ordinary diode
> multipliers will not usually contribute any additional noise.
> -- john, KE5FX
>> I followed with some interest a discussion about a NIST doubler circuit
>> using matched FET's and I was wondering if you could get similar results
>> using an analog multiplier chip from Analog Devices. It would seem that
>> they take some care about device matching and have parts that work up
>> to pretty high frequencies. Of course there would need to be some
>> employed. Oh, and I think those parts do pretty well with temperature.
>> Also, when using a doubler that is rated in dBc how do you apply that
>> number to get an expectation from a given starting dBc oscillator. So
>> if my 10 MHz clock is -125dBc and I use the NIST circuit, what would
>> I see at 20 MHz in dBc?
>> thanks in advance,
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