From va2hdd at aei.ca Wed Apr 1 01:18:33 2009 From: va2hdd at aei.ca (Claude Houde) Date: Tue, 31 Mar 2009 21:18:33 -0400 Subject: [time-nuts] Austron 2100F In-Reply-To: <49D2BF8B.3030904@aei.ca> References: <49D2BD5A.9080106@aei.ca> <49D2BF8B.3030904@aei.ca> Message-ID: <49D2C0E9.3020507@aei.ca> Hello ! I'm new to the list and I have been offered an Austron 2100F receiver at a good price. Before jumping in, I have a two questions: * I read that a new version of LORAN may come along soon. Will my old receiver be instantly obsolete as a frequency comparator ? * The receiver is priced reasonably because it needs repair. I diagnosed it as far as I could and found corrosion in the power supply section, but I had to stop as I had no luck finding the manual and schematic, can someone help me ? Thanks for your help ! Claude From cfharris at erols.com Wed Apr 1 01:33:16 2009 From: cfharris at erols.com (Chuck Harris) Date: Tue, 31 Mar 2009 21:33:16 -0400 Subject: [time-nuts] Austron 2100F In-Reply-To: <49D2C0E9.3020507@aei.ca> References: <49D2BD5A.9080106@aei.ca> <49D2BF8B.3030904@aei.ca> <49D2C0E9.3020507@aei.ca> Message-ID: <49D2C45C.6070307@erols.com> Manuals and schematics are available on Brooke's www.prc68.com website. They can be very hard to fix, because there is some really poorly designed logic circuitry, and the signature analysis functions really can't find very many problems. That said, I use a 2100T for my main timing receiver. The F is virtually identical... using the same PC boards, just populated less fully. -Chuck Harris Claude Houde wrote: > Hello ! > > I'm new to the list and I have been offered an Austron 2100F receiver at > a good price. > > Before jumping in, I have a two questions: > > * I read that a new version of LORAN may come along soon. Will my > old receiver be instantly obsolete as a frequency comparator ? > * The receiver is priced reasonably because it needs repair. I > diagnosed it as far as I could and found corrosion in the power supply > section, but I had to stop as I had no luck finding the manual and > schematic, can someone help me ? > > Thanks for your help ! > > Claude > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From stanw1le at verizon.net Wed Apr 1 01:33:47 2009 From: stanw1le at verizon.net (Stan W1LE) Date: Tue, 31 Mar 2009 21:33:47 -0400 Subject: [time-nuts] Austron 2100F In-Reply-To: <49D2C0E9.3020507@aei.ca> References: <49D2BD5A.9080106@aei.ca> <49D2BF8B.3030904@aei.ca> <49D2C0E9.3020507@aei.ca> Message-ID: <49D2C47B.8050308@verizon.net> Hello Claude, Austron 2100F will only be good for the old LORAN-C, not any enhanced e-LORAN. Austron has been long out of business, so I would not expect any field upgrade options. I have not heard of others doing mods to the 2100F, to be fully e-LORAN capable. Brooke has the manual set on a CD. You will be happy with his product. Other commercial, laboratory grade, LORAN-C timing receivers like the Stanford Research Systems model FS700 will not do e-LORAN to the best of my knowledge. The LOCUS brand receivers are a modern RX, but I do not know their e-LORAN capability. Stan, W1LE Cape Cod Claude Houde wrote: > Hello ! > > I'm new to the list and I have been offered an Austron 2100F receiver at > a good price. > > Before jumping in, I have a two questions: > > * I read that a new version of LORAN may come along soon. Will my > old receiver be instantly obsolete as a frequency comparator ? > * The receiver is priced reasonably because it needs repair. I > diagnosed it as far as I could and found corrosion in the power supply > section, but I had to stop as I had no luck finding the manual and > schematic, can someone help me ? > > Thanks for your help ! > > Claude > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From brooke at pacific.net Wed Apr 1 02:35:33 2009 From: brooke at pacific.net (brooke at pacific.net) Date: Tue, 31 Mar 2009 19:35:33 -0700 (PDT) Subject: [time-nuts] Austron 2100F In-Reply-To: <49D2C0E9.3020507@aei.ca> References: <49D2BD5A.9080106@aei.ca> <49D2BF8B.3030904@aei.ca> <49D2C0E9.3020507@aei.ca> Message-ID: <1489.SVVXXVxVQkI=.1238553333.squirrel@webmail.securepacific.net> Hi Claude: For manuals info see: http://www.prc68.com/I/A2100F.shtml#Man and ordering see: http://www.prc68.com/P/Prod.html#Austron The enhanced LORAN-C adds a pulse after the existing group with a variable time delay. All the existing receivers will continue to operate. Part of the new system is using UTC as the basis of the time of transmission for each station. The old way was to operate the transmitters in "chains" where the master station transmitted, then each of the slaves transmitted after a specified delay. Old navigation receivers only worked with a fixed GRI, i.e. only listened to stations in the same chain, since that's the only thing that made sense with a "chain" system. But with the new UTC system ALL the stations you can receive i.e. an "all in view" approach allows for better locations because of more stations. For timing applications you want to only listen to the nearest station. The more distance between you and the transmitter the more variation in the timing. Now since each station is UTC controlled the accuracy of slave stations used for timing should be very good. I think a PIC can be used as an add on to any existing LORAN-C receiver to decode the data packets. Have Fun, Brooke CLarke http://www.PRC68.com > Hello ! > > I'm new to the list and I have been offered an Austron 2100F receiver at > a good price. > > Before jumping in, I have a two questions: > > * I read that a new version of LORAN may come along soon. Will my > old receiver be instantly obsolete as a frequency comparator ? > * The receiver is priced reasonably because it needs repair. I > diagnosed it as far as I could and found corrosion in the power supply > section, but I had to stop as I had no luck finding the manual and > schematic, can someone help me ? > > Thanks for your help ! > > Claude > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From ch at murgatroid.com Wed Apr 1 05:04:12 2009 From: ch at murgatroid.com (christopher hoover) Date: Tue, 31 Mar 2009 22:04:12 -0700 Subject: [time-nuts] Austron 2100F In-Reply-To: References: Message-ID: <49D2F5CC.1060701@murgatroid.com> Chuck Harris wrote: > They can be very hard to fix, because there is some really poorly designed > logic circuitry, and the signature analysis functions really can't find > very many problems. Interesting. Can you say more? I tried to repair mine -- I have a signature analyzer -- but did not ever get it to work. The initial indication was a bad memory chip. I carefully replaced it, but it never came back to life. Maybe that was a red herring. -ch From df6jb at ulrich-bangert.de Wed Apr 1 07:58:06 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Wed, 1 Apr 2009 09:58:06 +0200 Subject: [time-nuts] Prologix In-Reply-To: <49D25BA6.1080407@adobe-labs.com> Message-ID: <9AB666163C5141BD91FF84C4B0D24E17@athlon> Mike, I would like to second Brent's information: That is exactly how it is done. Talking to the Prologix interface and talking to the NI interface is COMPLETELY different in that talking to the Prologix always means straightforward serial communication while talking to the NI involves DLL-calls from the application. The Prologix is cheap and easy to work with, thats why some time nuts use it. The NI interface is on the other hand more expensive and more complex to handle (and yes, it does some things that are not easily done with the Prologix). The biggest advantage of the DLL-calls is: The same application works with whatever NI interface you use: Plug in card, USB devices, ethernet dvices, you name it. All work by the SAME dll calls, so your application is not specific for a interface device. I do not forget to advertise my own solution to GPIB programming named EZGPIB which talks to Prologix (both LAN and USB based) as well to NI interfaces and thanks supporting basic VISA even to GPIB interfaces of other suppliers. It uses an easy to learn PASCAL like script language that your friend might get used to in a snap. Basically, if your friend writes a EZGPIB based script to talk to his counter over the Prologix, you will be able to use the SAME script to talk to your 5335A via a NI interface. Nice feature? EZGPIB has got mentioned in April's 2008 issue of "Test & Measurement World". See the last link on my "About me" page http://www.ulrich-bangert.de/html/about_me.html EZGIPB can be downloaded for free from http://www.ulrich-bangert.de/html/downloads.html Best regards Ulrich, DF6JB > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Brent Gordon > Gesendet: Dienstag, 31. Marz 2009 20:07 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] Prologix > > > Mike Feher wrote: > > A friend has a 5335A counter and bought a Prologix adaptor > for it to > > collect data. He wrote the software and has had extremely good > > results. He offered to do the same for me utilizing my NI > adaptor so I > > could use it for my various counters. Unfortunately he ran into > > problems and feels he needs a special version of basic in order to > > make my $500 NI adaptor work. I admit to my total lack of > programming > > ability. I still use GWBASIC, and only to crunch heavy > numbers. I have > > no idea how to interface any software to communicate with an > > instrument, and, maybe am too old to want to learn as it > seems a lot > > of people do it on a regular basis already. If this becomes too > > difficult I may have to buy a Prologix unit from Abdul. > While I am all > > for doing that, and I bought my NI before Abdul had his > version going, > > I was also under the impression that if the Prologix can do > it the NI > > can do it, but, not necessarily the other way around. My friend > > mentioned API calls, whatever they are. Any suggestions? > Thanks - Mike > > > > > > Mike B. Feher, N4FS > > 89 Arnold Blvd. > > Howell, NJ, 07731 > > 732-886-5960 > > > Mike, > > You should have gotten the NI-488.2 CD with your GPIB card. > On that CD > are the dlls (Dynamic Link Libraries) to talk to the card. > You can use > the dlls in any language that supports dlls or ActiveX. > Sorry to say, > GWBASIC is not one of those languages. Visual Basic 6 works well and > I've even done GPIB data acquisition directly into Excel using VBA > (Visual Basic for Applications, Excel's macro language). VBA > is part of > Excel. Alternatively, you can get a free Visual Basic Express at > http://www.microsoft.com/express/vb/ I haven't tried VB > Express, but I > think it will work. Normally, I do all my GPIB programming > in LabVIEW. > > Brent > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From nils at stiebeleltronasia.com Wed Apr 1 07:54:36 2009 From: nils at stiebeleltronasia.com (Nils Palm) Date: Wed, 1 Apr 2009 14:54:36 +0700 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay Message-ID: <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> Dear All, I am a new in this field and need some advice. For the adjustment of our quarz clocks we need a reference. I came across some cheap offers on ebay for a EFRATOM / DATUM LPRO Rubidium oscillator http://cgi.ebay.de/ws/eBayISAPI.dll?ViewItem&item=180338976648QQssPageNameZMERC_VI_RCRX_Pr4_PcY_BIN_Stores_IT&refitem=180340823127&itemcount=4&refwidgetloc=active_view_item&usedrule1=CrossSell_LogicX&refwidgettype=cross_promot_widget&_trksid=p284.m184&_trkparms=algo%3DCRX%26its%3DS%252BI%252BSS%26itu%3DISS%252BUCI%252BSI%26otn%3D4 Now I was wondering what about these oscillators. Why are they offered so cheap and so many. What have they be used for ? Also I cannot find any information about the manufacturer on the internet. Are they out of business ? Would such a oscillator be usefull for us, as we need a 10Mhz signal with about 1e-8 precision. Thanks a lot ! nils From sar10538 at gmail.com Wed Apr 1 09:56:55 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Wed, 1 Apr 2009 22:56:55 +1300 Subject: [time-nuts] Prologix In-Reply-To: <9AB666163C5141BD91FF84C4B0D24E17@athlon> References: <49D25BA6.1080407@adobe-labs.com> <9AB666163C5141BD91FF84C4B0D24E17@athlon> Message-ID: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> This man said the P word without any form of apology :-) 73 2009/4/1 Ulrich Bangert : > Mike, > > I would like to second Brent's information: That is exactly how it is done. > Talking to the Prologix interface and talking to the NI interface is > COMPLETELY different in that talking to the Prologix always means > straightforward serial communication while talking to the NI involves > DLL-calls from the application. > > The Prologix is cheap and easy to work with, thats why some time nuts use > it. The NI interface is on the other hand more expensive and more complex to > handle (and yes, it does some things that are not easily done with the > Prologix). The biggest advantage of the DLL-calls is: The same application > works with whatever NI interface you use: Plug in card, USB devices, > ethernet dvices, you name it. All work by the SAME dll calls, so your > application is not specific for a interface device. > > I do not forget to advertise my own solution to GPIB programming named > EZGPIB which talks to Prologix (both LAN and USB based) as well to NI > interfaces and thanks supporting basic VISA even to GPIB interfaces of other > suppliers. > > It uses an easy to learn PASCAL like script language that your friend might > get used to in a snap. Basically, if your friend writes a EZGPIB based > script to talk to his counter over the Prologix, you will be able to use the > SAME script to talk to your 5335A via a NI interface. Nice feature? EZGPIB > has got mentioned in April's 2008 issue of "Test & Measurement World". See > the last link on my "About me" page > > http://www.ulrich-bangert.de/html/about_me.html > > EZGIPB can be downloaded for free from > > http://www.ulrich-bangert.de/html/downloads.html > > Best regards > Ulrich, DF6JB > >> -----Ursprungliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Brent Gordon >> Gesendet: Dienstag, 31. Marz 2009 20:07 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] Prologix >> >> >> Mike Feher wrote: >> > A friend has a 5335A counter and bought a Prologix adaptor >> for it to >> > collect data. He wrote the software and has had extremely good >> > results. He offered to do the same for me utilizing my NI >> adaptor so I >> > could use it for my various counters. Unfortunately he ran into >> > problems and feels he needs a special version of basic in order to >> > make my $500 NI adaptor work. I admit to my total lack of >> programming >> > ability. I still use GWBASIC, and only to crunch heavy >> numbers. I have >> > no idea how to interface any software to communicate with an >> > instrument, and, maybe am too old to want to learn as it >> seems a lot >> > of people do it on a regular basis already. If this becomes too >> > difficult I may have to buy a Prologix unit from Abdul. >> While I am all >> > for doing that, and I bought my NI before Abdul had his >> version going, >> > I was also under the impression that if the Prologix can do >> it the NI >> > can do it, but, not necessarily the other way around. My friend >> > mentioned API calls, whatever they are. Any suggestions? >> Thanks - Mike >> > >> > >> > Mike B. Feher, N4FS >> > 89 Arnold Blvd. >> > Howell, NJ, 07731 >> > 732-886-5960 >> > >> Mike, >> >> You should have gotten the NI-488.2 CD with your GPIB card. >> On that CD >> are the dlls (Dynamic Link Libraries) to talk to the card. >> You can use >> the dlls in any language that supports dlls or ActiveX. >> Sorry to say, >> GWBASIC is not one of those languages. ?Visual Basic 6 works well and >> I've even done GPIB data acquisition directly into Excel using VBA >> (Visual Basic for Applications, Excel's macro language). ?VBA >> is part of >> Excel. ?Alternatively, you can get a free Visual Basic Express at >> http://www.microsoft.com/express/vb/ ?I haven't tried VB >> Express, but I >> think it will work. ?Normally, I do all my GPIB programming >> in LabVIEW. >> >> Brent >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet From hmurray at megapathdsl.net Wed Apr 1 10:13:11 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Wed, 01 Apr 2009 03:13:11 -0700 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay In-Reply-To: Message from "Nils Palm" of "Wed, 01 Apr 2009 14:54:36 +0700." <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> Message-ID: <20090401101312.C8087BCDF@ip-64-139-1-69.sjc.megapath.net> > Now I was wondering what about these oscillators. Why are they offered > so cheap and so many. What have they be used for ? I think they are recycled from phone or cell phone upgrades. > Also I cannot find any information about the manufacturer on the > internet. Are they out of business ? Symmetricom has gobbled up most of the alternative sources. The data sheet is readily available. > Would such a oscillator be usefull for us, as we need a 10Mhz signal > with about 1e-8 precision. Probably. Do you have any way to sanity check it? The spec sheet says aging is <1E-9 over 10 years and it's within 5E-11 at shipment. The C-field adjustment covers +/- 1.5E-9. (Specs are from a 2003 sheet. Older units are probably a bit less good.) -- These are my opinions, not necessarily my employer's. I hate spam. From namichie at gmail.com Wed Apr 1 10:14:08 2009 From: namichie at gmail.com (Neville Michie) Date: Wed, 1 Apr 2009 21:14:08 +1100 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay In-Reply-To: <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> References: <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> Message-ID: Hi, The LPRO 101 was used in cell phone systems to provide a stand-by frequency source when the GPS was unavailable. As systems are made obsolete large numbers of units are being recycled through the amateur world. They are cheap because there are more LPRO units than time-nuts and so are in excess supply. This situation may not last forever. The spec. sheet and manual is widely available, try http://www.tenmhz.com/LPRO.htm The unit is compact, requires only a small power supply, and is very stable. Cheers, Neville Michie On 01/04/2009, at 6:54 PM, Nils Palm wrote: > Dear All, > > I am a new in this field and need some advice. > For the adjustment of our quarz clocks we need a reference. > I came across some cheap offers on ebay for a > > EFRATOM / DATUM LPRO Rubidium oscillator > > http://cgi.ebay.de/ws/eBayISAPI.dll? > ViewItem&item=180338976648QQssPageNameZMERC_VI_RCRX_Pr4_PcY_BIN_Stores > _IT&refitem=180340823127&itemcount=4&refwidgetloc=active_view_item&use > drule1=CrossSell_LogicX&refwidgettype=cross_promot_widget&_trksid=p284 > .m184&_trkparms=algo%3DCRX%26its%3DS%252BI%252BSS%26itu%3DISS% > 252BUCI%252BSI%26otn%3D4 > > Now I was wondering what about these oscillators. > Why are they offered so cheap and so many. What have > they be used for ? > Also I cannot find any information about the manufacturer > on the internet. Are they out of business ? > > Would such a oscillator be usefull for us, as we need > a 10Mhz signal with about 1e-8 precision. > > Thanks a lot ! > > nils > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/ > time-nuts > and follow the instructions there. From nospam at oceanfree.net Wed Apr 1 10:38:05 2009 From: nospam at oceanfree.net (Eamon Skelton) Date: Wed, 01 Apr 2009 11:38:05 +0100 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay In-Reply-To: <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> References: <003101c9b2a7$e3e50750$2f00a8c0@stiebeleltronasia.com> Message-ID: <49D3440D.20304@oceanfree.net> > Now I was wondering what about these oscillators. > Why are they offered so cheap and so many. What have > they be used for ? These are from used equipment so they can't be expected to last as long as a new unit. They are probably from surplus telecomms equipment. > Also I cannot find any information about the manufacturer > on the internet. Are they out of business ? Datum were taken over by Symmetricom. http://www.symmetricom.com/ > Would such a oscillator be usefull for us, as we need > a 10Mhz signal with about 1e-8 precision. > > Thanks a lot ! > > nils The LPRO-101 sounds like the ideal candidate for this job. From memory, I think the long term stability spec is 1e-9/10 years, 5e-11/month. I have had very good service from this seller: http://myworld.ebay.de/fluke.l/ Friendly helpful and reliable. Very quick shipping from China by EMS. I'm not connected to this seller in any way, just another happy customer. A GPSDO is another cost effective solution that would easily meet your requirements. The Trimble Thunderbolt is widely available on eBay. You should also check out the CW12-TIM module from Navsync. Ed. -- Linux 2.6.26 From cfharris at erols.com Wed Apr 1 11:47:19 2009 From: cfharris at erols.com (Chuck Harris) Date: Wed, 01 Apr 2009 07:47:19 -0400 Subject: [time-nuts] Austron 2100F In-Reply-To: <49D2F5CC.1060701@murgatroid.com> References: <49D2F5CC.1060701@murgatroid.com> Message-ID: <49D35447.9060005@erols.com> You're asking me if I can say more? Most wish they could get me to shut up;-) The design for the receiver of the 2100T/F is a mishmash of synchronous and asynchronous logic. They mixed logic families in an apparent attempt to battle a few timing problems. On one board, there is 7400, 74LS, 74L, 74C, 25LS, and 74HC all at the same time, and all in the same signal path! Following the trend of the time, they used signature analysis to aid in troubleshooting... only they didn't try very hard. The signatures are fine for working out problems with the CPU, and IO section, but they do nothing for most of the logic in the receiver. And signature is unable to do anything for timing problems. So, how do you find a thermally related timing problem? I had two 2100F's one was rock solid, and one was rock solid, as long as my rack stayed below 75F. Summertime would hit, and the receiver would lock, run for about 2 hours, and then it would be unlocked. I swapped boards between the two receivers until I determined that it was without doubt the Acquire/Track board. Wherever that board was, the receiver in question would fail when it got warm. The Acquire/Track board is where they divide down the reference oscillator to form a mask of the loran signal. The mask is matched to the signal, and the divider is adjusted by adding, or subtracting counts, to track the loran signal. I checked every trace on that board, tested every chip for logical function, and ultimately replaced every part on that board with new, and it still had a thermal problem. I tried to concoct a method of even sensing the problem, but the very slow nature of the problem (due to the slow changes between the reference and the loran signal when you were within the range that the receiver could tolerate) defied my attempts. If your design needs 7400, 74LS, 74L, 74HC, 74C, and 25LS all in the same counter/comparator to work, you have botched the design! Although the manual is silent on the fact, I am pretty sure that they had to spec the parts on this circuit down to the manufacturer and lot number to come up with a set of parts that had all of the timing and threshold problems settled so that the board could work. I ultimately concluded that the use of 7400, 74L, and 74LS with its TTL (1.3V) threshold levels was only marginally compatible with the 74C and 74HC with their CMOS (2.5V) threshold levels, and could only work at lower temperatures. Bah! -Chuck Harris christopher hoover wrote: > Chuck Harris wrote: > >> They can be very hard to fix, because there is some really poorly designed >> logic circuitry, and the signature analysis functions really can't find >> very many problems. > > Interesting. Can you say more? > > I tried to repair mine -- I have a signature analyzer -- but did not ever get it to work. The initial indication was a bad memory chip. I carefully replaced it, but it never came back to life. Maybe that was a red herring. > > -ch > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From cfharris at erols.com Wed Apr 1 11:54:42 2009 From: cfharris at erols.com (Chuck Harris) Date: Wed, 01 Apr 2009 07:54:42 -0400 Subject: [time-nuts] Prologix In-Reply-To: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> References: <49D25BA6.1080407@adobe-labs.com> <9AB666163C5141BD91FF84C4B0D24E17@athlon> <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> Message-ID: <49D35602.4010601@erols.com> Steve Rooke wrote: > This man said the P word without any form of apology :-) I know, and I am still shaking from the thought of it! Anybody got a wooden stake? -Chuck Harris >> >> It uses an easy to learn PASCAL like script language that your friend might From robert8rpi at yahoo.co.uk Wed Apr 1 12:47:18 2009 From: robert8rpi at yahoo.co.uk (Robert Atkinson) Date: Wed, 1 Apr 2009 12:47:18 +0000 (GMT) Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay Message-ID: <882814.25081.qm@web27104.mail.ukl.yahoo.com> I notice that this seller is using TVB's plots on his listing. This is a bit naughty. Did he ask you Tom? Robert G8RPI. --- On Wed, 1/4/09, Eamon Skelton wrote: > From: Eamon Skelton > Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay > To: "Nils Palm" , "Discussion of precise time and frequency measurement" > Date: Wednesday, 1 April, 2009, 11:38 AM > > > Now I was wondering what about these oscillators. > > Why are they offered so cheap and so many. What have > > they be used for ? > > These are from used equipment so they can't be expected > to last as long as a new unit. They are probably from > surplus telecomms equipment. > > > Also I cannot find any information about the > manufacturer > > on the internet. Are they out of business ? > > Datum were taken over by Symmetricom. > http://www.symmetricom.com/ > > > Would such a oscillator be usefull for us, as we need > > a 10Mhz signal with about 1e-8 precision. > > > > Thanks a lot ! > > > > nils > > The LPRO-101 sounds like the ideal candidate for this > job. From memory, I think the long term stability spec > is 1e-9/10 years, 5e-11/month. > > I have had very good service from this seller: > http://myworld.ebay.de/fluke.l/ > Friendly helpful and reliable. Very quick shipping from > China by EMS. I'm not connected to this seller in any > way, just another happy customer. > > A GPSDO is another cost effective solution that > would easily meet your requirements. The Trimble > Thunderbolt is widely available on eBay. You > should also check out the CW12-TIM module from > Navsync. > > Ed. > > -- > Linux 2.6.26 > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From df6jb at ulrich-bangert.de Wed Apr 1 12:48:57 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Wed, 1 Apr 2009 14:48:57 +0200 Subject: [time-nuts] P word in my mails In-Reply-To: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> Message-ID: Steve, after I read your mail I have been completely perplexed because I could by no stretch of imagination detect where you had found the aforesaid P word in my mail. It needed the help of some English speaking friends and a search in my last mails to find out that I have (possibly over a range of more than 30 years) used an American 5 letter word in another sense than most/all of you seem to interprete it. I HAVE seen the aforesaid word on some doors during my visits to he United States and I HAVE understood the meaning of the word in this context. But I swear that I have not been aware of the fact that the aforesaid word is used EXCLUSIVELY for the location behind these doors. If I had been aware of that I would have never used this word in a conversation because that is simply not my style. Instead, I have been believing (and I swear this is the truth) that the aforesaid word is used by a gentlemen to address a group of other gentlemen just as a "Hi folks" among noble people but avoiding the highly offical salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". Clearly this is a mistake of mine that I cannot other than to apologize for! If anyone of you has felt offended or in any other way been affected by my wrong use of this word: Sorry for that, that was NOT my intention in using this term. I have started a lot of my posts to this group with this word because of the high s/n ratio to be found here and the extremely well educated people in the group that I hold in high regard. Someone should have told me before! If you find this word in one of my earlier posts substitute it with "Gentlemen" because that is what was ment. Thank you Steve for pointing at that. If you had not done it I would propably have used the word in a wrong sense for the rest of my life. Best regards Ulrich Bangert > -----Urspr?ngliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke > Gesendet: Mittwoch, 1. April 2009 11:57 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] Prologix > > > This man said the P word without any form of apology :-) > > 73 > > 2009/4/1 Ulrich Bangert : > > Mike, > > > > I would like to second Brent's information: That is exactly > how it is > > done. Talking to the Prologix interface and talking to the NI > > interface is COMPLETELY different in that talking to the Prologix > > always means straightforward serial communication while > talking to the > > NI involves DLL-calls from the application. > > > > The Prologix is cheap and easy to work with, thats why some > time nuts > > use it. The NI interface is on the other hand more > expensive and more > > complex to handle (and yes, it does some things that are not easily > > done with the Prologix). The biggest advantage of the DLL-calls is: > > The same application works with whatever NI interface you > use: Plug in > > card, USB devices, ethernet dvices, you name it. All work > by the SAME > > dll calls, so your application is not specific for a > interface device. > > > > I do not forget to advertise my own solution to GPIB > programming named > > EZGPIB which talks to Prologix (both LAN and USB based) as > well to NI > > interfaces and thanks supporting basic VISA even to GPIB > interfaces of > > other suppliers. > > > > It uses an easy to learn PASCAL like script language that > your friend > > might get used to in a snap. Basically, if your friend > writes a EZGPIB > > based script to talk to his counter over the Prologix, you will be > > able to use the SAME script to talk to your 5335A via a NI > interface. > > Nice feature? EZGPIB has got mentioned in April's 2008 > issue of "Test > > & Measurement World". See the last link on my "About me" page > > > > http://www.ulrich-bangert.de/html/about_me.html > > > > EZGIPB can be downloaded for free from > > > > http://www.ulrich-bangert.de/html/downloads.html > > > > Best regards > > Ulrich, DF6JB > > > >> -----Ursprungliche Nachricht----- > >> Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] > >> Im Auftrag von Brent Gordon > >> Gesendet: Dienstag, 31. Marz 2009 20:07 > >> An: Discussion of precise time and frequency measurement > >> Betreff: Re: [time-nuts] Prologix > >> > >> > >> Mike Feher wrote: > >> > A friend has a 5335A counter and bought a Prologix adaptor > >> for it to > >> > collect data. He wrote the software and has had extremely good > >> > results. He offered to do the same for me utilizing my NI > >> adaptor so I > >> > could use it for my various counters. Unfortunately he ran into > >> > problems and feels he needs a special version of basic > in order to > >> > make my $500 NI adaptor work. I admit to my total lack of > >> programming > >> > ability. I still use GWBASIC, and only to crunch heavy > >> numbers. I have > >> > no idea how to interface any software to communicate with an > >> > instrument, and, maybe am too old to want to learn as it > >> seems a lot > >> > of people do it on a regular basis already. If this becomes too > >> > difficult I may have to buy a Prologix unit from Abdul. > >> While I am all > >> > for doing that, and I bought my NI before Abdul had his > >> version going, > >> > I was also under the impression that if the Prologix can do > >> it the NI > >> > can do it, but, not necessarily the other way around. My friend > >> > mentioned API calls, whatever they are. Any suggestions? > >> Thanks - Mike > >> > > >> > > >> > Mike B. Feher, N4FS > >> > 89 Arnold Blvd. > >> > Howell, NJ, 07731 > >> > 732-886-5960 > >> > > >> Mike, > >> > >> You should have gotten the NI-488.2 CD with your GPIB > card. On that > >> CD are the dlls (Dynamic Link Libraries) to talk to the card. > >> You can use > >> the dlls in any language that supports dlls or ActiveX. > >> Sorry to say, > >> GWBASIC is not one of those languages. ?Visual Basic 6 > works well and > >> I've even done GPIB data acquisition directly into Excel using VBA > >> (Visual Basic for Applications, Excel's macro language). ?VBA > >> is part of > >> Excel. ?Alternatively, you can get a free Visual Basic Express at > >> http://www.microsoft.com/express/vb/ ?I haven't tried VB > >> Express, but I > >> think it will work. ?Normally, I do all my GPIB programming > >> in LabVIEW. > >> > >> Brent > >> > >> _______________________________________________ > >> time-nuts mailing list -- time-nuts at febo.com > >> To unsubscribe, go to > >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. > > > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > -- > Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW > Omnium finis imminet > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From aa8k at comcast.net Wed Apr 1 13:04:37 2009 From: aa8k at comcast.net (Mike Naruta AA8K) Date: Wed, 01 Apr 2009 09:04:37 -0400 Subject: [time-nuts] P word in my mails In-Reply-To: References: Message-ID: <49D36665.3020003@comcast.net> Not to worry Ulrich, he was using a form of derisive humor. He was insulting Prologix as undesirable. It would be similar to referring to Microsoft as the M-word. Mike - AA8K Ulrich Bangert wrote: > Steve, > > after I read your mail I have been completely perplexed because I could by > no stretch of imagination detect where you had found the aforesaid P word in > my mail. It needed the help of some English speaking friends and a search in > my last mails to find out that I have (possibly over a range of more than 30 > years) used an American 5 letter word in another sense than most/all of you > seem to interprete it. > > I HAVE seen the aforesaid word on some doors during my visits to he United > States and I HAVE understood the meaning of the word in this context. But I > swear that I have not been aware of the fact that the aforesaid word is used > EXCLUSIVELY for the location behind these doors. If I had been aware of that > I would have never used this word in a conversation because that is simply > not my style. > > Instead, I have been believing (and I swear this is the truth) that the > aforesaid word is used by a gentlemen to address a group of other gentlemen > just as a "Hi folks" among noble people but avoiding the highly offical > salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". > > Clearly this is a mistake of mine that I cannot other than to apologize for! > If anyone of you has felt offended or in any other way been affected by my > wrong use of this word: Sorry for that, that was NOT my intention in using > this term. I have started a lot of my posts to this group with this word > because of the high s/n ratio to be found here and the extremely well > educated people in the group that I hold in high regard. > > Someone should have told me before! If you find this word in one of my > earlier posts substitute it with "Gentlemen" because that is what was ment. > > Thank you Steve for pointing at that. If you had not done it I would > propably have used the word in a wrong sense for the rest of my life. > > Best regards > Ulrich Bangert > > >> -----Urspr?ngliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >> Gesendet: Mittwoch, 1. April 2009 11:57 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] Prologix >> >> >> This man said the P word without any form of apology :-) >> >> 73 >> From cfharris at erols.com Wed Apr 1 13:11:56 2009 From: cfharris at erols.com (Chuck Harris) Date: Wed, 01 Apr 2009 09:11:56 -0400 Subject: [time-nuts] P word in my mails In-Reply-To: <49D36665.3020003@comcast.net> References: <49D36665.3020003@comcast.net> Message-ID: <49D3681C.4090203@erols.com> Mike Naruta AA8K wrote: > Not to worry Ulrich, he was using a form > of derisive humor. He was insulting Prologix > as undesirable. Surely, you jest! He was complaining about PASCAL. A really bad word among those forced to use it. -Chuck Harris From jra at febo.com Wed Apr 1 13:12:24 2009 From: jra at febo.com (John Ackermann N8UR) Date: Wed, 01 Apr 2009 09:12:24 -0400 Subject: [time-nuts] P word in my mails In-Reply-To: <49D36665.3020003@comcast.net> References: <49D36665.3020003@comcast.net> Message-ID: <49D36838.2090701@febo.com> Gee, and I thought he was talking about Pascal. :-) John ---- Mike Naruta AA8K wrote: > Not to worry Ulrich, he was using a form > of derisive humor. He was insulting Prologix > as undesirable. > > It would be similar to referring to Microsoft > as the M-word. > > > Mike - AA8K > > > Ulrich Bangert wrote: >> Steve, >> >> after I read your mail I have been completely perplexed because I could by >> no stretch of imagination detect where you had found the aforesaid P word in >> my mail. It needed the help of some English speaking friends and a search in >> my last mails to find out that I have (possibly over a range of more than 30 >> years) used an American 5 letter word in another sense than most/all of you >> seem to interprete it. >> >> I HAVE seen the aforesaid word on some doors during my visits to he United >> States and I HAVE understood the meaning of the word in this context. But I >> swear that I have not been aware of the fact that the aforesaid word is used >> EXCLUSIVELY for the location behind these doors. If I had been aware of that >> I would have never used this word in a conversation because that is simply >> not my style. >> >> Instead, I have been believing (and I swear this is the truth) that the >> aforesaid word is used by a gentlemen to address a group of other gentlemen >> just as a "Hi folks" among noble people but avoiding the highly offical >> salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". >> >> Clearly this is a mistake of mine that I cannot other than to apologize for! >> If anyone of you has felt offended or in any other way been affected by my >> wrong use of this word: Sorry for that, that was NOT my intention in using >> this term. I have started a lot of my posts to this group with this word >> because of the high s/n ratio to be found here and the extremely well >> educated people in the group that I hold in high regard. >> >> Someone should have told me before! If you find this word in one of my >> earlier posts substitute it with "Gentlemen" because that is what was ment. >> >> Thank you Steve for pointing at that. If you had not done it I would >> propably have used the word in a wrong sense for the rest of my life. >> >> Best regards >> Ulrich Bangert >> >> >>> -----Urspr?ngliche Nachricht----- >>> Von: time-nuts-bounces at febo.com >>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >>> Gesendet: Mittwoch, 1. April 2009 11:57 >>> An: Discussion of precise time and frequency measurement >>> Betreff: Re: [time-nuts] Prologix >>> >>> >>> This man said the P word without any form of apology :-) >>> >>> 73 >>> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From aa8k at comcast.net Wed Apr 1 13:33:31 2009 From: aa8k at comcast.net (Mike Naruta AA8K) Date: Wed, 01 Apr 2009 09:33:31 -0400 Subject: [time-nuts] P word in my mails In-Reply-To: <49D3681C.4090203@erols.com> References: <49D36665.3020003@comcast.net> <49D3681C.4090203@erols.com> Message-ID: <49D36D2B.7040203@comcast.net> Opps, my bad. :) Chuck Harris wrote: > Mike Naruta AA8K wrote: >> Not to worry Ulrich, he was using a form >> of derisive humor. He was insulting Prologix >> as undesirable. > > Surely, you jest! > > He was complaining about PASCAL. A really bad word > among those forced to use it. > > -Chuck Harris > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From tvb at LeapSecond.com Wed Apr 1 13:35:50 2009 From: tvb at LeapSecond.com (Tom Van Baak) Date: Wed, 1 Apr 2009 06:35:50 -0700 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay References: <882814.25081.qm@web27104.mail.ukl.yahoo.com> Message-ID: <2D64D5541A3447929D857A0E6B07822A@pc52> > I notice that this seller is using TVB's plots on his listing. This is a bit naughty. Did he ask you Tom? No, he didn't ask. I was a little surprised too. /tvb From df6jb at ulrich-bangert.de Wed Apr 1 14:03:30 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Wed, 1 Apr 2009 16:03:30 +0200 Subject: [time-nuts] P word in my mails In-Reply-To: <49D36838.2090701@febo.com> Message-ID: <553B2985563B4D679777EBF4F9023ADF@athlon> Gentlemen, > Gee, and I thought he was talking about Pascal. :-) > > John > ---- Pascal = P word ??? I am a professional programmer and regulary program in a number of different languages among them Pascal, the language that comes after "B" and assembler for some microcontroller families. I have been thinking that among professionals the question which is the better programming language is as modern as the last centuries 80th. But if a reheated discussion is necessary, here is something that I can lough about: ------------------------------------------------------------------------ Unix/Linux an elaborate April Fools prank - Ben Dover 30-May-07 09:52:22 FOR IMMEDIATE RELEASE In an announcement that has stunned the computer industry, Ken Thompson, Dennis Ritchie and Brian Kernighan admitted that the Unix operating system and C programming language created by them is an elaborate April Fools prank kept alive for over 20 years. Speaking at the recent UnixWorld Software Development Forum, Thompson revealed the following: In 1969, AT&T had just terminated their work with the GE/AT&T Multics project. Brian and I had just started working with an early release of Pascal from Professor Nichlaus Wirth's ETH labs in Switzerland and we were impressed with its elegant simplicity and power. Dennis had just finished reading Bored of the Rings, a hilarious National Lampoon parody of the great Tolkien Lord of the Rings trilogy. As a lark, we decided to do parodies of the Multics environment and Pascal. Dennis and I were responsible for the operating environment. We looked at Multics and designed the new system to be as complex and cryptic as possible to maximize casual users' frustration levels, calling it Unix as a parody of Multics, as well as other more risque allusions. Then Dennis and Brian worked on a truly warped version of Pascal, called "A." When we found others were actually trying to create real programs with A, we quickly added additional cryptic features and evolved into B, BCPL and finally C. We stopped when we got a clean compile on the following syntax: for(;P("\n"),R=;P("|"))for(e=C;e=P("_"+(*u++/8)%2))P("|"+(*u/4)%2); To think that modern programmers would try to use a language that allowed such a statement was beyond our comprehension! We actually thought of selling this to the Soviets to set their computer science progress back 20 or more years. Imagine our surprise when AT&T and other US corporations actually began trying to use Unix and C! It has taken them 20 years to develop enough expertise to generate even marginally useful applications using this 1960's technological parody, but we are impressed with the tenacity (if not common sense) of the general Unix and C programmer. In any event, Brian, Dennis and I have been working exclusively in Pascal on the Apple Macintosh for the past few years and feel really guilty about the chaos, confusion and truly bad programming that has resulted from our silly prank so long ago. Major Unix and C vendors and customers, including AT&T, Microsoft, Hewlett-Packard, GTE, NCR, and DEC have refused comment at this time. Borland International, a leading vendor of Pascal and C tools, including the popular Turbo Pascal, Turbo C and Turbo C++, stated they had suspected this for a number of years and would continue to enhance their Pascal products and halt further efforts to develop C. An IBM spokesman broke into uncontrolled laughter and had to postpone a hastely convened news conference concerning the fate of the RS-6000, merely stating "VM will be available Real Soon Now." In a cryptic statement, Professor Wirth of the ETH institute and father of the Pascal, Modula 2 and Oberon structured languages, merely stated that P. T. Barnum was correct. ---------------------------------------------------------------------------- Best regards Ulrich Bangert > -----Urspr?ngliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von John Ackermann N8UR > Gesendet: Mittwoch, 1. April 2009 15:12 > An: aa8k at comcast.net; Discussion of precise time and > frequency measurement > Betreff: Re: [time-nuts] P word in my mails > > > Gee, and I thought he was talking about Pascal. :-) > > John > ---- > > Mike Naruta AA8K wrote: > > Not to worry Ulrich, he was using a form > > of derisive humor. He was insulting Prologix > > as undesirable. > > > > It would be similar to referring to Microsoft > > as the M-word. > > > > > > Mike - AA8K > > > > > > Ulrich Bangert wrote: > >> Steve, > >> > >> after I read your mail I have been completely perplexed because I > >> could by no stretch of imagination detect where you had found the > >> aforesaid P word in my mail. It needed the help of some English > >> speaking friends and a search in my last mails to find out that I > >> have (possibly over a range of more than 30 > >> years) used an American 5 letter word in another sense > than most/all of you > >> seem to interprete it. > >> > >> I HAVE seen the aforesaid word on some doors during my > visits to he > >> United States and I HAVE understood the meaning of the > word in this > >> context. But I swear that I have not been aware of the > fact that the > >> aforesaid word is used EXCLUSIVELY for the location behind these > >> doors. If I had been aware of that I would have never used > this word > >> in a conversation because that is simply not my style. > >> > >> Instead, I have been believing (and I swear this is the > truth) that > >> the aforesaid word is used by a gentlemen to address a > group of other > >> gentlemen just as a "Hi folks" among noble people but avoiding the > >> highly offical salutation "Gentlemen", in a sense a > laid-back use of > >> "Gentlemen". > >> > >> Clearly this is a mistake of mine that I cannot other than to > >> apologize for! If anyone of you has felt offended or in > any other way > >> been affected by my wrong use of this word: Sorry for > that, that was > >> NOT my intention in using this term. I have started a lot > of my posts > >> to this group with this word because of the high s/n ratio to be > >> found here and the extremely well educated people in the > group that I > >> hold in high regard. > >> > >> Someone should have told me before! If you find this word > in one of > >> my earlier posts substitute it with "Gentlemen" because > that is what > >> was ment. > >> > >> Thank you Steve for pointing at that. If you had not done > it I would > >> propably have used the word in a wrong sense for the rest > of my life. > >> > >> Best regards > >> Ulrich Bangert > >> > >> > >>> -----Urspr?ngliche Nachricht----- > >>> Von: time-nuts-bounces at febo.com > >>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke > >>> Gesendet: Mittwoch, 1. April 2009 11:57 > >>> An: Discussion of precise time and frequency measurement > >>> Betreff: Re: [time-nuts] Prologix > >>> > >>> > >>> This man said the P word without any form of apology :-) > >>> > >>> 73 > >>> > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From stanley_reynolds at yahoo.com Wed Apr 1 14:11:24 2009 From: stanley_reynolds at yahoo.com (Stanley Reynolds) Date: Wed, 1 Apr 2009 07:11:24 -0700 (PDT) Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay In-Reply-To: <2D64D5541A3447929D857A0E6B07822A@pc52> References: <882814.25081.qm@web27104.mail.ukl.yahoo.com> <2D64D5541A3447929D857A0E6B07822A@pc52> Message-ID: <952068.14969.qm@web30308.mail.mud.yahoo.com> I have had mixed results with ebay, this seller has always been helpful and willing to make things right. But you should remember with used items reliability will be less than new and this makes ebay a poor choice where time is important. You should be able to evaluate any purchase as soon as possible. I have been able to play with many items that I would never be able to see at new prices, but my use is as a hobby and repair opportunities are fun and not a crisis. Stanley ----- Original Message ---- From: Tom Van Baak To: Discussion of precise time and frequency measurement Sent: Wednesday, April 1, 2009 8:35:50 AM Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay > I notice that this seller is using TVB's plots on his listing. This is a bit naughty. Did he ask you Tom? No, he didn't ask. I was a little surprised too. /tvb _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From stanley_reynolds at yahoo.com Wed Apr 1 14:12:35 2009 From: stanley_reynolds at yahoo.com (Stanley Reynolds) Date: Wed, 1 Apr 2009 07:12:35 -0700 (PDT) Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay Message-ID: <930919.35362.qm@web30302.mail.mud.yahoo.com> ----- Forwarded Message ---- From: Stanley Reynolds To: Tom Van Baak ; Discussion of precise time and frequency measurement Sent: Wednesday, April 1, 2009 9:11:24 AM Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay I have had mixed results with ebay, this seller has always been helpful and willing to make things right. But you should remember with used items reliability will be less than new and this makes ebay a poor choice where time is important. You should be able to evaluate any purchase as soon as possible. I have been able to play with many items that I would never be able to see at new prices, but my use is as a hobby and repair opportunities are fun and not a crisis. Stanley ----- Original Message ---- From: Tom Van Baak To: Discussion of precise time and frequency measurement Sent: Wednesday, April 1, 2009 8:35:50 AM Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay > I notice that this seller is using TVB's plots on his listing. This is a bit naughty. Did he ask you Tom? No, he didn't ask. I was a little surprised too. /tvb _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From jra at febo.com Wed Apr 1 14:40:09 2009 From: jra at febo.com (John Ackermann N8UR) Date: Wed, 01 Apr 2009 10:40:09 -0400 Subject: [time-nuts] P word in my mails In-Reply-To: <553B2985563B4D679777EBF4F9023ADF@athlon> References: <553B2985563B4D679777EBF4F9023ADF@athlon> Message-ID: <49D37CC9.4030708@febo.com> Sorry, Ulrich -- just a joke! I actually wrote a lot of code in Turbo Pascal back in the 80s, and liked it a lot. (I know that Wirth et al never viewed the TP extensions to Pascal as valid, but they sure made it more useful.) John ---- Ulrich Bangert wrote: > Gentlemen, > >> Gee, and I thought he was talking about Pascal. :-) >> >> John >> ---- > > Pascal = P word ??? I am a professional programmer and regulary program in a > number of different languages among them Pascal, the language that comes > after "B" and assembler for some microcontroller families. I have been > thinking that among professionals the question which is the better > programming language is as modern as the last centuries 80th. But if a > reheated discussion is necessary, here is something that I can lough about: > > ------------------------------------------------------------------------ > Unix/Linux an elaborate April Fools prank - Ben Dover > 30-May-07 09:52:22 > > FOR IMMEDIATE RELEASE > > In an announcement that has stunned the computer industry, Ken > Thompson, Dennis Ritchie and Brian Kernighan admitted that the Unix > operating system and C programming language created by them is an > elaborate April Fools prank kept alive for over 20 years. Speaking at > the recent UnixWorld Software Development Forum, Thompson revealed the > following: > > In 1969, AT&T had just terminated their work with the GE/AT&T Multics > project. Brian and I had just started working with an early release > of Pascal from Professor Nichlaus Wirth's ETH labs in Switzerland and > we were impressed with its elegant simplicity and power. Dennis had > just finished reading Bored of the Rings, a hilarious National Lampoon > parody of the great Tolkien Lord of the Rings trilogy. As a lark, we > decided to do parodies of the Multics environment and Pascal. Dennis > and I were responsible for the operating environment. We looked at > Multics and designed the new system to be as complex and cryptic as > possible to maximize casual users' frustration levels, calling it Unix > as a parody of Multics, as well as other more risque allusions. > > Then Dennis and Brian worked on a truly warped version of Pascal, > called "A." When we found others were actually trying to create real > programs with A, we quickly added additional cryptic features and > evolved into B, BCPL and finally C. We stopped when we got a clean > compile on the following syntax: > > for(;P("\n"),R=;P("|"))for(e=C;e=P("_"+(*u++/8)%2))P("|"+(*u/4)%2); > > To think that modern programmers would try to use a language that > allowed such a statement was beyond our comprehension! We actually > thought of selling this to the Soviets to set their computer science > progress back 20 or more years. Imagine our surprise when AT&T and > other US corporations actually began trying to use Unix and C! It has > taken them 20 years to develop enough expertise to generate even > marginally useful applications using this 1960's technological parody, > but we are impressed with the tenacity (if not common sense) of the > general Unix and C programmer. > > In any event, Brian, Dennis and I have been working exclusively in > Pascal on the Apple Macintosh for the past few years and feel really > guilty about the chaos, confusion and truly bad programming that has > resulted from our silly prank so long ago. > > Major Unix and C vendors and customers, including AT&T, Microsoft, > Hewlett-Packard, GTE, NCR, and DEC have refused comment at this time. > Borland International, a leading vendor of Pascal and C tools, > including the popular Turbo Pascal, Turbo C and Turbo C++, stated they > had suspected this for a number of years and would continue to enhance > their Pascal products and halt further efforts to develop C. An IBM > spokesman broke into uncontrolled laughter and had to postpone a > hastely convened news conference concerning the fate of the RS-6000, > merely stating "VM will be available Real Soon Now." In a cryptic > statement, Professor Wirth of the ETH institute and father of the > Pascal, Modula 2 and Oberon structured languages, merely stated that > P. T. Barnum was correct. > ---------------------------------------------------------------------------- > > Best regards > Ulrich Bangert > >> -----Urspr?ngliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von John Ackermann N8UR >> Gesendet: Mittwoch, 1. April 2009 15:12 >> An: aa8k at comcast.net; Discussion of precise time and >> frequency measurement >> Betreff: Re: [time-nuts] P word in my mails >> >> >> Gee, and I thought he was talking about Pascal. :-) >> >> John >> ---- >> >> Mike Naruta AA8K wrote: >>> Not to worry Ulrich, he was using a form >>> of derisive humor. He was insulting Prologix >>> as undesirable. >>> >>> It would be similar to referring to Microsoft >>> as the M-word. >>> >>> >>> Mike - AA8K >>> >>> >>> Ulrich Bangert wrote: >>>> Steve, >>>> >>>> after I read your mail I have been completely perplexed because I >>>> could by no stretch of imagination detect where you had found the >>>> aforesaid P word in my mail. It needed the help of some English >>>> speaking friends and a search in my last mails to find out that I >>>> have (possibly over a range of more than 30 >>>> years) used an American 5 letter word in another sense >> than most/all of you >>>> seem to interprete it. >>>> >>>> I HAVE seen the aforesaid word on some doors during my >> visits to he >>>> United States and I HAVE understood the meaning of the >> word in this >>>> context. But I swear that I have not been aware of the >> fact that the >>>> aforesaid word is used EXCLUSIVELY for the location behind these >>>> doors. If I had been aware of that I would have never used >> this word >>>> in a conversation because that is simply not my style. >>>> >>>> Instead, I have been believing (and I swear this is the >> truth) that >>>> the aforesaid word is used by a gentlemen to address a >> group of other >>>> gentlemen just as a "Hi folks" among noble people but avoiding the >>>> highly offical salutation "Gentlemen", in a sense a >> laid-back use of >>>> "Gentlemen". >>>> >>>> Clearly this is a mistake of mine that I cannot other than to >>>> apologize for! If anyone of you has felt offended or in >> any other way >>>> been affected by my wrong use of this word: Sorry for >> that, that was >>>> NOT my intention in using this term. I have started a lot >> of my posts >>>> to this group with this word because of the high s/n ratio to be >>>> found here and the extremely well educated people in the >> group that I >>>> hold in high regard. >>>> >>>> Someone should have told me before! If you find this word >> in one of >>>> my earlier posts substitute it with "Gentlemen" because >> that is what >>>> was ment. >>>> >>>> Thank you Steve for pointing at that. If you had not done >> it I would >>>> propably have used the word in a wrong sense for the rest >> of my life. >>>> >>>> Best regards >>>> Ulrich Bangert >>>> >>>> >>>>> -----Urspr?ngliche Nachricht----- >>>>> Von: time-nuts-bounces at febo.com >>>>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >>>>> Gesendet: Mittwoch, 1. April 2009 11:57 >>>>> An: Discussion of precise time and frequency measurement >>>>> Betreff: Re: [time-nuts] Prologix >>>>> >>>>> >>>>> This man said the P word without any form of apology :-) >>>>> >>>>> 73 >>>>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From robinkimberley at btinternet.com Wed Apr 1 21:21:49 2009 From: robinkimberley at btinternet.com (Rob Kimberley) Date: Wed, 1 Apr 2009 22:21:49 +0100 Subject: [time-nuts] Odetics Time Code Translator Model 300-413 Message-ID: All, I've just had an enquiry from a US Military T&F user in CA wanting repair support on this product. Odetics (Zyfer) don't support them any more. If anyone knows of a US repair house I can point him to, I'd appreciate it. Thanks Rob Kimberley From majanoff at verizon.net Wed Apr 1 21:37:33 2009 From: majanoff at verizon.net (Mitchell Janoff) Date: Wed, 1 Apr 2009 16:37:33 -0500 Subject: [time-nuts] PPS Divider (John Ackermann N8UR) In-Reply-To: References: Message-ID: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> In your post, you mentioned that the TADD-2, will have six low impedance outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz and 5MHz (assuming a 10MHz source). I am looking for a way to use a single source such as a z3801 as the standard for my various counters and clocks. There was also a post to build this using divide by 10,2 and 5 IC's. If someone is going to build this circuit can they provide the schematic? If there multiple people interested we can have a circuit board created for this project. Thanks, Mitch KC2MFB From jra at febo.com Wed Apr 1 21:56:46 2009 From: jra at febo.com (John Ackermann N8UR) Date: Wed, 01 Apr 2009 17:56:46 -0400 Subject: [time-nuts] PPS Divider (John Ackermann N8UR) In-Reply-To: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> Message-ID: <49D3E31E.4090906@febo.com> You could probably get those output frequencies with a custom version of the PIC code. There shouldn't be any hardware changes needed, though the circuit board layout wasn't optimized for high frequencies so no guarantee on 5 MHz. The PIC source code will be available, so anyone who wants to modify it for other outputs can have at it. John ---- Mitchell Janoff said the following on 04/01/2009 05:37 PM: > In your post, you mentioned that the TADD-2, will have six low impedance > outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz > outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz > and 5MHz (assuming a 10MHz source). I am looking for a way to use a single > source such as a z3801 as the standard for my various counters and clocks. > There was also a post to build this using divide by 10,2 and 5 IC's. If > someone is going to build this circuit can they provide the schematic? If > there multiple people interested we can have a circuit board created for > this project. > > Thanks, > > Mitch > KC2MFB > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From bruce.griffiths at xtra.co.nz Wed Apr 1 22:11:06 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Thu, 02 Apr 2009 11:11:06 +1300 Subject: [time-nuts] PPS Divider (John Ackermann N8UR) In-Reply-To: <49D3E31E.4090906@febo.com> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> Message-ID: <49D3E67A.6010509@xtra.co.nz> John Providing a 5MHz output will be difficult/impossible if the PIC is clocked at 10MHz as a pin will have to be toggled with every instruction. Surely this will leave no time for executing other instructions to produce other output frequencies? It may be possible to do this using inline code with no conditional branches if and only if one can loop back to the start of the code without requiring an extra cycle. It would probably be easier to use a dedicated hardware divider (external flipflop or internal timer) to generate the 5MHz output. Bruce John Ackermann N8UR wrote: > You could probably get those output frequencies with a custom version of > the PIC code. There shouldn't be any hardware changes needed, though > the circuit board layout wasn't optimized for high frequencies so no > guarantee on 5 MHz. > > The PIC source code will be available, so anyone who wants to modify it > for other outputs can have at it. > > John > ---- > > Mitchell Janoff said the following on 04/01/2009 05:37 PM: > >> In your post, you mentioned that the TADD-2, will have six low impedance >> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz >> outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz >> and 5MHz (assuming a 10MHz source). I am looking for a way to use a single >> source such as a z3801 as the standard for my various counters and clocks. >> There was also a post to build this using divide by 10,2 and 5 IC's. If >> someone is going to build this circuit can they provide the schematic? If >> there multiple people interested we can have a circuit board created for >> this project. >> >> Thanks, >> >> Mitch >> KC2MFB >> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From magnus at rubidium.dyndns.org Wed Apr 1 22:11:17 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Thu, 02 Apr 2009 00:11:17 +0200 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay In-Reply-To: <2D64D5541A3447929D857A0E6B07822A@pc52> References: <882814.25081.qm@web27104.mail.ukl.yahoo.com> <2D64D5541A3447929D857A0E6B07822A@pc52> Message-ID: <49D3E685.6010708@rubidium.dyndns.org> Tom Van Baak skrev: >> I notice that this seller is using TVB's plots on his listing. This is a bit naughty. Did he ask you Tom? > > No, he didn't ask. I was a little surprised too. Me too. I saw just from the first plot that it should be one of Toms. At least you are credited, so it is not a total rip-off. On the other hand, it is somewhat a sign of recognition... again. Cheers, Magnus From tvb at LeapSecond.com Wed Apr 1 23:09:16 2009 From: tvb at LeapSecond.com (Tom Van Baak) Date: Wed, 1 Apr 2009 16:09:16 -0700 Subject: [time-nuts] PPS Divider (John Ackermann N8UR) References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop><49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz> Message-ID: <238B295422F5472D822FB97207A176B1@pc52> Mitch, Ah, I can see a new TADD idea: a multi-purpose 2x multiplier or 2x divider, or 5x and 10x too. In your case, though, perhaps you could add a single flip-flop to a TADD-2 to get 5 MHz from 10 MHz, the old-fashioned way. You can't divide by two on a PIC because the minimum loop is a couple of instructions and each instruction takes 4 clock cycles. For those of you who know PIC code, the upper limit is the one mentioned by Bruce where pairs of instructions set and clear an output pin and then the entire memory is those pairs. The instruction counter quietly wraps around avoiding the need for a branch instruction. The result is a divide by 8 counter (2 instructions times 4 clocks per instruction). Ulrich, I assume the AVR is better in this respect (with a 1:1 clock vs. cycle count?). Of course, if you add any programming at all you can't use the wrapping-pair trick. Anyway, that's why all the PIC dividers you see specialize in lower frequencies, from very sub-Hz to Hz to maybe several 100 kHz. /tvb ----- Original Message ----- From: "Bruce Griffiths" To: "Discussion of precise time and frequency measurement" Sent: Wednesday, April 01, 2009 3:11 PM Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > John > > Providing a 5MHz output will be difficult/impossible if the PIC is > clocked at 10MHz as a pin will have to be toggled with every instruction. > Surely this will leave no time for executing other instructions to > produce other output frequencies? > > It may be possible to do this using inline code with no conditional > branches if and only if one can loop back to the start of the code > without requiring an extra cycle. > It would probably be easier to use a dedicated hardware divider > (external flipflop or internal timer) to generate the 5MHz output. > > Bruce > > John Ackermann N8UR wrote: >> You could probably get those output frequencies with a custom version of >> the PIC code. There shouldn't be any hardware changes needed, though >> the circuit board layout wasn't optimized for high frequencies so no >> guarantee on 5 MHz. >> >> The PIC source code will be available, so anyone who wants to modify it >> for other outputs can have at it. >> >> John >> ---- >> >> Mitchell Janoff said the following on 04/01/2009 05:37 PM: >> >>> In your post, you mentioned that the TADD-2, will have six low impedance >>> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz >>> outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz >>> and 5MHz (assuming a 10MHz source). I am looking for a way to use a single >>> source such as a z3801 as the standard for my various counters and clocks. >>> There was also a post to build this using divide by 10,2 and 5 IC's. If >>> someone is going to build this circuit can they provide the schematic? If >>> there multiple people interested we can have a circuit board created for >>> this project. >>> >>> Thanks, >>> >>> Mitch >>> KC2MFB From jra at febo.com Wed Apr 1 23:32:40 2009 From: jra at febo.com (John Ackermann N8UR) Date: Wed, 01 Apr 2009 19:32:40 -0400 Subject: [time-nuts] PPS Divider (John Ackermann N8UR) In-Reply-To: <49D3E67A.6010509@xtra.co.nz> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz> Message-ID: <49D3F998.5080009@febo.com> Hi Bruce -- Good point; I'll leave it to the software guys to figure that out. :-) John ---- Bruce Griffiths said the following on 04/01/2009 06:11 PM: > John > > Providing a 5MHz output will be difficult/impossible if the PIC is > clocked at 10MHz as a pin will have to be toggled with every instruction. > Surely this will leave no time for executing other instructions to > produce other output frequencies? > > It may be possible to do this using inline code with no conditional > branches if and only if one can loop back to the start of the code > without requiring an extra cycle. > It would probably be easier to use a dedicated hardware divider > (external flipflop or internal timer) to generate the 5MHz output. > > Bruce > > John Ackermann N8UR wrote: >> You could probably get those output frequencies with a custom version of >> the PIC code. There shouldn't be any hardware changes needed, though >> the circuit board layout wasn't optimized for high frequencies so no >> guarantee on 5 MHz. >> >> The PIC source code will be available, so anyone who wants to modify it >> for other outputs can have at it. >> >> John >> ---- >> >> Mitchell Janoff said the following on 04/01/2009 05:37 PM: >> >>> In your post, you mentioned that the TADD-2, will have six low impedance >>> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz >>> outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz >>> and 5MHz (assuming a 10MHz source). I am looking for a way to use a single >>> source such as a z3801 as the standard for my various counters and clocks. >>> There was also a post to build this using divide by 10,2 and 5 IC's. If >>> someone is going to build this circuit can they provide the schematic? If >>> there multiple people interested we can have a circuit board created for >>> this project. >>> >>> Thanks, >>> >>> Mitch >>> KC2MFB >>> >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From va2hdd at aei.ca Thu Apr 2 01:30:15 2009 From: va2hdd at aei.ca (Claude Houde) Date: Wed, 01 Apr 2009 21:30:15 -0400 Subject: [time-nuts] Austron 2100F References: 49D2C0E9.3020507@aei.ca Message-ID: <49D41527.1000201@aei.ca> Hi everybody ! Thanks for your fast answers. If I can resume it is OK to buy the 2100F, but at a bargain price as it may be a really tough job to bring it back to life. Thanks also for the user's manual source, I will order it to start troubleshooting. Again thanks and best regards ! 73 from Claude VA2HDD From kilodelta4foxmike at gmail.com Thu Apr 2 02:17:13 2009 From: kilodelta4foxmike at gmail.com (Brian Kirby) Date: Wed, 01 Apr 2009 21:17:13 -0500 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D3F998.5080009@febo.com> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz> <49D3F998.5080009@febo.com> Message-ID: <49D42029.3000304@gmail.com> Maybe we all could come up with a separate new board to take 10 Mhz and give us 5 Mhz and 1 Mhz out. Start with a buffer amp and then a decent Schmidt trigger. Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 Mhz. These out puts could be buffered with 74AC04 for TTL. Another set of outputs could be derived and filtered to give sine wave outputs. It seems the crowd is against 7490s, and 74390s - and I would like to know what the crowd recommends as suitable. Brian KD4FM John Ackermann N8UR wrote: > Hi Bruce -- > > Good point; I'll leave it to the software guys to figure that out. :-) > > John > ---- > > Br > From bruce.griffiths at xtra.co.nz Thu Apr 2 02:49:32 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Thu, 02 Apr 2009 15:49:32 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D42029.3000304@gmail.com> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz> <49D3F998.5080009@febo.com> <49D42029.3000304@gmail.com> Message-ID: <49D427BC.20507@xtra.co.nz> Brian Ideally one would use something like a Johnson counter or a Grey code counter, decode the required outputs and then resynchronise the decoded outputs using a set of dedicated flipflops. Since such counters only change the state of one flipflop at a time it is possible to avoid decoding glitches. The resynchronisation flipflops minimise the clock to output delay and its associated tempco as well as minimise the jitter. Although the decoders can have glitch free outputs there will be some edge delay patterns that repeat every ten input clock periods. If one is using a set of retiming/resynchronisation flipflops then decoder deglitches are relatively unimportant as they are eliminated by the retiming flipflops. One could use a 74HC4017 and produce the 5MHz output as: 5MHz = Q0 +Q2+ Q4 + Q6 + Q8 which will be glitch free. However resynchronisation will be necessary to minimise periodic variations in edge delay for this output. 1MHz = Carry Out Bruce Brian Kirby wrote: > Maybe we all could come up with a separate new board to take 10 Mhz and > give us 5 Mhz and 1 Mhz out. > > Start with a buffer amp and then a decent Schmidt trigger. Feed it to a > symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 > Mhz. These out puts could be buffered with 74AC04 for TTL. Another set > of outputs could be derived and filtered to give sine wave outputs. > > It seems the crowd is against 7490s, and 74390s - and I would like to > know what the crowd recommends as suitable. > > Brian KD4FM > > John Ackermann N8UR wrote: > >> Hi Bruce -- >> >> Good point; I'll leave it to the software guys to figure that out. :-) >> >> John >> ---- >> >> Br >> >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From hmurray at megapathdsl.net Thu Apr 2 09:09:59 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Thu, 02 Apr 2009 02:09:59 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: Message from Brian Kirby of "Wed, 01 Apr 2009 21:17:13 CDT." <49D42029.3000304@gmail.com> Message-ID: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> > Start with a buffer amp and then a decent Schmidt trigger. If you have a clean input signal, a Schmitt trigger doesn't solve any problems. It does help if you have a slowly rising signal such that noise might be significant while the signal is near threshold. A 10 MHz sine wave is slow relative to AC logic. Since we were recently speaking of LPROs, their user manual has a section on how to convert 10 MHz sine waves into TTL signals. None of their suggestions used Schmitt triggers. This feels like the sort of thing that should have been hashed out here by now. Is it time to start a FAQ? My straw man would be to capacitive couple into a 74AC00 that's biased halfway between VCC and GND. That's clean and simple. A transformer would break ground loops. A differential input chip might reduce jitter from noise on the power supply. > Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical > dive by 10 for 1 Mhz. > It seems the crowd is against 7490s, and 74390s - and I would like to > know what the crowd recommends as suitable. Dividing by 10 is simple. Doing it with symmetrical output takes a bit more/different logic than comes prepackaged in a single DIP, or at least not any that I'm familiar with. Plan A would use a 4 bit loadable counter and load it with 3 when it reads 12 so the top bit would be off for 5 cycles, 3 through 7, then on for 5 cycles, 8 through 12. That's reasonable to implement in old TTL DIPs. 12 is easy to decode, just a 2 input gate since states 13-15 won't happen. 74xx163 and 74xx00 Plan B would be to use a PAL or CPLD. I don't know of any that are available in DIP, have free design software, and are easy to program without a fancy programmer. There could easily be something I don't know about. I know that Xilinx CPLDs have free software (WebPACK) but they don't come in DIP. A friend has written software to program them, but he's a wizard so I don't know if mortals could do it. WebPACK may do the programming if you have a gizmo. One is available at a reasonable price from Digilent. This technology is too handy. There is probably some hobbyist friendly setup out there. You may have to build a programmer. -- These are my opinions, not necessarily my employer's. I hate spam. From sar10538 at gmail.com Thu Apr 2 09:10:50 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Thu, 2 Apr 2009 22:10:50 +1300 Subject: [time-nuts] P word in my mails In-Reply-To: References: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> Message-ID: <1231b6a80904020210h314d13f5q9ca46aab31f7fc2@mail.gmail.com> Dear Ulrich, After writhing around on the floor for some time, with my sides splitting, I have managed to stop laughing, hopefully, long enough to reply to your post. The P word in question is, as already pointed out, PASCAL (hack, spit). To my understanding, almost universally loathed throughout the coding community, and which, I thought, was put to rest many moons ago, much to the relief of the programming community. Now I have gone to the vault and dusted off the copy of The Historium Evilis Computium which I keep wrapped in a black silk scarf and locked in a lead lined container. It always gives me shivers whenever I open this book and it takes some while to get back into a decent sleep pattern after each reading. Searching through the book, I find many sections referring to the M word, the I word, the BG words, and that's not to forget the GOTO word. I went past the sections printed in special ink where the text can only be read by those who are pure of heart, as it is a protection against the evil IT masters who would send their vile lawyers to suppress this work, until I came upon this ancient writing which I reproduce below. WARNING: if you are of a nervous disposition, or suffer from heart problems, I urge to to delete this message immediately and wipe the free-space on your hard drive with a 35 pass Gutmann method. -- And it came to pass that the Dark One was troubled. Mankind had discovered this mighty power they called computing And this made the Dark One angy. He ruminated for many days and nights until he came to a solution. He would create something so grave, so terrible, it would make mankind think of IT as Instant Terror. And the vile thing would dumbfound the masses with it's heavily typed variables, It's unwillingness to perform functions with mixed types And it's difficulty of getting anything useful through the compiler. But mankind would see it as a wondrous system, so neat, so clean, producing nothing but goodness. With a wave of his hands, out of his ASR-33 there spat the most vile, the most evil of all things. And the thing was called PASCAL! And the Dark One roared with a laughter that would be heard from all around. And the P thing was sent down to the educational establishments And darkness came over the computing land And the comp science students were forced to use it. It was pitiful to hear their cries as they flagellated themselves when they coded For it was only the pain that could keep them sane But many failed and were dragged off to the asylums screaming. Infrequently there would be a cry of "I finally got it past the compiler!" And the students would rejoiced as they carried the victor at shoulder height all around. And there rose up others who challenged the P thing And they created new programming languages And their resistance drove out the P thing Expunging it from mankind. It still lurked in some places but it's hold on mankind was broken. And programmers throughout the whole of mankind rejoiced And the dark clouds that covered IT dispersed. But there was no real rejoicing in the end as all that used the P thing succumbed to its vile purpose. And in later years, those that had survived were a pitiful sight Oft-times found in dark corners, chanting, monotonously, "I must not mix types, I must not mix types, I must..." For hours on end, it was a sorrowful sight. And it was said that the Dark One was displeased His plan to destroy the will of mankind was thwarted But only for the moment For he was already working on his next evil plan And it came to pass that he came down onto the World And he took on a human guise And he created an evil empire... -- This is all I am prepared to transcribe from the book for fear that even worse things will happen. I will have to get my whip from the vault and flagellate myself for hours to get this P thing out of my mind and try to keep myself sane, such is the power of this evil thing. That's all folks!!! 73, Steve 2009/4/2 Ulrich Bangert : > Steve, > > after I read your mail I have been completely perplexed because I could by > no stretch of imagination detect where you had found the aforesaid P word in > my mail. It needed the help of some English speaking friends and a search in > my last mails to find out that I have (possibly over a range of more than 30 > years) used an American 5 letter word in another sense than most/all of you > seem to interprete it. > > I HAVE seen the aforesaid word on some doors during my visits to he United > States and I HAVE understood the meaning of the word in this context. But I > swear that I have not been aware of the fact that the aforesaid word is used > EXCLUSIVELY for the location behind these doors. If I had been aware of that > I would have never used this word in a conversation because that is simply > not my style. > > Instead, I have been believing (and I swear this is the truth) that the > aforesaid word is used by a gentlemen to address a group of other gentlemen > just as a "Hi folks" among noble people but avoiding the highly offical > salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". > > Clearly this is a mistake of mine that I cannot other than to apologize for! > If anyone of you has felt offended or in any other way been affected by my > wrong use of this word: Sorry for that, that was NOT my intention in using > this term. I have started a lot of my posts to this group with this word > because of the high s/n ratio to be found here and the extremely well > educated people in the group that I hold in high regard. > > Someone should have told me before! If you find this word in one of my > earlier posts substitute it with "Gentlemen" because that is what was ment. > > Thank you Steve for pointing at that. If you had not done it I would > propably have used the word in a wrong sense for the rest of my life. > > Best regards > Ulrich Bangert > > >> -----Urspr?ngliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >> Gesendet: Mittwoch, 1. April 2009 11:57 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] Prologix >> >> >> This man said the P word without any form of apology :-) >> >> 73 >> >> 2009/4/1 Ulrich Bangert : >> > Mike, >> > >> > I would like to second Brent's information: That is exactly >> how it is >> > done. Talking to the Prologix interface and talking to the NI >> > interface is COMPLETELY different in that talking to the Prologix >> > always means straightforward serial communication while >> talking to the >> > NI involves DLL-calls from the application. >> > >> > The Prologix is cheap and easy to work with, thats why some >> time nuts >> > use it. The NI interface is on the other hand more >> expensive and more >> > complex to handle (and yes, it does some things that are not easily >> > done with the Prologix). The biggest advantage of the DLL-calls is: >> > The same application works with whatever NI interface you >> use: Plug in >> > card, USB devices, ethernet dvices, you name it. All work >> by the SAME >> > dll calls, so your application is not specific for a >> interface device. >> > >> > I do not forget to advertise my own solution to GPIB >> programming named >> > EZGPIB which talks to Prologix (both LAN and USB based) as >> well to NI >> > interfaces and thanks supporting basic VISA even to GPIB >> interfaces of >> > other suppliers. >> > >> > It uses an easy to learn PASCAL like script language that >> your friend >> > might get used to in a snap. Basically, if your friend >> writes a EZGPIB >> > based script to talk to his counter over the Prologix, you will be >> > able to use the SAME script to talk to your 5335A via a NI >> interface. >> > Nice feature? EZGPIB has got mentioned in April's 2008 >> issue of "Test >> > & Measurement World". See the last link on my "About me" page >> > >> > http://www.ulrich-bangert.de/html/about_me.html >> > >> > EZGIPB can be downloaded for free from >> > >> > http://www.ulrich-bangert.de/html/downloads.html >> > >> > Best regards >> > Ulrich, DF6JB >> > >> >> -----Ursprungliche Nachricht----- >> >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] >> >> Im Auftrag von Brent Gordon >> >> Gesendet: Dienstag, 31. Marz 2009 20:07 >> >> An: Discussion of precise time and frequency measurement >> >> Betreff: Re: [time-nuts] Prologix >> >> >> >> >> >> Mike Feher wrote: >> >> > A friend has a 5335A counter and bought a Prologix adaptor >> >> for it to >> >> > collect data. He wrote the software and has had extremely good >> >> > results. He offered to do the same for me utilizing my NI >> >> adaptor so I >> >> > could use it for my various counters. Unfortunately he ran into >> >> > problems and feels he needs a special version of basic >> in order to >> >> > make my $500 NI adaptor work. I admit to my total lack of >> >> programming >> >> > ability. I still use GWBASIC, and only to crunch heavy >> >> numbers. I have >> >> > no idea how to interface any software to communicate with an >> >> > instrument, and, maybe am too old to want to learn as it >> >> seems a lot >> >> > of people do it on a regular basis already. If this becomes too >> >> > difficult I may have to buy a Prologix unit from Abdul. >> >> While I am all >> >> > for doing that, and I bought my NI before Abdul had his >> >> version going, >> >> > I was also under the impression that if the Prologix can do >> >> it the NI >> >> > can do it, but, not necessarily the other way around. My friend >> >> > mentioned API calls, whatever they are. Any suggestions? >> >> Thanks - Mike >> >> > >> >> > >> >> > Mike B. Feher, N4FS >> >> > 89 Arnold Blvd. >> >> > Howell, NJ, 07731 >> >> > 732-886-5960 >> >> > >> >> Mike, >> >> >> >> You should have gotten the NI-488.2 CD with your GPIB >> card. On that >> >> CD are the dlls (Dynamic Link Libraries) to talk to the card. >> >> You can use >> >> the dlls in any language that supports dlls or ActiveX. >> >> Sorry to say, >> >> GWBASIC is not one of those languages. ?Visual Basic 6 >> works well and >> >> I've even done GPIB data acquisition directly into Excel using VBA >> >> (Visual Basic for Applications, Excel's macro language). ?VBA >> >> is part of >> >> Excel. ?Alternatively, you can get a free Visual Basic Express at >> >> http://www.microsoft.com/express/vb/ ?I haven't tried VB >> >> Express, but I >> >> think it will work. ?Normally, I do all my GPIB programming >> >> in LabVIEW. >> >> >> >> Brent >> >> >> >> _______________________________________________ >> >> time-nuts mailing list -- time-nuts at febo.com >> >> To unsubscribe, go to >> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> and follow the instructions there. >> > >> > >> > _______________________________________________ >> > time-nuts mailing list -- time-nuts at febo.com >> > To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> > and follow the instructions there. >> > >> >> >> >> -- >> Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW >> Omnium finis imminet >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet From jra at febo.com Thu Apr 2 12:19:12 2009 From: jra at febo.com (John Ackermann N8UR) Date: Thu, 02 Apr 2009 08:19:12 -0400 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D4AD40.6020300@febo.com> Hal Murray wrote: >> Start with a buffer amp and then a decent Schmidt trigger. > > If you have a clean input signal, a Schmitt trigger doesn't solve any > problems. It does help if you have a slowly rising signal such that noise > might be significant while the signal is near threshold. A 10 MHz sine wave > is slow relative to AC logic. > > Since we were recently speaking of LPROs, their user manual has a section on > how to convert 10 MHz sine waves into TTL signals. None of their suggestions > used Schmitt triggers. > > This feels like the sort of thing that should have been hashed out here by > now. Is it time to start a FAQ? The TADD-2 uses an input circuit published by Wenzel in their "Waveform Conversion" document at http://www.wenzel.com/documents/waveform.html. I haven't measured its standalone jitter, but its input sensitivity is great -- it will reliably trigger a CMOS gate from an input at least down to -10 dBm, maybe lower (I don't recall the exact limits I found when I tested). If you build this, note one thing -- with the 100 ohm emitter resistor specified, the square wave output is more like 6V than 5V p-p. I use 120 ohms instead to get a 5 volt output. While the Wenzel circuit requires a modest handful of discrete components, I think it's the most useful solution by a pretty clear margin for our typical requirement of driving a single-ended logic gate from an HF source. John From bruce.griffiths at xtra.co.nz Thu Apr 2 12:21:03 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 01:21:03 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D4ADAF.20703@xtra.co.nz> Hal Hal Murray wrote: >> Start with a buffer amp and then a decent Schmidt trigger. >> > > If you have a clean input signal, a Schmitt trigger doesn't solve any > problems. It does help if you have a slowly rising signal such that noise > might be significant while the signal is near threshold. A 10 MHz sine wave > is slow relative to AC logic. > > Since we were recently speaking of LPROs, their user manual has a section on > how to convert 10 MHz sine waves into TTL signals. None of their suggestions > used Schmitt triggers. > > This feels like the sort of thing that should have been hashed out here by > now. Is it time to start a FAQ? > > My straw man would be to capacitive couple into a 74AC00 that's biased > halfway between VCC and GND. That's clean and simple. A transformer would > break ground loops. A differential input chip might reduce jitter from noise > on the power supply. > > > A large resistor connected between the input and output would accommodate threshold variations better. Even better would be a feedback loop that adjusts the input bias point to maintain the output duty cycle at 50%. However if you use such a threshold adjustment lop with a Schmitt trigger it will oscillate at a low frequency when there is no input signal. A simple low Q tuned circuit can be used to boost the signal amplitude at the gate input if necessary. > >> Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical >> dive by 10 for 1 Mhz. >> It seems the crowd is against 7490s, and 74390s - and I would like to >> know what the crowd recommends as suitable. >> > > Dividing by 10 is simple. Doing it with symmetrical output takes a bit > more/different logic than comes prepackaged in a single DIP, or at least not > any that I'm familiar with. > > The venerable Johnson decade counter such as a 4017 or 74HC4017 does this in a DIP package. > Plan A would use a 4 bit loadable counter and load it with 3 when it reads 12 > so the top bit would be off for 5 cycles, 3 through 7, then on for 5 cycles, > 8 through 12. That's reasonable to implement in old TTL DIPs. 12 is easy to > decode, just a 2 input gate since states 13-15 won't happen. 74xx163 and > 74xx00 > > Plan B would be to use a PAL or CPLD. I don't know of any that are available > in DIP, have free design software, and are easy to program without a fancy > programmer. There could easily be something I don't know about. I know that > Xilinx CPLDs have free software (WebPACK) but they don't come in DIP. A > friend has written software to program them, but he's a wizard so I don't > know if mortals could do it. WebPACK may do the programming if you have a > gizmo. One is available at a reasonable price from Digilent. > Digilent have suitable Xilinx CPLDs mounted on DIP compatible daughter boards. The CPLDs are programmed via the JTAG port. Suitable JTAG programming cables are readily availble. > This technology is too handy. There is probably some hobbyist friendly setup > out there. You may have to build a programmer. > > > Bruce From bruce.griffiths at xtra.co.nz Thu Apr 2 12:31:46 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 01:31:46 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D4AD40.6020300@febo.com> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> <49D4AD40.6020300@febo.com> Message-ID: <49D4B032.3050804@xtra.co.nz> John Ackermann N8UR wrote: > Hal Murray wrote: > >>> Start with a buffer amp and then a decent Schmidt trigger. >>> >> If you have a clean input signal, a Schmitt trigger doesn't solve any >> problems. It does help if you have a slowly rising signal such that noise >> might be significant while the signal is near threshold. A 10 MHz sine wave >> is slow relative to AC logic. >> >> Since we were recently speaking of LPROs, their user manual has a section on >> how to convert 10 MHz sine waves into TTL signals. None of their suggestions >> used Schmitt triggers. >> >> This feels like the sort of thing that should have been hashed out here by >> now. Is it time to start a FAQ? >> > > The TADD-2 uses an input circuit published by Wenzel in their "Waveform > Conversion" document at http://www.wenzel.com/documents/waveform.html. > > I haven't measured its standalone jitter, but its input sensitivity is > great -- it will reliably trigger a CMOS gate from an input at least > down to -10 dBm, maybe lower (I don't recall the exact limits I found > when I tested). If you build this, note one thing -- with the 100 ohm > emitter resistor specified, the square wave output is more like 6V than > 5V p-p. I use 120 ohms instead to get a 5 volt output. > > While the Wenzel circuit requires a modest handful of discrete > components, I think it's the most useful solution by a pretty clear > margin for our typical requirement of driving a single-ended logic gate > from an HF source. > > John > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > John One could also use a PECL to TTL level translator. JPL have used ECL dividers throughout to produce 10MHz, 1MHz and 100KHz outputs from the 100MHz signal derived from a Hydrogen maser: http://tmo.jpl.nasa.gov/progress_report2/42-30/30I.PDF Where TTL outputs are required an ECL to TTl translator followed by a discrete amplifier to drive TTL levels in a 50 ohm load was used. Bruce From cupido at mail.ua.pt Thu Apr 2 12:42:23 2009 From: cupido at mail.ua.pt (Luis Cupido) Date: Thu, 02 Apr 2009 13:42:23 +0100 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D4ADAF.20703@xtra.co.nz> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> <49D4ADAF.20703@xtra.co.nz> Message-ID: <49D4B2AF.3040300@mail.ua.pt> > The CPLDs are programmed via the JTAG port. > Suitable JTAG programming cables are readily availble. Or you can build one to use the LPT port of your PC using just a 74HC244. Luis Cupido. ct1dmk. From brooke at pacific.net Thu Apr 2 14:46:21 2009 From: brooke at pacific.net (brooke at pacific.net) Date: Thu, 2 Apr 2009 07:46:21 -0700 (PDT) Subject: [time-nuts] P word in my mails In-Reply-To: <1231b6a80904020210h314d13f5q9ca46aab31f7fc2@mail.gmail.com> References: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> <1231b6a80904020210h314d13f5q9ca46aab31f7fc2@mail.gmail.com> Message-ID: <1192.SVVXXVxVQkI=.1238683581.squirrel@webmail.securepacific.net> Hi Steve: I came across this Programmer's Language Guide on Prof Kelly's web page related to his 68000 assembler software at: http://www.monroeccc.edu/ckelly/default.htm Have Fun, Brooke Clarke http://www.PRC68.com -------------------------------------------- PROGRAMMERS LANGUAGE REFERENCE GUIDE C You shoot yourself in the foot. C++ You shoot yourself in the foot and then accidentally delete the pointer that points to it. Your foot is now in the garbage and there is no way to retrieve it. Java It looks like your gun but some things are missing and others are in the wrong place. While trying to figure out how to use it you accidentally shoot yourself in the groin. Modula-2 After realizing that you can't actually accomplish anything in the language, you shoot yourself in the head. Pascal Same as Modula-2, except that the bullets are the wrong type and won't pass through the barrel. The gun explodes. FORTRAN You shoot yourself in each toe, iteratively, until you run out of toes, then you read in the next foot and repeat. If you run out of bullets, you continue anyway because you have no exception-processing ability. ALGOL You shoot yourself in the foot with a musket. The musket is aesthetically fascinating, and the wound baffles the adolescent medic in the emergency room. COBOL You describe the gun, the foot, and the process of shooting the foot with the gun in great detail. You then shoot yourself in the head. APL You hear a bang, your foot hurts, but you don't know enough linear algebra to figure out what happened. LISP You shoot yourself in the appendage which holds the gun with which you shoot yourself in the appendage which holds the gun with which you shoot yourself in the appendage which holds the gun with which .... FORTH Foot in yourself shoot. ASSEMBLY You shoot yourself in the foot with a machine gun. You attempt to slow down the fire rate but are unable to understand the program because there are no comments. XBASE Shooting yourself is no problem. If you want to shoot yourself in the foot, you have to use Clipper. BASIC Shoot yourself in the foot with a water-pistol. On big systems, continue until entire lower body is waterlogged. VISUAL BASIC You spend days designing the perfect user interface and then shoot yourself in the foot. Everyone is so impressed with the user interface you created they all use your program and shoot themselves in the foot. HTML Shoot here SQL You cut off your foot, send it to the service bureau and when it returns it has a hole in it, but no longer fits the end of your leg Dbase You pull the trigger, but the bullet moves so slowly that by the time it reaches your foot, you've forgotten why you shot yourself in the first place Python You shoot yourself in every other toe in order to create more whitespace and then show your foot to all your friends while bragging about how much better Python is than every other programming language. Perl You shoot yourself in the foot 12 different ways. -------------------------------------------- > Dear Ulrich, > > After writhing around on the floor for some time, with my sides > splitting, I have managed to stop laughing, hopefully, long enough to > reply to your post. The P word in question is, as already pointed out, > PASCAL (hack, spit). To my understanding, almost universally loathed > throughout the coding community, and which, I thought, was put to rest > many moons ago, much to the relief of the programming community. > > Now I have gone to the vault and dusted off the copy of The Historium > Evilis Computium which I keep wrapped in a black silk scarf and locked > in a lead lined container. It always gives me shivers whenever I open > this book and it takes some while to get back into a decent sleep > pattern after each reading. Searching through the book, I find many > sections referring to the M word, the I word, the BG words, and that's > not to forget the GOTO word. I went past the sections printed in > special ink where the text can only be read by those who are pure of > heart, as it is a protection against the evil IT masters who would > send their vile lawyers to suppress this work, until I came upon this > ancient writing which I reproduce below. > > WARNING: if you are of a nervous disposition, or suffer from heart > problems, I urge to to delete this message immediately and wipe the > free-space on your hard drive with a 35 pass Gutmann method. > > -- > > And it came to pass that the Dark One was troubled. > Mankind had discovered this mighty power they called computing > And this made the Dark One angy. > > He ruminated for many days and nights until he came to a solution. > He would create something so grave, so terrible, it would make mankind > think of IT as Instant Terror. > And the vile thing would dumbfound the masses with it's heavily typed > variables, > It's unwillingness to perform functions with mixed types > And it's difficulty of getting anything useful through the compiler. > But mankind would see it as a wondrous system, so neat, so clean, > producing nothing but goodness. > > With a wave of his hands, out of his ASR-33 there spat the most vile, > the most evil of all things. > And the thing was called PASCAL! > And the Dark One roared with a laughter that would be heard from all > around. > > And the P thing was sent down to the educational establishments > And darkness came over the computing land > And the comp science students were forced to use it. > It was pitiful to hear their cries as they flagellated themselves when > they coded > For it was only the pain that could keep them sane > But many failed and were dragged off to the asylums screaming. > Infrequently there would be a cry of "I finally got it past the compiler!" > And the students would rejoiced as they carried the victor at shoulder > height all around. > > And there rose up others who challenged the P thing > And they created new programming languages > And their resistance drove out the P thing > Expunging it from mankind. > It still lurked in some places but it's hold on mankind was broken. > And programmers throughout the whole of mankind rejoiced > And the dark clouds that covered IT dispersed. > > But there was no real rejoicing in the end as all that used the P > thing succumbed to its vile purpose. > And in later years, those that had survived were a pitiful sight > Oft-times found in dark corners, chanting, monotonously, > "I must not mix types, I must not mix types, I must..." > For hours on end, it was a sorrowful sight. > > And it was said that the Dark One was displeased > His plan to destroy the will of mankind was thwarted > But only for the moment > For he was already working on his next evil plan > And it came to pass that he came down onto the World > And he took on a human guise > And he created an evil empire... > > -- > > This is all I am prepared to transcribe from the book for fear that > even worse things will happen. I will have to get my whip from the > vault and flagellate myself for hours to get this P thing out of my > mind and try to keep myself sane, such is the power of this evil > thing. > > That's all folks!!! > 73, Steve > > 2009/4/2 Ulrich Bangert : >> Steve, >> >> after I read your mail I have been completely perplexed because I could >> by >> no stretch of imagination detect where you had found the aforesaid P >> word in >> my mail. It needed the help of some English speaking friends and a >> search in >> my last mails to find out that I have (possibly over a range of more >> than 30 >> years) used an American 5 letter word in another sense than most/all of >> you >> seem to interprete it. >> >> I HAVE seen the aforesaid word on some doors during my visits to he >> United >> States and I HAVE understood the meaning of the word in this context. >> But I >> swear that I have not been aware of the fact that the aforesaid word is >> used >> EXCLUSIVELY for the location behind these doors. If I had been aware of >> that >> I would have never used this word in a conversation because that is >> simply >> not my style. >> >> Instead, I have been believing (and I swear this is the truth) that the >> aforesaid word is used by a gentlemen to address a group of other >> gentlemen >> just as a "Hi folks" among noble people but avoiding the highly offical >> salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". >> >> Clearly this is a mistake of mine that I cannot other than to apologize >> for! >> If anyone of you has felt offended or in any other way been affected by >> my >> wrong use of this word: Sorry for that, that was NOT my intention in >> using >> this term. I have started a lot of my posts to this group with this word >> because of the high s/n ratio to be found here and the extremely well >> educated people in the group that I hold in high regard. >> >> Someone should have told me before! If you find this word in one of my >> earlier posts substitute it with "Gentlemen" because that is what was >> ment. >> >> Thank you Steve for pointing at that. If you had not done it I would >> propably have used the word in a wrong sense for the rest of my life. >> >> Best regards >> Ulrich Bangert >> >> >>> -----Urspr?ngliche Nachricht----- >>> Von: time-nuts-bounces at febo.com >>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >>> Gesendet: Mittwoch, 1. April 2009 11:57 >>> An: Discussion of precise time and frequency measurement >>> Betreff: Re: [time-nuts] Prologix >>> >>> >>> This man said the P word without any form of apology :-) >>> >>> 73 >>> >>> 2009/4/1 Ulrich Bangert : >>> > Mike, >>> > >>> > I would like to second Brent's information: That is exactly >>> how it is >>> > done. Talking to the Prologix interface and talking to the NI >>> > interface is COMPLETELY different in that talking to the Prologix >>> > always means straightforward serial communication while >>> talking to the >>> > NI involves DLL-calls from the application. >>> > >>> > The Prologix is cheap and easy to work with, thats why some >>> time nuts >>> > use it. The NI interface is on the other hand more >>> expensive and more >>> > complex to handle (and yes, it does some things that are not easily >>> > done with the Prologix). The biggest advantage of the DLL-calls is: >>> > The same application works with whatever NI interface you >>> use: Plug in >>> > card, USB devices, ethernet dvices, you name it. All work >>> by the SAME >>> > dll calls, so your application is not specific for a >>> interface device. >>> > >>> > I do not forget to advertise my own solution to GPIB >>> programming named >>> > EZGPIB which talks to Prologix (both LAN and USB based) as >>> well to NI >>> > interfaces and thanks supporting basic VISA even to GPIB >>> interfaces of >>> > other suppliers. >>> > >>> > It uses an easy to learn PASCAL like script language that >>> your friend >>> > might get used to in a snap. Basically, if your friend >>> writes a EZGPIB >>> > based script to talk to his counter over the Prologix, you will be >>> > able to use the SAME script to talk to your 5335A via a NI >>> interface. >>> > Nice feature? EZGPIB has got mentioned in April's 2008 >>> issue of "Test >>> > & Measurement World". See the last link on my "About me" page >>> > >>> > http://www.ulrich-bangert.de/html/about_me.html >>> > >>> > EZGIPB can be downloaded for free from >>> > >>> > http://www.ulrich-bangert.de/html/downloads.html >>> > >>> > Best regards >>> > Ulrich, DF6JB >>> > >>> >> -----Ursprungliche Nachricht----- >>> >> Von: time-nuts-bounces at febo.com >>> [mailto:time-nuts-bounces at febo.com] >>> >> Im Auftrag von Brent Gordon >>> >> Gesendet: Dienstag, 31. Marz 2009 20:07 >>> >> An: Discussion of precise time and frequency measurement >>> >> Betreff: Re: [time-nuts] Prologix >>> >> >>> >> >>> >> Mike Feher wrote: >>> >> > A friend has a 5335A counter and bought a Prologix adaptor >>> >> for it to >>> >> > collect data. He wrote the software and has had extremely good >>> >> > results. He offered to do the same for me utilizing my NI >>> >> adaptor so I >>> >> > could use it for my various counters. Unfortunately he ran into >>> >> > problems and feels he needs a special version of basic >>> in order to >>> >> > make my $500 NI adaptor work. I admit to my total lack of >>> >> programming >>> >> > ability. I still use GWBASIC, and only to crunch heavy >>> >> numbers. I have >>> >> > no idea how to interface any software to communicate with an >>> >> > instrument, and, maybe am too old to want to learn as it >>> >> seems a lot >>> >> > of people do it on a regular basis already. If this becomes too >>> >> > difficult I may have to buy a Prologix unit from Abdul. >>> >> While I am all >>> >> > for doing that, and I bought my NI before Abdul had his >>> >> version going, >>> >> > I was also under the impression that if the Prologix can do >>> >> it the NI >>> >> > can do it, but, not necessarily the other way around. My friend >>> >> > mentioned API calls, whatever they are. Any suggestions? >>> >> Thanks - Mike >>> >> > >>> >> > >>> >> > Mike B. Feher, N4FS >>> >> > 89 Arnold Blvd. >>> >> > Howell, NJ, 07731 >>> >> > 732-886-5960 >>> >> > >>> >> Mike, >>> >> >>> >> You should have gotten the NI-488.2 CD with your GPIB >>> card. On that >>> >> CD are the dlls (Dynamic Link Libraries) to talk to the card. >>> >> You can use >>> >> the dlls in any language that supports dlls or ActiveX. >>> >> Sorry to say, >>> >> GWBASIC is not one of those languages. ?Visual Basic 6 >>> works well and >>> >> I've even done GPIB data acquisition directly into Excel using VBA >>> >> (Visual Basic for Applications, Excel's macro language). ?VBA >>> >> is part of >>> >> Excel. ?Alternatively, you can get a free Visual Basic Express at >>> >> http://www.microsoft.com/express/vb/ ?I haven't tried VB >>> >> Express, but I >>> >> think it will work. ?Normally, I do all my GPIB programming >>> >> in LabVIEW. >>> >> >>> >> Brent >>> >> >>> >> _______________________________________________ >>> >> time-nuts mailing list -- time-nuts at febo.com >>> >> To unsubscribe, go to >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> >> and follow the instructions there. >>> > >>> > >>> > _______________________________________________ >>> > time-nuts mailing list -- time-nuts at febo.com >>> > To unsubscribe, go to >>> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> > and follow the instructions there. >>> > >>> >>> >>> >>> -- >>> Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW >>> Omnium finis imminet >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > > -- > Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW > Omnium finis imminet > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From djl at montana.com Thu Apr 2 17:52:05 2009 From: djl at montana.com (Don Latham) Date: Thu, 2 Apr 2009 11:52:05 -0600 Subject: [time-nuts] P word in my mails References: <1231b6a80904010256p3dc5fa7bufc620a1817d0ef5c@mail.gmail.com> <1231b6a80904020210h314d13f5q9ca46aab31f7fc2@mail.gmail.com> Message-ID: <98872D7FC56E46EFBD3E55E8C9D08739@OFFICE2> Lovely, Steve. Many many years ago, I started a meme around that computer languages reflect the culture of their originators; finally saw it appear in Byte after 7-10 years. Won't bore the list, but note that Nicklaus Wirth (P) is a German Swiss. He also named the computer he had built that used P as its operating system Lilith, the wife of Satan (true!). Then Western Digital put out a chipset computer that had P as its native tounge. Got the chipset, never built the computer. I preferred Chuck Peddle's Basic machine (Commodore Pet). Don Latham ----- Original Message ----- From: "Steve Rooke" To: "Discussion of precise time and frequency measurement" Sent: Thursday, April 02, 2009 3:10 AM Subject: Re: [time-nuts] P word in my mails > Dear Ulrich, > > After writhing around on the floor for some time, with my sides > splitting, I have managed to stop laughing, hopefully, long enough to > reply to your post. The P word in question is, as already pointed out, > PASCAL (hack, spit). To my understanding, almost universally loathed > throughout the coding community, and which, I thought, was put to rest > many moons ago, much to the relief of the programming community. > > Now I have gone to the vault and dusted off the copy of The Historium > Evilis Computium which I keep wrapped in a black silk scarf and locked > in a lead lined container. It always gives me shivers whenever I open > this book and it takes some while to get back into a decent sleep > pattern after each reading. Searching through the book, I find many > sections referring to the M word, the I word, the BG words, and that's > not to forget the GOTO word. I went past the sections printed in > special ink where the text can only be read by those who are pure of > heart, as it is a protection against the evil IT masters who would > send their vile lawyers to suppress this work, until I came upon this > ancient writing which I reproduce below. > > WARNING: if you are of a nervous disposition, or suffer from heart > problems, I urge to to delete this message immediately and wipe the > free-space on your hard drive with a 35 pass Gutmann method. > > -- > > And it came to pass that the Dark One was troubled. > Mankind had discovered this mighty power they called computing > And this made the Dark One angy. > > He ruminated for many days and nights until he came to a solution. > He would create something so grave, so terrible, it would make mankind > think of IT as Instant Terror. > And the vile thing would dumbfound the masses with it's heavily typed > variables, > It's unwillingness to perform functions with mixed types > And it's difficulty of getting anything useful through the compiler. > But mankind would see it as a wondrous system, so neat, so clean, > producing nothing but goodness. > > With a wave of his hands, out of his ASR-33 there spat the most vile, > the most evil of all things. > And the thing was called PASCAL! > And the Dark One roared with a laughter that would be heard from all > around. > > And the P thing was sent down to the educational establishments > And darkness came over the computing land > And the comp science students were forced to use it. > It was pitiful to hear their cries as they flagellated themselves when > they coded > For it was only the pain that could keep them sane > But many failed and were dragged off to the asylums screaming. > Infrequently there would be a cry of "I finally got it past the compiler!" > And the students would rejoiced as they carried the victor at shoulder > height all around. > > And there rose up others who challenged the P thing > And they created new programming languages > And their resistance drove out the P thing > Expunging it from mankind. > It still lurked in some places but it's hold on mankind was broken. > And programmers throughout the whole of mankind rejoiced > And the dark clouds that covered IT dispersed. > > But there was no real rejoicing in the end as all that used the P > thing succumbed to its vile purpose. > And in later years, those that had survived were a pitiful sight > Oft-times found in dark corners, chanting, monotonously, > "I must not mix types, I must not mix types, I must..." > For hours on end, it was a sorrowful sight. > > And it was said that the Dark One was displeased > His plan to destroy the will of mankind was thwarted > But only for the moment > For he was already working on his next evil plan > And it came to pass that he came down onto the World > And he took on a human guise > And he created an evil empire... > > -- > > This is all I am prepared to transcribe from the book for fear that > even worse things will happen. I will have to get my whip from the > vault and flagellate myself for hours to get this P thing out of my > mind and try to keep myself sane, such is the power of this evil > thing. > > That's all folks!!! > 73, Steve > > 2009/4/2 Ulrich Bangert : >> Steve, >> >> after I read your mail I have been completely perplexed because I could >> by >> no stretch of imagination detect where you had found the aforesaid P word >> in >> my mail. It needed the help of some English speaking friends and a search >> in >> my last mails to find out that I have (possibly over a range of more than >> 30 >> years) used an American 5 letter word in another sense than most/all of >> you >> seem to interprete it. >> >> I HAVE seen the aforesaid word on some doors during my visits to he >> United >> States and I HAVE understood the meaning of the word in this context. But >> I >> swear that I have not been aware of the fact that the aforesaid word is >> used >> EXCLUSIVELY for the location behind these doors. If I had been aware of >> that >> I would have never used this word in a conversation because that is >> simply >> not my style. >> >> Instead, I have been believing (and I swear this is the truth) that the >> aforesaid word is used by a gentlemen to address a group of other >> gentlemen >> just as a "Hi folks" among noble people but avoiding the highly offical >> salutation "Gentlemen", in a sense a laid-back use of "Gentlemen". >> >> Clearly this is a mistake of mine that I cannot other than to apologize >> for! >> If anyone of you has felt offended or in any other way been affected by >> my >> wrong use of this word: Sorry for that, that was NOT my intention in >> using >> this term. I have started a lot of my posts to this group with this word >> because of the high s/n ratio to be found here and the extremely well >> educated people in the group that I hold in high regard. >> >> Someone should have told me before! If you find this word in one of my >> earlier posts substitute it with "Gentlemen" because that is what was >> ment. >> >> Thank you Steve for pointing at that. If you had not done it I would >> propably have used the word in a wrong sense for the rest of my life. >> >> Best regards >> Ulrich Bangert >> >> >>> -----Urspr?ngliche Nachricht----- >>> Von: time-nuts-bounces at febo.com >>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Steve Rooke >>> Gesendet: Mittwoch, 1. April 2009 11:57 >>> An: Discussion of precise time and frequency measurement >>> Betreff: Re: [time-nuts] Prologix >>> >>> >>> This man said the P word without any form of apology :-) >>> >>> 73 >>> >>> 2009/4/1 Ulrich Bangert : >>> > Mike, >>> > >>> > I would like to second Brent's information: That is exactly >>> how it is >>> > done. Talking to the Prologix interface and talking to the NI >>> > interface is COMPLETELY different in that talking to the Prologix >>> > always means straightforward serial communication while >>> talking to the >>> > NI involves DLL-calls from the application. >>> > >>> > The Prologix is cheap and easy to work with, thats why some >>> time nuts >>> > use it. The NI interface is on the other hand more >>> expensive and more >>> > complex to handle (and yes, it does some things that are not easily >>> > done with the Prologix). The biggest advantage of the DLL-calls is: >>> > The same application works with whatever NI interface you >>> use: Plug in >>> > card, USB devices, ethernet dvices, you name it. All work >>> by the SAME >>> > dll calls, so your application is not specific for a >>> interface device. >>> > >>> > I do not forget to advertise my own solution to GPIB >>> programming named >>> > EZGPIB which talks to Prologix (both LAN and USB based) as >>> well to NI >>> > interfaces and thanks supporting basic VISA even to GPIB >>> interfaces of >>> > other suppliers. >>> > >>> > It uses an easy to learn PASCAL like script language that >>> your friend >>> > might get used to in a snap. Basically, if your friend >>> writes a EZGPIB >>> > based script to talk to his counter over the Prologix, you will be >>> > able to use the SAME script to talk to your 5335A via a NI >>> interface. >>> > Nice feature? EZGPIB has got mentioned in April's 2008 >>> issue of "Test >>> > & Measurement World". See the last link on my "About me" page >>> > >>> > http://www.ulrich-bangert.de/html/about_me.html >>> > >>> > EZGIPB can be downloaded for free from >>> > >>> > http://www.ulrich-bangert.de/html/downloads.html >>> > >>> > Best regards >>> > Ulrich, DF6JB >>> > >>> >> -----Ursprungliche Nachricht----- >>> >> Von: time-nuts-bounces at febo.com >>> [mailto:time-nuts-bounces at febo.com] >>> >> Im Auftrag von Brent Gordon >>> >> Gesendet: Dienstag, 31. Marz 2009 20:07 >>> >> An: Discussion of precise time and frequency measurement >>> >> Betreff: Re: [time-nuts] Prologix >>> >> >>> >> >>> >> Mike Feher wrote: >>> >> > A friend has a 5335A counter and bought a Prologix adaptor >>> >> for it to >>> >> > collect data. He wrote the software and has had extremely good >>> >> > results. He offered to do the same for me utilizing my NI >>> >> adaptor so I >>> >> > could use it for my various counters. Unfortunately he ran into >>> >> > problems and feels he needs a special version of basic >>> in order to >>> >> > make my $500 NI adaptor work. I admit to my total lack of >>> >> programming >>> >> > ability. I still use GWBASIC, and only to crunch heavy >>> >> numbers. I have >>> >> > no idea how to interface any software to communicate with an >>> >> > instrument, and, maybe am too old to want to learn as it >>> >> seems a lot >>> >> > of people do it on a regular basis already. If this becomes too >>> >> > difficult I may have to buy a Prologix unit from Abdul. >>> >> While I am all >>> >> > for doing that, and I bought my NI before Abdul had his >>> >> version going, >>> >> > I was also under the impression that if the Prologix can do >>> >> it the NI >>> >> > can do it, but, not necessarily the other way around. My friend >>> >> > mentioned API calls, whatever they are. Any suggestions? >>> >> Thanks - Mike >>> >> > >>> >> > >>> >> > Mike B. Feher, N4FS >>> >> > 89 Arnold Blvd. >>> >> > Howell, NJ, 07731 >>> >> > 732-886-5960 >>> >> > >>> >> Mike, >>> >> >>> >> You should have gotten the NI-488.2 CD with your GPIB >>> card. On that >>> >> CD are the dlls (Dynamic Link Libraries) to talk to the card. >>> >> You can use >>> >> the dlls in any language that supports dlls or ActiveX. >>> >> Sorry to say, >>> >> GWBASIC is not one of those languages. Visual Basic 6 >>> works well and >>> >> I've even done GPIB data acquisition directly into Excel using VBA >>> >> (Visual Basic for Applications, Excel's macro language). VBA >>> >> is part of >>> >> Excel. Alternatively, you can get a free Visual Basic Express at >>> >> http://www.microsoft.com/express/vb/ I haven't tried VB >>> >> Express, but I >>> >> think it will work. Normally, I do all my GPIB programming >>> >> in LabVIEW. >>> >> >>> >> Brent >>> >> >>> >> _______________________________________________ >>> >> time-nuts mailing list -- time-nuts at febo.com >>> >> To unsubscribe, go to >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> >> and follow the instructions there. >>> > >>> > >>> > _______________________________________________ >>> > time-nuts mailing list -- time-nuts at febo.com >>> > To unsubscribe, go to >>> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> > and follow the instructions there. >>> > >>> >>> >>> >>> -- >>> Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW >>> Omnium finis imminet >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > > -- > Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW > Omnium finis imminet > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From hmurray at megapathdsl.net Thu Apr 2 19:21:21 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Thu, 02 Apr 2009 12:21:21 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: Message from Bruce Griffiths of "Fri, 03 Apr 2009 01:21:03 +1300." <49D4ADAF.20703@xtra.co.nz> Message-ID: <20090402192122.936F6BCE2@ip-64-139-1-69.sjc.megapath.net> > A large resistor connected between the input and output would > accommodate threshold variations better. Even better would be a > feedback loop that adjusts the input bias point to maintain the output > duty cycle at 50%. Isn't that resistor a feedback loop? I played with that setup in the lab many years ago. It didn't work as well as I was expecting. I didn't figure out why it didn't work better. Maybe some gain in the feedback path would help. Then we have to consider stability. Ugh. -- These are my opinions, not necessarily my employer's. I hate spam. From bruce.griffiths at xtra.co.nz Thu Apr 2 20:04:59 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 09:04:59 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402192122.936F6BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402192122.936F6BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D51A6B.9020006@xtra.co.nz> Hal Murray wrote: >> A large resistor connected between the input and output would >> accommodate threshold variations better. Even better would be a >> feedback loop that adjusts the input bias point to maintain the output >> duty cycle at 50%. >> > > Isn't that resistor a feedback loop? > > I played with that setup in the lab many years ago. It didn't work as well > as I was expecting. I didn't figure out why it didn't work better. > > Maybe some gain in the feedback path would help. Then we have to consider > stability. Ugh. > > > Hal Yes, a resistor connected between the input and output of an inverter is a feedback loop but the loop gain is relatively low. With a high amplitude input threshold variations from the nominal can cause the input protection diodes to conduct. Once these diodes conduct the output jitter may deteriorate significantly (it does for HCMOS inverters). Using a non inverting integrator in the feedback path can accurately stabilise the duty cycle . Bruce From hmurray at megapathdsl.net Thu Apr 2 20:06:40 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Thu, 02 Apr 2009 13:06:40 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: Message from Bruce Griffiths of "Fri, 03 Apr 2009 01:31:46 +1300." <49D4B032.3050804@xtra.co.nz> Message-ID: <20090402200641.21009BCE2@ip-64-139-1-69.sjc.megapath.net> > JPL have used ECL dividers throughout to produce 10MHz, 1MHz and > 100KHz outputs from the 100MHz signal derived from a Hydrogen maser: > http://tmo.jpl.nasa.gov/progress_report2/42-30/30I.PDF We've been discussion converting sine to TTL. JPL seems to be distributing ECL rather than sine. This seems like more bait for a FAQ. What are the (dis)advantages of using ECL or TTL vs sine for distribution? (I'm assuming "TTL" covers HC/AHC and 3V CMOS levels too.) At the board level, digital designers often series terminate clocks. There is no termination at the far end. There is a resistor between the (low impedance) driver and the transmission line. The lock goes out at half height and reflects off the far end. The sum of the outgoing edge and the ref;ection give the input gate a clean full height signal. The resistor back at the driver absorbs the reflection. That works great for point-to-point links. It's a disaster for clocks if you have multiple receivers along the transmission line since they see the signal at half height until the reflection gets back to them, a great opportunity for multiple clocking. Does that work OK for distribution via coax? If there is the classic 50 ohm to ground input termination the signal will only be half height. What are the properties of various conversion approaches? how much noise/jitter is added? how much leaks through from the power supply? what is the phase drift with temperature? I think the same questions are interesting for dividers using various technologies. I think the simple divide by 2 with a FF covers all the different combinations of gates and FFs if you use a retiming FF at the end. -- These are my opinions, not necessarily my employer's. I hate spam. From bruce.griffiths at xtra.co.nz Thu Apr 2 20:39:26 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 09:39:26 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402200641.21009BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402200641.21009BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D5227E.60707@xtra.co.nz> Hal Hal Murray wrote: >> JPL have used ECL dividers throughout to produce 10MHz, 1MHz and >> 100KHz outputs from the 100MHz signal derived from a Hydrogen maser: >> http://tmo.jpl.nasa.gov/progress_report2/42-30/30I.PDF >> > > We've been discussion converting sine to TTL. JPL seems to be distributing > ECL rather than sine. > > This seems like more bait for a FAQ. > > What are the (dis)advantages of using ECL or TTL vs sine for distribution? > (I'm assuming "TTL" covers HC/AHC and 3V CMOS levels too.) > > CMOS dividers are supposed to have a lower phase noise floor than ECL dividers but the measurements in the literature are poorly specified. Comparing a CMOS divider with at 20MHz input with an ECL divider with a 200MHz input probably isnt very helpful. > At the board level, digital designers often series terminate clocks. There > is no termination at the far end. There is a resistor between the (low > impedance) driver and the transmission line. The lock goes out at half > height and reflects off the far end. The sum of the outgoing edge and the > ref;ection give the input gate a clean full height signal. The resistor back > at the driver absorbs the reflection. That works great for point-to-point > links. It's a disaster for clocks if you have multiple receivers along the > transmission line since they see the signal at half height until the > reflection gets back to them, a great opportunity for multiple clocking. > > Does that work OK for distribution via coax? If there is the classic 50 ohm > to ground input termination the signal will only be half height. > > It works well provided that the receiver switches on the incident wave and the residual reflections aren't too large. In particular the input capacitance of a counter when configured for a high input R can be problematic with fast rise time signals. Accurate matching of the driver output impedance to the coax characteristic impedance is desirable. LVDS may be useful for frequency distribution between circuit boards. > What are the properties of various conversion approaches? > how much noise/jitter is added? > how much leaks through from the power supply? > what is the phase drift with temperature? > The propagation delay of CMOS typically increases by ~0.4%/C. e.g. 10ns of CMOS propagation delay typically has a tempco of ~ + 40ps/C. > I think the same questions are interesting for dividers using various > technologies. I think the simple divide by 2 with a FF covers all the > different combinations of gates and FFs if you use a retiming FF at the end. > > > Most of the claims and graphs of digital divider phase noise in the literature are very poorly documented. The performance of JPL's ECL dividers at 10Hz offset from the carrier seem to be better than the literature would have one believe. It would be useful to measure the output phase noise of digital divide by 2 circuits with 5MHz and 10MHz inputs for various logic families. It may actually be easier to use divide by 4 switch tail (Johnson) ring counters as achieving the required 90 degree phase shift (for most phase noise measurement setups ) between a pair of dividers is then much easier to achieve by selecting appropriate divider outputs. Bruce From mccorkle at ptialaska.net Thu Apr 2 21:15:23 2009 From: mccorkle at ptialaska.net (Richard H McCorkle) Date: Thu, 2 Apr 2009 13:15:23 -0800 (AKDT) Subject: [time-nuts] PPS Divider (John Ackermann N8UR) In-Reply-To: <49D3E31E.4090906@febo.com> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> Message-ID: <11244.206.174.20.67.1238706923.squirrel@mymail.acsalaska.net> John, Output frequencies above 10 KHz with the PIC divider require separate manipulation of the port bits within the main timing loop. A 100 KHz output can be added this way as tvb did in his original divider code, but if you also want the divider to work properly with both 5M and 10M input rates the bit manipulation code gets a little dicey. For the faster rates I recommend using one of the output port bits as a reset line to start an external high speed divider exactly in sync with the first PIC output. The external divider provides the 1MHz and 100 KHz outputs and the PIC provides the 10 KHz to 1PPS outputs. Richard > You could probably get those output frequencies with a custom version of > the PIC code. There shouldn't be any hardware changes needed, though > the circuit board layout wasn't optimized for high frequencies so no > guarantee on 5 MHz. > > The PIC source code will be available, so anyone who wants to modify it > for other outputs can have at it. > > John > ---- > > Mitchell Janoff said the following on 04/01/2009 05:37 PM: >> In your post, you mentioned that the TADD-2, will have six low impedance >> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 kHz >> outputs. I was wondering if there was a way to provide outputs of 100k, 1MHz >> and 5MHz (assuming a 10MHz source). I am looking for a way to use a single >> source such as a z3801 as the standard for my various counters and clocks. >> There was also a post to build this using divide by 10,2 and 5 IC's. If >> someone is going to build this circuit can they provide the schematic? If >> there multiple people interested we can have a circuit board created for >> this project. >> >> Thanks, >> >> Mitch >> KC2MFB >> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From nhbbobb at gmail.com Thu Apr 2 21:27:37 2009 From: nhbbobb at gmail.com (bbobb mokai) Date: Fri, 3 Apr 2009 05:27:37 +0800 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay Message-ID: <3eb99ee60904021427p3372b53w465a107430562b14@mail.gmail.com> hi,i am fluke.l. About Mr.TVB's photos on my ebay listings.sorry for these surprise. if Tom ask me for any copyright problem,i will remove them.i think,tom has deal with me twice in last early year ,he also have no ask me to removed them. Regards Bob 2009/4/2 > Send time-nuts mailing list submissions to > time-nuts at febo.com > > To subscribe or unsubscribe via the World Wide Web, visit > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > or, via email, send a message with subject or body 'help' to > time-nuts-request at febo.com > > You can reach the person managing the list at > time-nuts-owner at febo.com > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of time-nuts digest..." > > > Today's Topics: > > 1. Re: PPS Divider (John Ackermann N8UR) (John Ackermann N8UR) > 2. Re: PPS Divider (John Ackermann N8UR) (Bruce Griffiths) > 3. Re: Datum / Efratom LPRO 101 - ebay (Magnus Danielson) > 4. Re: PPS Divider (John Ackermann N8UR) (Tom Van Baak) > 5. Re: PPS Divider (John Ackermann N8UR) (John Ackermann N8UR) > 6. Austron 2100F (Claude Houde) > 7. Frequency Divider (Brian Kirby) > 8. Re: Frequency Divider (Bruce Griffiths) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Wed, 01 Apr 2009 17:56:46 -0400 > From: John Ackermann N8UR > Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > To: Discussion of precise time and frequency measurement > > Message-ID: <49D3E31E.4090906 at febo.com> > Content-Type: text/plain; charset=us-ascii; format=flowed > > You could probably get those output frequencies with a custom version of > the PIC code. There shouldn't be any hardware changes needed, though > the circuit board layout wasn't optimized for high frequencies so no > guarantee on 5 MHz. > > The PIC source code will be available, so anyone who wants to modify it > for other outputs can have at it. > > John > ---- > > Mitchell Janoff said the following on 04/01/2009 05:37 PM: > > In your post, you mentioned that the TADD-2, will have six low impedance > > outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 > kHz > > outputs. I was wondering if there was a way to provide outputs of 100k, > 1MHz > > and 5MHz (assuming a 10MHz source). I am looking for a way to use a > single > > source such as a z3801 as the standard for my various counters and > clocks. > > There was also a post to build this using divide by 10,2 and 5 IC's. If > > someone is going to build this circuit can they provide the schematic? If > > there multiple people interested we can have a circuit board created for > > this project. > > > > Thanks, > > > > Mitch > > KC2MFB > > > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > ------------------------------ > > Message: 2 > Date: Thu, 02 Apr 2009 11:11:06 +1300 > From: Bruce Griffiths > Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > To: Discussion of precise time and frequency measurement > > Message-ID: <49D3E67A.6010509 at xtra.co.nz> > Content-Type: text/plain; charset=ISO-8859-1 > > John > > Providing a 5MHz output will be difficult/impossible if the PIC is > clocked at 10MHz as a pin will have to be toggled with every instruction. > Surely this will leave no time for executing other instructions to > produce other output frequencies? > > It may be possible to do this using inline code with no conditional > branches if and only if one can loop back to the start of the code > without requiring an extra cycle. > It would probably be easier to use a dedicated hardware divider > (external flipflop or internal timer) to generate the 5MHz output. > > Bruce > > John Ackermann N8UR wrote: > > You could probably get those output frequencies with a custom version of > > the PIC code. There shouldn't be any hardware changes needed, though > > the circuit board layout wasn't optimized for high frequencies so no > > guarantee on 5 MHz. > > > > The PIC source code will be available, so anyone who wants to modify it > > for other outputs can have at it. > > > > John > > ---- > > > > Mitchell Janoff said the following on 04/01/2009 05:37 PM: > > > >> In your post, you mentioned that the TADD-2, will have six low impedance > >> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 > kHz > >> outputs. I was wondering if there was a way to provide outputs of 100k, > 1MHz > >> and 5MHz (assuming a 10MHz source). I am looking for a way to use a > single > >> source such as a z3801 as the standard for my various counters and > clocks. > >> There was also a post to build this using divide by 10,2 and 5 IC's. If > >> someone is going to build this circuit can they provide the schematic? > If > >> there multiple people interested we can have a circuit board created for > >> this project. > >> > >> Thanks, > >> > >> Mitch > >> KC2MFB > >> > >> > >> _______________________________________________ > >> time-nuts mailing list -- time-nuts at febo.com > >> To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. > >> > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > > > > ------------------------------ > > Message: 3 > Date: Thu, 02 Apr 2009 00:11:17 +0200 > From: Magnus Danielson > Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay > To: Tom Van Baak , Discussion of precise time and > frequency measurement > Message-ID: <49D3E685.6010708 at rubidium.dyndns.org> > Content-Type: text/plain; charset=ISO-8859-1; format=flowed > > Tom Van Baak skrev: > >> I notice that this seller is using TVB's plots on his listing. This is a > bit naughty. Did he ask you Tom? > > > > No, he didn't ask. I was a little surprised too. > > Me too. I saw just from the first plot that it should be one of Toms. At > least you are credited, so it is not a total rip-off. On the other hand, > it is somewhat a sign of recognition... again. > > Cheers, > Magnus > > > > ------------------------------ > > Message: 4 > Date: Wed, 1 Apr 2009 16:09:16 -0700 > From: "Tom Van Baak" > Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > To: "Discussion of precise time and frequency measurement" > > Message-ID: <238B295422F5472D822FB97207A176B1 at pc52> > Content-Type: text/plain; format=flowed; charset="Windows-1252"; > reply-type=original > > Mitch, > > Ah, I can see a new TADD idea: a multi-purpose 2x multiplier > or 2x divider, or 5x and 10x too. > > In your case, though, perhaps you could add a single flip-flop > to a TADD-2 to get 5 MHz from 10 MHz, the old-fashioned way. > > You can't divide by two on a PIC because the minimum loop > is a couple of instructions and each instruction takes 4 clock > cycles. For those of you who know PIC code, the upper limit > is the one mentioned by Bruce where pairs of instructions set > and clear an output pin and then the entire memory is those > pairs. The instruction counter quietly wraps around avoiding > the need for a branch instruction. The result is a divide by 8 > counter (2 instructions times 4 clocks per instruction). Ulrich, > I assume the AVR is better in this respect (with a 1:1 clock vs. > cycle count?). Of course, if you add any programming at all > you can't use the wrapping-pair trick. > > Anyway, that's why all the PIC dividers you see specialize in > lower frequencies, from very sub-Hz to Hz to maybe several > 100 kHz. > > /tvb > > ----- Original Message ----- > From: "Bruce Griffiths" > To: "Discussion of precise time and frequency measurement" < > time-nuts at febo.com> > Sent: Wednesday, April 01, 2009 3:11 PM > Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > > > > John > > > > Providing a 5MHz output will be difficult/impossible if the PIC is > > clocked at 10MHz as a pin will have to be toggled with every instruction. > > Surely this will leave no time for executing other instructions to > > produce other output frequencies? > > > > It may be possible to do this using inline code with no conditional > > branches if and only if one can loop back to the start of the code > > without requiring an extra cycle. > > It would probably be easier to use a dedicated hardware divider > > (external flipflop or internal timer) to generate the 5MHz output. > > > > Bruce > > > > John Ackermann N8UR wrote: > >> You could probably get those output frequencies with a custom version of > >> the PIC code. There shouldn't be any hardware changes needed, though > >> the circuit board layout wasn't optimized for high frequencies so no > >> guarantee on 5 MHz. > >> > >> The PIC source code will be available, so anyone who wants to modify it > >> for other outputs can have at it. > >> > >> John > >> ---- > >> > >> Mitchell Janoff said the following on 04/01/2009 05:37 PM: > >> > >>> In your post, you mentioned that the TADD-2, will have six low > impedance > >>> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 > kHz > >>> outputs. I was wondering if there was a way to provide outputs of 100k, > 1MHz > >>> and 5MHz (assuming a 10MHz source). I am looking for a way to use a > single > >>> source such as a z3801 as the standard for my various counters and > clocks. > >>> There was also a post to build this using divide by 10,2 and 5 IC's. If > >>> someone is going to build this circuit can they provide the schematic? > If > >>> there multiple people interested we can have a circuit board created > for > >>> this project. > >>> > >>> Thanks, > >>> > >>> Mitch > >>> KC2MFB > > > > > > ------------------------------ > > Message: 5 > Date: Wed, 01 Apr 2009 19:32:40 -0400 > From: John Ackermann N8UR > Subject: Re: [time-nuts] PPS Divider (John Ackermann N8UR) > To: Discussion of precise time and frequency measurement > > Message-ID: <49D3F998.5080009 at febo.com> > Content-Type: text/plain; charset=us-ascii; format=flowed > > Hi Bruce -- > > Good point; I'll leave it to the software guys to figure that out. :-) > > John > ---- > > Bruce Griffiths said the following on 04/01/2009 06:11 PM: > > John > > > > Providing a 5MHz output will be difficult/impossible if the PIC is > > clocked at 10MHz as a pin will have to be toggled with every instruction. > > Surely this will leave no time for executing other instructions to > > produce other output frequencies? > > > > It may be possible to do this using inline code with no conditional > > branches if and only if one can loop back to the start of the code > > without requiring an extra cycle. > > It would probably be easier to use a dedicated hardware divider > > (external flipflop or internal timer) to generate the 5MHz output. > > > > Bruce > > > > John Ackermann N8UR wrote: > >> You could probably get those output frequencies with a custom version of > >> the PIC code. There shouldn't be any hardware changes needed, though > >> the circuit board layout wasn't optimized for high frequencies so no > >> guarantee on 5 MHz. > >> > >> The PIC source code will be available, so anyone who wants to modify it > >> for other outputs can have at it. > >> > >> John > >> ---- > >> > >> Mitchell Janoff said the following on 04/01/2009 05:37 PM: > >> > >>> In your post, you mentioned that the TADD-2, will have six low > impedance > >>> outputs that can be individually jumpered to 1 PPS or 10 Hz through 10 > kHz > >>> outputs. I was wondering if there was a way to provide outputs of 100k, > 1MHz > >>> and 5MHz (assuming a 10MHz source). I am looking for a way to use a > single > >>> source such as a z3801 as the standard for my various counters and > clocks. > >>> There was also a post to build this using divide by 10,2 and 5 IC's. If > >>> someone is going to build this circuit can they provide the schematic? > If > >>> there multiple people interested we can have a circuit board created > for > >>> this project. > >>> > >>> Thanks, > >>> > >>> Mitch > >>> KC2MFB > >>> > >>> > >>> _______________________________________________ > >>> time-nuts mailing list -- time-nuts at febo.com > >>> To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >>> and follow the instructions there. > >>> > >> _______________________________________________ > >> time-nuts mailing list -- time-nuts at febo.com > >> To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. > >> > >> > > > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > ------------------------------ > > Message: 6 > Date: Wed, 01 Apr 2009 21:30:15 -0400 > From: Claude Houde > Subject: [time-nuts] Austron 2100F > To: time-nuts at febo.com > Message-ID: <49D41527.1000201 at aei.ca> > Content-Type: text/plain; charset=ISO-8859-1; format=flowed > > Hi everybody ! > > Thanks for your fast answers. > > If I can resume it is OK to buy the 2100F, but at a bargain price as it > may be a really tough job to bring it back to life. > > Thanks also for the user's manual source, I will order it to start > troubleshooting. > > Again thanks and best regards ! > > 73 from Claude VA2HDD > > > > ------------------------------ > > Message: 7 > Date: Wed, 01 Apr 2009 21:17:13 -0500 > From: Brian Kirby > Subject: [time-nuts] Frequency Divider > To: Discussion of precise time and frequency measurement > > Message-ID: <49D42029.3000304 at gmail.com> > Content-Type: text/plain; charset=ISO-8859-1; format=flowed > > Maybe we all could come up with a separate new board to take 10 Mhz and > give us 5 Mhz and 1 Mhz out. > > Start with a buffer amp and then a decent Schmidt trigger. Feed it to a > symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 > Mhz. These out puts could be buffered with 74AC04 for TTL. Another set > of outputs could be derived and filtered to give sine wave outputs. > > It seems the crowd is against 7490s, and 74390s - and I would like to > know what the crowd recommends as suitable. > > Brian KD4FM > > John Ackermann N8UR wrote: > > Hi Bruce -- > > > > Good point; I'll leave it to the software guys to figure that out. :-) > > > > John > > ---- > > > > Br > > > > > > ------------------------------ > > Message: 8 > Date: Thu, 02 Apr 2009 15:49:32 +1300 > From: Bruce Griffiths > Subject: Re: [time-nuts] Frequency Divider > To: Discussion of precise time and frequency measurement > > Message-ID: <49D427BC.20507 at xtra.co.nz> > Content-Type: text/plain; charset=ISO-8859-1 > > Brian > > Ideally one would use something like a Johnson counter or a Grey code > counter, decode the required outputs and then resynchronise the decoded > outputs using a set of dedicated flipflops. > Since such counters only change the state of one flipflop at a time it > is possible to avoid decoding glitches. > The resynchronisation flipflops minimise the clock to output delay and > its associated tempco as well as minimise the jitter. > Although the decoders can have glitch free outputs there will be some > edge delay patterns that repeat every ten input clock periods. > > If one is using a set of retiming/resynchronisation flipflops then > decoder deglitches are relatively unimportant as they are eliminated by > the retiming flipflops. > > One could use a 74HC4017 and produce the 5MHz output as: > > 5MHz = Q0 +Q2+ Q4 + Q6 + Q8 > which will be glitch free. > However resynchronisation will be necessary to minimise periodic > variations in edge delay for this output. > > 1MHz = Carry Out > > > Bruce > > Brian Kirby wrote: > > Maybe we all could come up with a separate new board to take 10 Mhz and > > give us 5 Mhz and 1 Mhz out. > > > > Start with a buffer amp and then a decent Schmidt trigger. Feed it to a > > symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 > > Mhz. These out puts could be buffered with 74AC04 for TTL. Another set > > of outputs could be derived and filtered to give sine wave outputs. > > > > It seems the crowd is against 7490s, and 74390s - and I would like to > > know what the crowd recommends as suitable. > > > > Brian KD4FM > > > > John Ackermann N8UR wrote: > > > >> Hi Bruce -- > >> > >> Good point; I'll leave it to the software guys to figure that out. :-) > >> > >> John > >> ---- > >> > >> Br > >> > >> > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > > > > ------------------------------ > > _______________________________________________ > time-nuts mailing list > time-nuts at febo.com > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > End of time-nuts Digest, Vol 57, Issue 6 > **************************************** > From bruce.griffiths at xtra.co.nz Thu Apr 2 21:37:37 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 10:37:37 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D4B2AF.3040300@mail.ua.pt> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> <49D4ADAF.20703@xtra.co.nz> <49D4B2AF.3040300@mail.ua.pt> Message-ID: <49D53021.2010200@xtra.co.nz> Luis Cupido wrote: > > >> The CPLDs are programmed via the JTAG port. >> Suitable JTAG programming cables are readily availble. >> > > Or you can build one to use the LPT port of your PC using just a 74HC244. > > > Luis Cupido. > ct1dmk. > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Luis Using a 74HC244 may be somewhat problematic with CPLDs that don't have 5V tolerant inputs. Even when using a device with 5V tolerant inputs a 74HCT244 may be more suitable for translating LVCMOS logic level outputs from the CPLD. Bruce From hmurray at megapathdsl.net Thu Apr 2 21:40:53 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Thu, 02 Apr 2009 14:40:53 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: Message from Bruce Griffiths of "Fri, 03 Apr 2009 09:39:26 +1300." <49D5227E.60707@xtra.co.nz> Message-ID: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> > LVDS may be useful for frequency distribution between circuit boards. Good idea thanks. Receivers designed for LVDS are probably good even if the input signal is single ended. Just couple the input signal through a cap and bias the inputs someplace sensible. Ethernet cables/connectors are low cost and widely available. Is there anything better for just a single twisted pair? -- These are my opinions, not necessarily my employer's. I hate spam. From bruce.griffiths at xtra.co.nz Thu Apr 2 21:53:21 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 10:53:21 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D533D1.5020204@xtra.co.nz> Hal Murray wrote: >> LVDS may be useful for frequency distribution between circuit boards. >> > > Good idea thanks. > > Receivers designed for LVDS are probably good even if the input signal is > single ended. Just couple the input signal through a cap and bias the inputs > someplace sensible. > > Ethernet cables/connectors are low cost and widely available. Is there > anything better for just a single twisted pair? > > > Hal SATA drives use LVDS signals. The SATA data connector includes a transmit and a receive pair plus 3 grounds. Bruce From bruce.griffiths at xtra.co.nz Thu Apr 2 22:00:17 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 11:00:17 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D53571.6010409@xtra.co.nz> Hal Murray wrote: >> LVDS may be useful for frequency distribution between circuit boards. >> > > Good idea thanks. > > Receivers designed for LVDS are probably good even if the input signal is > single ended. Just couple the input signal through a cap and bias the inputs > someplace sensible. > > Ethernet cables/connectors are low cost and widely available. Is there > anything better for just a single twisted pair? > > > Hal Twinax, Miniature twinax connectors? Bruce From james.p.lux at jpl.nasa.gov Thu Apr 2 22:02:32 2009 From: james.p.lux at jpl.nasa.gov (Lux, James P) Date: Thu, 2 Apr 2009 15:02:32 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D533D1.5020204@xtra.co.nz> References: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> <49D533D1.5020204@xtra.co.nz> Message-ID: > -----Original Message----- > From: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] On Behalf Of Bruce Griffiths > Sent: Thursday, April 02, 2009 2:53 PM > To: Discussion of precise time and frequency measurement > Subject: Re: [time-nuts] Frequency Divider > > Hal Murray wrote: > >> LVDS may be useful for frequency distribution between > circuit boards. > >> > > > > Good idea thanks. > > > > Receivers designed for LVDS are probably good even if the > input signal > > is single ended. Just couple the input signal through a > cap and bias > > the inputs someplace sensible. And watch out for the limited common mode voltage range of most LVDS receivers. From gwinn at raytheon.com Thu Apr 2 22:04:07 2009 From: gwinn at raytheon.com (Joseph M Gwinn) Date: Thu, 2 Apr 2009 18:04:07 -0400 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D53571.6010409@xtra.co.nz> Message-ID: time-nuts-bounces at febo.com wrote on 04/02/2009 06:00:17 PM: > Hal Murray wrote: > >> LVDS may be useful for frequency distribution between circuit boards. > >> > > > > Good idea thanks. > > > > Receivers designed for LVDS are probably good even if the > input signal is > > single ended. Just couple the input signal through a cap and > bias the inputs > > someplace sensible. > > > > Ethernet cables/connectors are low cost and widely available.Is there > > anything better for just a single twisted pair? > > > > > > > Hal > > Twinax, Miniature twinax connectors? Or CAT7 cable, which is multiple shielded twisted pairs. Joe From james.p.lux at jpl.nasa.gov Thu Apr 2 22:16:49 2009 From: james.p.lux at jpl.nasa.gov (Lux, James P) Date: Thu, 2 Apr 2009 15:16:49 -0700 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D53571.6010409@xtra.co.nz> References: <20090402214054.D5587BCE2@ip-64-139-1-69.sjc.megapath.net> <49D53571.6010409@xtra.co.nz> Message-ID: > -----Original Message----- > From: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] On Behalf Of Bruce Griffiths > Sent: Thursday, April 02, 2009 3:00 PM > To: Discussion of precise time and frequency measurement > Subject: Re: [time-nuts] Frequency Divider > > Hal Murray wrote: > >> LVDS may be useful for frequency distribution between > circuit boards. > >> > > > > Good idea thanks. > > > > Receivers designed for LVDS are probably good even if the > input signal > > is single ended. Just couple the input signal through a > cap and bias > > the inputs someplace sensible. > > > > Ethernet cables/connectors are low cost and widely available. Is > > there anything better for just a single twisted pair? > > > > > > > Hal > > Twinax, Miniature twinax connectors? > WAY more expensive than a 8 pin modular, and probably not as good high speed performance. From rputz at bnin.net Thu Apr 2 22:20:09 2009 From: rputz at bnin.net (Rich and Marcia Putz) Date: Thu, 2 Apr 2009 18:20:09 -0400 Subject: [time-nuts] Frequency dividers Message-ID: <059d01c9b3e1$339ab440$9d83e262@newiw112a268qp> Hi All; All this frequency divider conjecture makes me think someone ought to come up with a modern design regenerative divider! Perhaps a double balanced mixer and a couple of high speed OP amps! Regards; Rich From bruce.griffiths at xtra.co.nz Thu Apr 2 22:35:45 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 11:35:45 +1300 Subject: [time-nuts] Frequency dividers In-Reply-To: <059d01c9b3e1$339ab440$9d83e262@newiw112a268qp> References: <059d01c9b3e1$339ab440$9d83e262@newiw112a268qp> Message-ID: <49D53DC1.6000800@xtra.co.nz> Rich and Marcia Putz wrote: > Hi All; > > All this frequency divider conjecture makes me think someone ought to come up with a modern design regenerative divider! > Perhaps a double balanced mixer and a couple of high speed OP amps! > > Regards; Rich > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Rich Wide band opamps are far too noisy for such state of the art applications particularly in the flicker noise region. A well designed discrete component RF amplifier with negative RF feedback will have much lower phase noise. Some MMICs can have phase noise that is almost as low as a discrete component amplifier. Schottky diode based double balanced mixers have lower phase noise than active double balanced mixers. Bruce From xde-l2g3 at myamail.com Thu Apr 2 22:55:49 2009 From: xde-l2g3 at myamail.com (Mike Monett) Date: Thu, 02 Apr 2009 18:55:49 -0400 Subject: [time-nuts] time-nuts Frequency Divider References: Message-ID: > Message: 3 > Date: Fri, 03 Apr 2009 09:04:59 +1300 > From: Bruce Griffiths > Subject: Re: [time-nuts] Frequency Divider > Hal Murray wrote: >>> A large resistor connected between the input and output would >>> accommodate threshold variations better. Even better would be a >>> feedback loop that adjusts the input bias point to maintain the >>> output duty cycle at 50%. >> Isn't that resistor a feedback loop? >> I played with that setup in the lab many years ago. It didn't >> work as well as I was expecting. I didn't figure out why it >> didn't work better. >> Maybe some gain in the feedback path would help. Then we have to >> consider stability. Ugh. > Hal > Yes, a resistor connected between the input and output of an > inverter is a feedback loop but the loop gain is relatively low. > With a high amplitude input threshold variations from the nominal > can cause the input protection diodes to conduct. > Once these diodes conduct the output jitter may deteriorate > significantly (it does for HCMOS inverters). > Using a non inverting integrator in the feedback path can > accurately stabilise the duty cycle. > Bruce The 74HC and 74AC input threshold tolerance is +/- 30%. This means the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. This limits the maximum input signal to 3V p-p or +13.5dBm, and leads to a very subtle flaw discovered in some amazing engineering work by Martein Bakker, PA3AKE. If the threshold is not controlled, it can cause AM noise to convert to PM noise and degrade the jitter. This occurs in the Analog Devices AD9910 1GHz DDS chip. Martein Bakker discovered this in his noise analysis, and Kevin Wheatly gave a nice entry in his blog on how to fix it: http://www.m0khz.com/?p=589 Mike From bruce.griffiths at xtra.co.nz Thu Apr 2 23:28:31 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 12:28:31 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D54A1F.9080005@xtra.co.nz> Mike The problem is more accurately described as: When the bias network dc level at the 74AC04 (or 74HC04) inverter input isn't equal to the switching threshold of the particular device then AM modulation on the input signal is converted to phase noise as switching no longer occurs at the zero crossing of the input signal. Such behaviour is inherent when using a Schmitt trigger circuit and it cannot be cured with a feedback circuit that stabilises the output duty cycle. A well designed limiter + filter cascade in front of the comparator, Schmitt trigger or logic gate can be used to minimise such AM to PM conversion whilst minimising the output jitter. Bruce Mike Monett wrote: > > Message: 3 > > Date: Fri, 03 Apr 2009 09:04:59 +1300 > > From: Bruce Griffiths > > Subject: Re: [time-nuts] Frequency Divider > > > Hal Murray wrote: > > >>> A large resistor connected between the input and output would > >>> accommodate threshold variations better. Even better would be a > >>> feedback loop that adjusts the input bias point to maintain the > >>> output duty cycle at 50%. > > >> Isn't that resistor a feedback loop? > > >> I played with that setup in the lab many years ago. It didn't > >> work as well as I was expecting. I didn't figure out why it > >> didn't work better. > > >> Maybe some gain in the feedback path would help. Then we have to > >> consider stability. Ugh. > > > Hal > > > Yes, a resistor connected between the input and output of an > > inverter is a feedback loop but the loop gain is relatively low. > > > With a high amplitude input threshold variations from the nominal > > can cause the input protection diodes to conduct. > > > Once these diodes conduct the output jitter may deteriorate > > significantly (it does for HCMOS inverters). > > > Using a non inverting integrator in the feedback path can > > accurately stabilise the duty cycle. > > > Bruce > > The 74HC and 74AC input threshold tolerance is +/- 30%. This means > the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. > > This limits the maximum input signal to 3V p-p or +13.5dBm, and > leads to a very subtle flaw discovered in some amazing engineering > work by Martein Bakker, PA3AKE. > > If the threshold is not controlled, it can cause AM noise to convert > to PM noise and degrade the jitter. This occurs in the Analog > Devices AD9910 1GHz DDS chip. > > Martein Bakker discovered this in his noise analysis, and Kevin > Wheatly gave a nice entry in his blog on how to fix it: > > http://www.m0khz.com/?p=589 > > Mike > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Fri Apr 3 00:55:04 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 13:55:04 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D55E68.9070004@xtra.co.nz> Mike Its well worthwhile estimating the additional jitter due to this effect when using such a circuit to square up the output of an OCXO: If the input signal characteristics are: Frequency 10MHz Amplitude at the gate input: A = 1.4V pk Threshold mismatch Vt = 1V AM noise: Am = -120dBc/Hz Input signal AM noise bandwidth: BW = 1MHz (eg a low Q bandpass filter). Rms Output jitter due to AM noise is given by delta(t) ~ (1/(2*PI*f))*((Vt/A)/(1 + (Vt/A)*(Vt/A)))*(BW*1)^(Am/20)) i.e. delta(t) ~ 0.5*1.6E-8 *(1E-3) sec ~ 8ps rms. Wideband AM noise as high as -120dBc/Hz is somewhat higher than is typical for a good OCXO. Thus in applications such as a PPS divider this effect is probably insignificant. However it may be useful to use a low Q bandpass filter to limit the integrated AM and PM noise seen at the gate input. Bruce Mike Monett wrote: > > Message: 3 > > Date: Fri, 03 Apr 2009 09:04:59 +1300 > > From: Bruce Griffiths > > Subject: Re: [time-nuts] Frequency Divider > > > Hal Murray wrote: > > >>> A large resistor connected between the input and output would > >>> accommodate threshold variations better. Even better would be a > >>> feedback loop that adjusts the input bias point to maintain the > >>> output duty cycle at 50%. > > >> Isn't that resistor a feedback loop? > > >> I played with that setup in the lab many years ago. It didn't > >> work as well as I was expecting. I didn't figure out why it > >> didn't work better. > > >> Maybe some gain in the feedback path would help. Then we have to > >> consider stability. Ugh. > > > Hal > > > Yes, a resistor connected between the input and output of an > > inverter is a feedback loop but the loop gain is relatively low. > > > With a high amplitude input threshold variations from the nominal > > can cause the input protection diodes to conduct. > > > Once these diodes conduct the output jitter may deteriorate > > significantly (it does for HCMOS inverters). > > > Using a non inverting integrator in the feedback path can > > accurately stabilise the duty cycle. > > > Bruce > > The 74HC and 74AC input threshold tolerance is +/- 30%. This means > the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. > > This limits the maximum input signal to 3V p-p or +13.5dBm, and > leads to a very subtle flaw discovered in some amazing engineering > work by Martein Bakker, PA3AKE. > > If the threshold is not controlled, it can cause AM noise to convert > to PM noise and degrade the jitter. This occurs in the Analog > Devices AD9910 1GHz DDS chip. > > Martein Bakker discovered this in his noise analysis, and Kevin > Wheatly gave a nice entry in his blog on how to fix it: > > http://www.m0khz.com/?p=589 > > Mike > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Fri Apr 3 01:14:35 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 14:14:35 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D55E68.9070004@xtra.co.nz> References: <49D55E68.9070004@xtra.co.nz> Message-ID: <49D562FB.40800@xtra.co.nz> Correction: For those who didn't spot it, the formula should have been: delta(t) ~ (1/(2*PI*f))*((Vt/A)/(1 + (Vt/A)*(Vt/A)))*SQRT(BW)*10^(Am/20)); Bruce Bruce Griffiths wrote: > Mike > > Its well worthwhile estimating the additional jitter due to this effect > when using such a circuit to square up the output of an OCXO: > > If the input signal characteristics are: > > Frequency 10MHz > Amplitude at the gate input: A = 1.4V pk > Threshold mismatch Vt = 1V > AM noise: Am = -120dBc/Hz > Input signal AM noise bandwidth: BW = 1MHz (eg a low Q bandpass filter). > > Rms Output jitter due to AM noise is given by > > delta(t) ~ (1/(2*PI*f))*((Vt/A)/(1 + (Vt/A)*(Vt/A)))*(BW*1)^(Am/20)) > > i.e. > delta(t) ~ 0.5*1.6E-8 *(1E-3) sec > ~ 8ps rms. > > Wideband AM noise as high as -120dBc/Hz is somewhat higher than is > typical for a good OCXO. > > Thus in applications such as a PPS divider this effect is probably > insignificant. > However it may be useful to use a low Q bandpass filter to limit the > integrated AM and PM noise seen at the gate input. > > Bruce > > > Mike Monett wrote: > >> > Message: 3 >> > Date: Fri, 03 Apr 2009 09:04:59 +1300 >> > From: Bruce Griffiths >> > Subject: Re: [time-nuts] Frequency Divider >> >> > Hal Murray wrote: >> >> >>> A large resistor connected between the input and output would >> >>> accommodate threshold variations better. Even better would be a >> >>> feedback loop that adjusts the input bias point to maintain the >> >>> output duty cycle at 50%. >> >> >> Isn't that resistor a feedback loop? >> >> >> I played with that setup in the lab many years ago. It didn't >> >> work as well as I was expecting. I didn't figure out why it >> >> didn't work better. >> >> >> Maybe some gain in the feedback path would help. Then we have to >> >> consider stability. Ugh. >> >> > Hal >> >> > Yes, a resistor connected between the input and output of an >> > inverter is a feedback loop but the loop gain is relatively low. >> >> > With a high amplitude input threshold variations from the nominal >> > can cause the input protection diodes to conduct. >> >> > Once these diodes conduct the output jitter may deteriorate >> > significantly (it does for HCMOS inverters). >> >> > Using a non inverting integrator in the feedback path can >> > accurately stabilise the duty cycle. >> >> > Bruce >> >> The 74HC and 74AC input threshold tolerance is +/- 30%. This means >> the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. >> >> This limits the maximum input signal to 3V p-p or +13.5dBm, and >> leads to a very subtle flaw discovered in some amazing engineering >> work by Martein Bakker, PA3AKE. >> >> If the threshold is not controlled, it can cause AM noise to convert >> to PM noise and degrade the jitter. This occurs in the Analog >> Devices AD9910 1GHz DDS chip. >> >> Martein Bakker discovered this in his noise analysis, and Kevin >> Wheatly gave a nice entry in his blog on how to fix it: >> >> http://www.m0khz.com/?p=589 >> >> Mike >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From xde-l2g3 at myamail.com Fri Apr 3 02:02:29 2009 From: xde-l2g3 at myamail.com (Mike Monett) Date: Thu, 02 Apr 2009 22:02:29 -0400 Subject: [time-nuts] time-nuts Frequency Divider References: Message-ID: > Message: 8 > Date: Fri, 03 Apr 2009 12:28:31 +1300 > From: Bruce Griffiths > Subject: Re: [time-nuts] time-nuts Frequency Divider > Mike > The problem is more accurately described as: > When the bias network dc level at the 74AC04 (or 74HC04) inverter > input isn't equal to the switching threshold of the particular > device then AM modulation on the input signal is converted to > phase noise as switching no longer occurs at the zero crossing of > the input signal. The problem is adequately described in my article. I show the AM/PM conversion in "Fig 3. Threshold Switching", in http://pstca.com/spice/74ac04/limiter.htm > Such behaviour is inherent when using a Schmitt trigger circuit > and it cannot be cured with a feedback circuit that stabilises the > output duty cycle. The 74AC04 and 74HC04 are not Schmitt triggers, and are useful as limiters as discussed here previously. The +/- 30% tolerance on the switching threshold applies to the 74XX04 and pretty much all the CMOS gates and flops as well. It is an inherent problem with matching N and P channel mosfets. However, in any limiter, the duty cycle must be controlled to avoid AM/PM conversion, not just the 74XX series. This problem is solved with the feedback method described in my article. One of the surprises is the circuit is remarkably stable even with huge changes in loop gain. I describe this near the bottom. The 74XX14 is a Schmitt trigger, and it will have unavoidable problems with AM/PM conversion. I mention this in the section, "Cascading 74AC04's For More Gain", about 2/3 of the way down the page: http://pstca.com/spice/74ac04/limiter.htm If the limiter has hysteresis, you can minimize AM/PM conversion on one edge, but not both. > A well designed limiter + filter cascade in front of the > comparator, Schmitt trigger or logic gate can be used to minimise > such AM to PM conversion whilst minimising the output jitter. It doesn't matter what you put in front of the limiter. Adding another one in front just moves the problem further upstream, and adds more phase noise. Unless the switching threshold in the limiter is controlled to set the duty cycle to 50%, you will have problems with AM/PM conversion. Also, it might be desirable to add some voltage trim to compensate for harmonic distortion. > Bruce Mike ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Here is the response to your next post to save time: > Mike > Its well worthwhile estimating the additional jitter due to this > effect when using such a circuit to square up the output of an OCXO: > If the input signal characteristics are: > Frequency 10MHz Amplitude at the gate input: A = 1.4V pk Threshold > mismatch Vt = 1V AM noise: Am = -120dBc/Hz Input signal AM noise > bandwidth: BW = 1MHz (eg a low Q bandpass filter). > Rms Output jitter due to AM noise is given by > delta(t) ~ (1/(2*PI*f))*((Vt/A)/(1 + (Vt/A)*(Vt/A)))*(BW*1)^(Am/20)) > i.e. > delta(t) ~ 0.5*1.6E-8 *(1E-3) sec ~ 8ps rms. > Wideband AM noise as high as -120dBc/Hz is somewhat higher than is > typical for a good OCXO. > Thus in applications such as a PPS divider this effect is probably > insignificant. > However it may be useful to use a low Q bandpass filter to limit the > integrated AM and PM noise seen at the gate input. > Bruce I did not have time to check your math. However, 8ps rms jitter would be unacceptable in many applications. A low Q bandpass filter has been discussed here often. It may not help the jitter until the bandwidth is quite narrow, and it will cause other problems with drift due to aging and tempco. I am unfortunately very busy at the moment, and will not have time to follow this thread further. Mike From cupido at mail.ua.pt Fri Apr 3 02:48:08 2009 From: cupido at mail.ua.pt (Luis Cupido) Date: Fri, 03 Apr 2009 03:48:08 +0100 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D53021.2010200@xtra.co.nz> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> <49D4ADAF.20703@xtra.co.nz> <49D4B2AF.3040300@mail.ua.pt> <49D53021.2010200@xtra.co.nz> Message-ID: <49D578E8.9080006@mail.ua.pt> Bruce, There is a trick... That JTAG interface made with a 74HC244 is powered from the target board, If the target board runs at 5v so it will work at 5v. No doubts here... But if the target runs at 3v3 the 74HC244 gets powered at 3v3 (and it works fine, no need for the target device to be tolerant to anything, it gets within whatever VDD it uses...) and the 74HC244 seems to be tolerant to whatever comes out of the PC LPT port, but has a few series resistors though. Amazingly it even works at 2v5 ! The byteblasterMV from Altera is just like that and it works great, and programs from the small CPLDs up to most of the FPGA's (except for some more recent ones that require someting else... but is not a voltage issue). I'm running one for ages now with zero issues in both 5v chips and 3v3 chips. I even made a byteblasterII (to use on the more recent FPGA's) with the same 74HC244 (adding a few bits to the original byteblasterMV for the additional features required) and it works just fine even with Cyclone devices. Luis Cupido. ct1dmk. Bruce Griffiths wrote: > Luis Cupido wrote: >> >>> The CPLDs are programmed via the JTAG port. >>> Suitable JTAG programming cables are readily availble. >>> >> Or you can build one to use the LPT port of your PC using just a 74HC244. >> >> >> Luis Cupido. >> ct1dmk. >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > Luis > > Using a 74HC244 may be somewhat problematic with CPLDs that don't have > 5V tolerant inputs. > Even when using a device with 5V tolerant inputs a 74HCT244 may be more > suitable for translating LVCMOS logic level outputs from the CPLD. > > Bruce > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From bruce.griffiths at xtra.co.nz Fri Apr 3 03:15:07 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 16:15:07 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D57F3B.7090701@xtra.co.nz> Mike Monett wrote: > > Message: 8 > > Date: Fri, 03 Apr 2009 12:28:31 +1300 > > From: Bruce Griffiths > > Subject: Re: [time-nuts] time-nuts Frequency Divider > > > Mike > > > The problem is more accurately described as: > > > When the bias network dc level at the 74AC04 (or 74HC04) inverter > > input isn't equal to the switching threshold of the particular > > device then AM modulation on the input signal is converted to > > phase noise as switching no longer occurs at the zero crossing of > > the input signal. > > The problem is adequately described in my article. I show the AM/PM > conversion in "Fig 3. Threshold Switching", in > > http://pstca.com/spice/74ac04/limiter.htm > > > Such behaviour is inherent when using a Schmitt trigger circuit > > and it cannot be cured with a feedback circuit that stabilises the > > output duty cycle. > > The 74AC04 and 74HC04 are not Schmitt triggers, and are useful as > limiters as discussed here previously. The +/- 30% tolerance on the > switching threshold applies to the 74XX04 and pretty much all the > CMOS gates and flops as well. It is an inherent problem with > matching N and P channel mosfets. > No one said they were, However a previous post mentioned using schmitt triggers. I was merely pointing out that a feedback duty cycle stabiliser won't eliminate the AM to PM conversion characteristic inherent with a Schmitt trigger device. > However, in any limiter, the duty cycle must be controlled to avoid > AM/PM conversion, not just the 74XX series. This problem is solved > with the feedback method described in my article. > > Which is not necessary if one is using a good OCXO with low AM output noise. Well designed OCXOs tend to have very low AM noise. > One of the surprises is the circuit is remarkably stable even with > huge changes in loop gain. I describe this near the bottom. > > The 74XX14 is a Schmitt trigger, and it will have unavoidable > problems with AM/PM conversion. I mention this in the section, > "Cascading 74AC04's For More Gain", about 2/3 of the way down the > page: > > http://pstca.com/spice/74ac04/limiter.htm > > If the limiter has hysteresis, you can minimize AM/PM conversion on > one edge, but not both. > > > A well designed limiter + filter cascade in front of the > > comparator, Schmitt trigger or logic gate can be used to minimise > > such AM to PM conversion whilst minimising the output jitter. > > It doesn't matter what you put in front of the limiter. Adding > another one in front just moves the problem further upstream, and > adds more phase noise. > > Nonsense, it has been shown (during the 1990's) that if designed correctly (with an appropriate and well defined gain and filter cutoff frequency for each limiter stage) a cascade of limiters and low pass filters works much better than merely cascading a series of limiter stages with ill defined gain either with or without an input threshold stabilisation feedback loop. > Unless the switching threshold in the limiter is controlled to set > the duty cycle to 50%, you will have problems with AM/PM conversion. > Also, it might be desirable to add some voltage trim to compensate > for harmonic distortion. > > > Bruce > > Mike > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > Here is the response to your next post to save time: > > > Mike > > > Its well worthwhile estimating the additional jitter due to this > > effect when using such a circuit to square up the output of an OCXO: > > > If the input signal characteristics are: > > > Frequency 10MHz Amplitude at the gate input: A = 1.4V pk Threshold > > mismatch Vt = 1V AM noise: Am = -120dBc/Hz Input signal AM noise > > bandwidth: BW = 1MHz (eg a low Q bandpass filter). > > > Rms Output jitter due to AM noise is given by > > > delta(t) ~ (1/(2*PI*f))*((Vt/A)/(1 + (Vt/A)*(Vt/A)))*(BW*1)^(Am/20)) > > > i.e. > > > delta(t) ~ 0.5*1.6E-8 *(1E-3) sec ~ 8ps rms. > > > Wideband AM noise as high as -120dBc/Hz is somewhat higher than is > > typical for a good OCXO. > > > Thus in applications such as a PPS divider this effect is probably > > insignificant. > > > However it may be useful to use a low Q bandpass filter to limit the > > integrated AM and PM noise seen at the gate input. > > > Bruce > > I did not have time to check your math. However, 8ps rms jitter > would be unacceptable in many applications. > > In practice it will be much smaller than that with a good OCXO. When using a divider to compare the frequency of an OCXO with the PPS output of a GPS timing receiver a jitter of 8ps is insignificant. If one uses a typical CPLD or FPGA to implement a divider without any external retiming flipflops the typical output jitter is much larger than 8ps. A CPLD or FPGA with LVDS outputs and inputs may have somewhat lower jitter. > A low Q bandpass filter has been discussed here often. It may not > help the jitter until the bandwidth is quite narrow, and it will > cause other problems with drift due to aging and tempco. > The effectiveness of the filter depends on the AM (and PM )noise spectrum, if this is very broad then even a low Q bandpass filter will help. With a good OCXO the broadband AM (and PM) noise is low and filtering isnt usually required. > I am unfortunately very busy at the moment, and will not have time > to follow this thread further. > > Mike > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Fri Apr 3 04:20:12 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 17:20:12 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D578E8.9080006@mail.ua.pt> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> <49D4ADAF.20703@xtra.co.nz> <49D4B2AF.3040300@mail.ua.pt> <49D53021.2010200@xtra.co.nz> <49D578E8.9080006@mail.ua.pt> Message-ID: <49D58E7C.30505@xtra.co.nz> Luis Luis Cupido wrote: > Bruce, > > There is a trick... > That JTAG interface made with a 74HC244 is > powered from the target board, > If the target board runs at 5v so it will work > at 5v. No doubts here... > > But if the target runs at 3v3 the 74HC244 gets powered > at 3v3 (and it works fine, no need for the target > device to be tolerant to anything, it gets within > whatever VDD it uses...) > and the 74HC244 seems to be tolerant to whatever comes > out of the PC LPT port, but has a few series resistors though. > > The current flowing in the input protection diodes of the 74HC244 needs to be limited to protect both the 74NC244 and the driving device in the PC. The potential increased jitter when current flows in the protection diodes isn't significant here. > Amazingly it even works at 2v5 ! > > Since 74HC244 is specified to work with power supply range of 2V to 6V that isn't too surprising as long as the ~ 4x increase in propagation delay when going from a 5V supply to a 2.5V supply is acceptable. With a power supply below 2.5V the 74HC244 output swing wont meet the upper TTL threshold of the parallel port input, > The byteblasterMV from Altera is just like that and it > works great, and programs from the small CPLDs up to > most of the FPGA's (except for some more recent ones that > require someting else... but is not a voltage issue). > > I'm running one for ages now with zero issues in both > 5v chips and 3v3 chips. > > I even made a byteblasterII (to use on the more recent FPGA's) > with the same 74HC244 (adding a few bits to the > original byteblasterMV for the additional features required) > and it works just fine even with Cyclone devices. > > Luis Cupido. > ct1dmk. > > > > Bruce Griffiths wrote: > >> Luis Cupido wrote: >> >>> >>> >>>> The CPLDs are programmed via the JTAG port. >>>> Suitable JTAG programming cables are readily availble. >>>> >>>> >>> Or you can build one to use the LPT port of your PC using just a 74HC244. >>> >>> >>> Luis Cupido. >>> ct1dmk. >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> Luis >> >> Using a 74HC244 may be somewhat problematic with CPLDs that don't have >> 5V tolerant inputs. >> Even when using a device with 5V tolerant inputs a 74HCT244 may be more >> suitable for translating LVCMOS logic level outputs from the CPLD. >> >> Bruce >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Bruce From ed_palmer at sasktel.net Fri Apr 3 06:51:42 2009 From: ed_palmer at sasktel.net (Ed Palmer) Date: Fri, 03 Apr 2009 00:51:42 -0600 Subject: [time-nuts] External Frequency Standard Inputs on Counters Message-ID: <49D5B1FE.8020803@sasktel.net> I see that on many counters (e.g. SR620, HP 5370, HP 5372) the external frequency standard input has an impedance of 1Kohm. Why such a high value? Are they implying that it's acceptable to daisy-chain a single reference to multiple devices like an old 10Base2 ethernet network? Should such a link be terminated in 50 ohms like a 10Base2 network? Ed From magnus at rubidium.dyndns.org Fri Apr 3 07:16:14 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 09:16:14 +0200 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D5B1FE.8020803@sasktel.net> References: <49D5B1FE.8020803@sasktel.net> Message-ID: <49D5B7BE.8050700@rubidium.dyndns.org> Ed Palmer skrev: > I see that on many counters (e.g. SR620, HP 5370, HP 5372) the external > frequency standard input has an impedance of 1Kohm. Why such a high > value? Are they implying that it's acceptable to daisy-chain a single > reference to multiple devices like an old 10Base2 ethernet network? You can do that. If you have a larger setup you can avoid a distribution amplifier, but having one provides you with the isolation that hubs to for basically the same reason. > Should such a link be terminated in 50 ohms like a 10Base2 network? Yes. Cheers, Magnus From magnus at rubidium.dyndns.org Fri Apr 3 07:32:02 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 09:32:02 +0200 Subject: [time-nuts] Frequency Divider In-Reply-To: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> References: <20090402091000.506D3BCE2@ip-64-139-1-69.sjc.megapath.net> Message-ID: <49D5BB72.8050900@rubidium.dyndns.org> Hal Murray skrev: >> Start with a buffer amp and then a decent Schmidt trigger. > > If you have a clean input signal, a Schmitt trigger doesn't solve any > problems. It does help if you have a slowly rising signal such that noise > might be significant while the signal is near threshold. A 10 MHz sine wave > is slow relative to AC logic. > > Since we were recently speaking of LPROs, their user manual has a section on > how to convert 10 MHz sine waves into TTL signals. None of their suggestions > used Schmitt triggers. Schmitt triggers seems to be misunderstood by many. They do NOT magically solve all issues with noise in the correct way. It seems strange that one actually has to say that, but it seems to be a widely accepted fact that if one uses a schmitt trigger one is doing the right thing. The answer is really maybe, it depends. There are many things where it is just what should be used. For trigger signals where jitter may be of concern you can do better. If the signal first hits a Schmitt trigger, then the noise will modulate the trigger point with the achieved slope at that stage, and no further processing will improve on that but a full sufficiently narrow bandwidth PLL. If instead the slope was linearly amplified to increase the slew rate at the desired trigger voltage, then a much lower trigger jitter can be achived. Anyone following the conversations of Bruce and myself should recognise this as a reoccurring thing. > This feels like the sort of thing that should have been hashed out here by > now. Is it time to start a FAQ? Bruce already has a bit of useful information, TvB certainly has, along side of several other good members. Besides, folks here is very helpful and eager to help a fellow time-nut. We also have archives. > My straw man would be to capacitive couple into a 74AC00 that's biased > halfway between VCC and GND. That's clean and simple. A transformer would > break ground loops. A differential input chip might reduce jitter from noise > on the power supply. You can use self-biasing unbuffered CMOS inverters such as 4069UB as a first stage amplifier and then use a few more in sequence to achieve further gain. This trick have been used before and while certainly not optimum it could be a useful little trick for simple single-chip solutions where no major performance is expected. Hmm... I should actually measure that one... >> Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical >> dive by 10 for 1 Mhz. >> It seems the crowd is against 7490s, and 74390s - and I would like to >> know what the crowd recommends as suitable. > > Dividing by 10 is simple. Doing it with symmetrical output takes a bit > more/different logic than comes prepackaged in a single DIP, or at least not > any that I'm familiar with. > > Plan A would use a 4 bit loadable counter and load it with 3 when it reads 12 > so the top bit would be off for 5 cycles, 3 through 7, then on for 5 cycles, > 8 through 12. That's reasonable to implement in old TTL DIPs. 12 is easy to > decode, just a 2 input gate since states 13-15 won't happen. 74xx163 and > 74xx00 The problem with the '90 is really that the output is not properly synchronised. A half '74 solves that problem. The '90 is doing the needed state-change, the '74 does the needed clock alignment. > Plan B would be to use a PAL or CPLD. I don't know of any that are available > in DIP, have free design software, and are easy to program without a fancy > programmer. There could easily be something I don't know about. I know that > Xilinx CPLDs have free software (WebPACK) but they don't come in DIP. A > friend has written software to program them, but he's a wizard so I don't > know if mortals could do it. WebPACK may do the programming if you have a > gizmo. One is available at a reasonable price from Digilent. > > This technology is too handy. There is probably some hobbyist friendly setup > out there. You may have to build a programmer. The parallel port adapter is soooo easy. Infact you will find the schematic of Xilinx dongle on their web. The JTAG variant is however not so simple... Cheers, Magnus From df6jb at ulrich-bangert.de Fri Apr 3 07:34:15 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Fri, 3 Apr 2009 09:34:15 +0200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D54A1F.9080005@xtra.co.nz> Message-ID: Bruce, > The problem is more accurately described as: > When the bias network dc level at the 74AC04 (or 74HC04) > inverter input isn't equal to the switching threshold of the > particular device then AM modulation on the input signal is > converted to phase noise as switching no longer occurs at the > zero crossing of the input signal. Such behaviour is inherent > when using a Schmitt trigger circuit and it cannot be cured > with a feedback circuit that stabilises the output duty cycle. In order to generate stable and low noise signals on the 10 GHz microwave band it is common among radio amateurs to multiply the signal of a 106.5 MHx xtal oscillator by 96. Clearly the oscillator's phase noise should be as low as possible due to the multiplication process. If high stability is needed, the 106.5 MHz has to be phase locked to a 10 MHz reference. In "UKW Berichte 4/2003" (VHF Communications) Andre Jamet, F9HX, and Gil Feraud, F5CAU, decribe a circuit in which a 106,5 MHz signal is directly synthesized out of a 10 MHz reference by multiplication, division and addition. With respect to the requested low phase noise at it's output it is interesting to inspect what they use for sine to ttl translation inside. Much to my surprise they use the self-biasing input of phase comparator II of an ordinary 74HCT4046 (with everything else of the pll disabled) for this purpose. I have since then made some experiments on my own which indicate that the 74HC(T)4046 works really good as a sine to ttl translator. For a quick test I use this: A SR620 is started by it's internal 1kHz reference and stopped by the signal under test. Then I let the counter compute the AD over 1000 samples or so. Say I get a reading of X with the reference sine connected to the stop input I get X+Y with the sine to ttl translator inserted after the reference with most if not all circuits that I tried before. However, with a 4046 based sine to ttl translator I get a result of X-Y (!). No no, I am not going to claim that the circuit "improves" the reference's phase noise. I just would like to draw your attention to the fact that the ouput of a sine to ttl translator is influenced by the jitter inherent in the used logic family AND the trigger noise to appear at the translation process at the input. In this sense I would judge the X-Y result so that the 4046's trigger noise @ 10 MHz is better than that of the SR620's trigger circuitry. Best reagrds Ulrich > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bruce Griffiths > Gesendet: Freitag, 3. April 2009 01:29 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] time-nuts Frequency Divider > > > Mike > > The problem is more accurately described as: > When the bias network dc level at the 74AC04 (or 74HC04) > inverter input isn't equal to the switching threshold of the > particular device then AM modulation on the input signal is > converted to phase noise as switching no longer occurs at the > zero crossing of the input signal. Such behaviour is inherent > when using a Schmitt trigger circuit and it cannot be cured > with a feedback circuit that stabilises the output duty cycle. > > A well designed limiter + filter cascade in front of the > comparator, Schmitt trigger or logic gate can be used to > minimise such AM to PM conversion whilst minimising the output jitter. > > Bruce > > Mike Monett wrote: > > > Message: 3 > > > Date: Fri, 03 Apr 2009 09:04:59 +1300 > > > From: Bruce Griffiths > > > Subject: Re: [time-nuts] Frequency Divider > > > > > Hal Murray wrote: > > > > >>> A large resistor connected between the input and > output would > > >>> accommodate threshold variations better. Even better > would be a > > >>> feedback loop that adjusts the input bias point to > maintain the > > >>> output duty cycle at 50%. > > > > >> Isn't that resistor a feedback loop? > > > > >> I played with that setup in the lab many years ago. > It didn't > > >> work as well as I was expecting. I didn't figure > out why it > > >> didn't work better. > > > > >> Maybe some gain in the feedback path would help. Then > we have to > > >> consider stability. Ugh. > > > > > Hal > > > > > Yes, a resistor connected between the input and > output of an > > > inverter is a feedback loop but the loop gain is relatively low. > > > > > With a high amplitude input threshold variations from > the nominal > > > can cause the input protection diodes to conduct. > > > > > Once these diodes conduct the output jitter may > deteriorate > > > significantly (it does for HCMOS inverters). > > > > > Using a non inverting integrator in the > feedback path can > > > accurately stabilise the duty cycle. > > > > > Bruce > > > > The 74HC and 74AC input threshold tolerance is +/- 30%. > This means > > the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. > > > > This limits the maximum input signal to 3V p-p or > +13.5dBm, and > > leads to a very subtle flaw discovered in some amazing > engineering > > work by Martein Bakker, PA3AKE. > > > > If the threshold is not controlled, it can cause AM noise > to convert > > to PM noise and degrade the jitter. This occurs in > the Analog > > Devices AD9910 1GHz DDS chip. > > > > Martein Bakker discovered this in his noise analysis, > and Kevin > > Wheatly gave a nice entry in his blog on how to fix it: > > > > http://www.m0khz.com/?p=589 > > > > Mike > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From df6jb at ulrich-bangert.de Fri Apr 3 07:34:15 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Fri, 3 Apr 2009 09:34:15 +0200 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D53021.2010200@xtra.co.nz> Message-ID: Bruce and Luis, > Using a 74HC244 may be somewhat problematic with CPLDs that > don't have 5V tolerant inputs. Even when using a device with > 5V tolerant inputs a 74HCT244 may be more suitable for > translating LVCMOS logic level outputs from the CPLD. One chip that works very well for TDI/TMS/TCK translation from the printer port into the cpld is the 74AHC125 with its VCC connected to the cpld's VCC. This one can work with VCC as low as 2.0 V and is still 5 V tolerant on all inputs. At least with 3.3 cplds it's output swing is high enough for TDO back-translation. With 2.5 / 1.8 V cplds a separate TDO back-translation may become necessary. Best regards Ulrich > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bruce Griffiths > Gesendet: Donnerstag, 2. April 2009 23:38 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] Frequency Divider > > > Luis Cupido wrote: > > > > > >> The CPLDs are programmed via the JTAG port. > >> Suitable JTAG programming cables are readily availble. > >> > > > > Or you can build one to use the LPT port of your PC using just a > > 74HC244. > > > > > > Luis Cupido. > > ct1dmk. > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > Luis > > Using a 74HC244 may be somewhat problematic with CPLDs that > don't have 5V tolerant inputs. Even when using a device with > 5V tolerant inputs a 74HCT244 may be more suitable for > translating LVCMOS logic level outputs from the CPLD. > > Bruce > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From magnus at rubidium.dyndns.org Fri Apr 3 07:44:06 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 09:44:06 +0200 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D5227E.60707@xtra.co.nz> References: <20090402200641.21009BCE2@ip-64-139-1-69.sjc.megapath.net> <49D5227E.60707@xtra.co.nz> Message-ID: <49D5BE46.6070700@rubidium.dyndns.org> Bruce Griffiths skrev: > Hal > > Hal Murray wrote: >>> JPL have used ECL dividers throughout to produce 10MHz, 1MHz and >>> 100KHz outputs from the 100MHz signal derived from a Hydrogen maser: >>> http://tmo.jpl.nasa.gov/progress_report2/42-30/30I.PDF >>> >> We've been discussion converting sine to TTL. JPL seems to be distributing >> ECL rather than sine. >> >> This seems like more bait for a FAQ. >> >> What are the (dis)advantages of using ECL or TTL vs sine for distribution? >> (I'm assuming "TTL" covers HC/AHC and 3V CMOS levels too.) >> >> > > CMOS dividers are supposed to have a lower phase noise floor than ECL > dividers but the measurements in the literature are poorly specified. > Comparing a CMOS divider with at 20MHz input with an ECL divider with a > 200MHz input probably isnt very helpful. CMOS is moving fast. Using old measurements may not indicate anything meaningful of today with modern devices. CMOS is also not as homogenic as one may first believe since there exists various tricks to speed CMOS up in especially clocked environments. CMOS is nothing but a collective name these days rather than a very particular technique as it once where, if ever. Cheers, Magnus From bruce.griffiths at xtra.co.nz Fri Apr 3 10:49:28 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Fri, 03 Apr 2009 23:49:28 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D5E9B8.9030108@xtra.co.nz> Ulrich Your experience with the SR620 illustrates the point I was making quite well. It really does matter what you do in front of the limiter circuit built into the counter. A bandpass or any other filter by itself is ineffective unless the signal is exceptionally noisy. By using the inverter in the 74HCT4046 you have added a low gain limiter stage the bandwidth of which is smaller than that of the SR620 input circuit. This has the effect of increasing the slew rate of the input signal whilst producing an output with less jitter than the SR620 input circuit would without this low pass filtered limiter circuit (the inverter from the 74HCT4046). The slew rate at the 74HCT4046 inverter output is greater than that of the input signal which means that the jitter due the counter input circuit noise is smaller than when this low gain low bandwidth limiter isn't used. The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz assuming a single pole response with a 300MHz 3dB high frequency cutoff) and a correspondingly high total input noise (~350uV rms). If the slew rate of the SR 620 input signal at the trigger point the jitter due to this noise dominates the trigger circuit output jitter. The HP5370 time interval counter input circuit has a lower noise bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 limiter) for the same 10MHz signal should be less than that of the SR620 (without the 74HCT4046 limiter). If one uses a state of the art trigger circuit with a noise bandwidth of 1GHz or more then the total input noise will be even larger so it becomes even more important to use an optimised cascade of limiter+ low output pass filter stages to increase the slew rate of the counter input trigger circuit at the trigger threshold. Careful optimisation of the gain of each stage and the corresponding output filter cutoff frequency for each stage is necessary to minimise the output jitter of the counter trigger circuit. There is also an optimum number of such stages that minimises the trigger jitter. The optimisation problem for Limiter stages with gaussian wideband input noise was solved in the 1990's. Unfortunately the optimum number of stages, associated gains and output filter bandwidths depends on the input signal frequency and amplitude so that in general it isn't possible to use the same limiter cascade for a wide range of signal amplitudes and frequencies and minimise the jitter for each frequency and amplitude. Thus such circuits aren't usually employed in general purpose frequency counters. However if the input signal frequency and amplitude are known and stable then using such a limiter filter cascade is feasible. Bruce Ulrich Bangert wrote: > Bruce, > > >> The problem is more accurately described as: >> When the bias network dc level at the 74AC04 (or 74HC04) >> inverter input isn't equal to the switching threshold of the >> particular device then AM modulation on the input signal is >> converted to phase noise as switching no longer occurs at the >> zero crossing of the input signal. Such behaviour is inherent >> when using a Schmitt trigger circuit and it cannot be cured >> with a feedback circuit that stabilises the output duty cycle. >> > > In order to generate stable and low noise signals on the 10 GHz microwave > band it is common among radio amateurs to multiply the signal of a 106.5 MHx > xtal oscillator by 96. Clearly the oscillator's phase noise should be as low > as possible due to the multiplication process. If high stability is needed, > the 106.5 MHz has to be phase locked to a 10 MHz reference. > > In "UKW Berichte 4/2003" (VHF Communications) Andre Jamet, F9HX, and Gil > Feraud, F5CAU, decribe a circuit in which a 106,5 MHz signal is directly > synthesized out of a 10 MHz reference by multiplication, division and > addition. With respect to the requested low phase noise at it's output it is > interesting to inspect what they use for sine to ttl translation inside. > Much to my surprise they use the self-biasing input of phase comparator II > of an ordinary 74HCT4046 (with everything else of the pll disabled) for this > purpose. > > I have since then made some experiments on my own which indicate that the > 74HC(T)4046 works really good as a sine to ttl translator. For a quick test > I use this: A SR620 is started by it's internal 1kHz reference and stopped > by the signal under test. Then I let the counter compute the AD over 1000 > samples or so. Say I get a reading of X with the reference sine connected to > the stop input I get X+Y with the sine to ttl translator inserted after the > reference with most if not all circuits that I tried before. However, with a > 4046 based sine to ttl translator I get a result of X-Y (!). > > No no, I am not going to claim that the circuit "improves" the reference's > phase noise. I just would like to draw your attention to the fact that the > ouput of a sine to ttl translator is influenced by the jitter inherent in > the used logic family AND the trigger noise to appear at the translation > process at the input. In this sense I would judge the X-Y result so that the > 4046's trigger noise @ 10 MHz is better than that of the SR620's trigger > circuitry. > > Best reagrds > Ulrich > > > >> -----Ursprungliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bruce Griffiths >> Gesendet: Freitag, 3. April 2009 01:29 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] time-nuts Frequency Divider >> >> >> Mike >> >> The problem is more accurately described as: >> When the bias network dc level at the 74AC04 (or 74HC04) >> inverter input isn't equal to the switching threshold of the >> particular device then AM modulation on the input signal is >> converted to phase noise as switching no longer occurs at the >> zero crossing of the input signal. Such behaviour is inherent >> when using a Schmitt trigger circuit and it cannot be cured >> with a feedback circuit that stabilises the output duty cycle. >> >> A well designed limiter + filter cascade in front of the >> comparator, Schmitt trigger or logic gate can be used to >> minimise such AM to PM conversion whilst minimising the output jitter. >> >> Bruce >> >> Mike Monett wrote: >> >>> > Message: 3 >>> > Date: Fri, 03 Apr 2009 09:04:59 +1300 >>> > From: Bruce Griffiths >>> > Subject: Re: [time-nuts] Frequency Divider >>> >>> > Hal Murray wrote: >>> >>> >>> A large resistor connected between the input and >>> >> output would >> >>> >>> accommodate threshold variations better. Even better >>> >> would be a >> >>> >>> feedback loop that adjusts the input bias point to >>> >> maintain the >> >>> >>> output duty cycle at 50%. >>> >>> >> Isn't that resistor a feedback loop? >>> >>> >> I played with that setup in the lab many years ago. >>> >> It didn't >> >>> >> work as well as I was expecting. I didn't figure >>> >> out why it >> >>> >> didn't work better. >>> >>> >> Maybe some gain in the feedback path would help. Then >>> >> we have to >> >>> >> consider stability. Ugh. >>> >>> > Hal >>> >>> > Yes, a resistor connected between the input and >>> >> output of an >> >>> > inverter is a feedback loop but the loop gain is relatively low. >>> >>> > With a high amplitude input threshold variations from >>> >> the nominal >> >>> > can cause the input protection diodes to conduct. >>> >>> > Once these diodes conduct the output jitter may >>> >> deteriorate >> >>> > significantly (it does for HCMOS inverters). >>> >>> > Using a non inverting integrator in the >>> >> feedback path can >> >>> > accurately stabilise the duty cycle. >>> >>> > Bruce >>> >>> The 74HC and 74AC input threshold tolerance is +/- 30%. >>> >> This means >> >>> the threshold can vary from 1.5V to 3.5V with a Vcc of 5V. >>> >>> This limits the maximum input signal to 3V p-p or >>> >> +13.5dBm, and >> >>> leads to a very subtle flaw discovered in some amazing >>> >> engineering >> >>> work by Martein Bakker, PA3AKE. >>> >>> If the threshold is not controlled, it can cause AM noise >>> >> to convert >> >>> to PM noise and degrade the jitter. This occurs in >>> >> the Analog >> >>> Devices AD9910 1GHz DDS chip. >>> >>> Martein Bakker discovered this in his noise analysis, >>> >> and Kevin >> >>> Wheatly gave a nice entry in his blog on how to fix it: >>> >>> http://www.m0khz.com/?p=589 >>> >>> Mike >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Fri Apr 3 11:01:49 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 00:01:49 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: References: Message-ID: <49D5EC9D.2080804@xtra.co.nz> Ulrich An open drain output buffer with a resistor pullup (and an drain voltage rating of 5V or more ) would be ideal for the TDO level translator for 2.5V or 1.8V CPDs or FPGAs. The open drain output could then be buffered by 1/4 74HC125 or similar buffer with a 3.3V or 5V supply. Bruce Ulrich Bangert wrote: > Bruce and Luis, > > >> Using a 74HC244 may be somewhat problematic with CPLDs that >> don't have 5V tolerant inputs. Even when using a device with >> 5V tolerant inputs a 74HCT244 may be more suitable for >> translating LVCMOS logic level outputs from the CPLD. >> > > One chip that works very well for TDI/TMS/TCK translation from the printer > port into the cpld is the 74AHC125 with its VCC connected to the cpld's VCC. > This one can work with VCC as low as 2.0 V and is still 5 V tolerant on all > inputs. At least with 3.3 cplds it's output swing is high enough for TDO > back-translation. With 2.5 / 1.8 V cplds a separate TDO back-translation may > become necessary. > > Best regards > Ulrich > > >> -----Ursprungliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Bruce Griffiths >> Gesendet: Donnerstag, 2. April 2009 23:38 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] Frequency Divider >> >> >> Luis Cupido wrote: >> >>> >>> >>>> The CPLDs are programmed via the JTAG port. >>>> Suitable JTAG programming cables are readily availble. >>>> >>>> >>> Or you can build one to use the LPT port of your PC using just a >>> 74HC244. >>> >>> >>> Luis Cupido. >>> ct1dmk. >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> Luis >> >> Using a 74HC244 may be somewhat problematic with CPLDs that >> don't have 5V tolerant inputs. Even when using a device with >> 5V tolerant inputs a 74HCT244 may be more suitable for >> translating LVCMOS logic level outputs from the CPLD. >> >> Bruce >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Fri Apr 3 11:34:50 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 00:34:50 +1300 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D5EC9D.2080804@xtra.co.nz> References: <49D5EC9D.2080804@xtra.co.nz> Message-ID: <49D5F45A.20500@xtra.co.nz> Since a good OCXO may have an AM noise floor well below -170dBc/Hz the resultant output jitter due to AM noise using the amplitude, frequency, bandwidth and threshold offset of my previous example would be 80fs rms or less. Now unless one uses a logic family with sub 250ps intrinsic jitter the effect of AM to PM conversion in this case is insignificant. Even if one found such a logic family the threshold mismatch of such a logic is likely to be much smaller than 1V further reducing the jitter due to AM to PM conversion via the threshold mismatch. Bruce From david.partridge at dsl.pipex.com Fri Apr 3 11:58:35 2009 From: david.partridge at dsl.pipex.com (David C. Partridge) Date: Fri, 3 Apr 2009 12:58:35 +0100 Subject: [time-nuts] Frequency Divider In-Reply-To: <49D42029.3000304@gmail.com> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz><49D3F998.5080009@febo.com> <49D42029.3000304@gmail.com> Message-ID: <9071A73A7CA64003AAFDE2BC4F246342@APOLLO> That's what the board I did last year does, 10 MHz sine in, and 5V p-p square wave out at 10MHz, 5MHz, 1MHz and one additional output with frequency selectable by decade from 100kHz down to 1Hz. Dave -----Original Message----- From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of Brian Kirby Sent: 02 April 2009 03:17 To: Discussion of precise time and frequency measurement Subject: [time-nuts] Frequency Divider Maybe we all could come up with a separate new board to take 10 Mhz and give us 5 Mhz and 1 Mhz out. Start with a buffer amp and then a decent Schmidt trigger. Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 Mhz. These out puts could be buffered with 74AC04 for TTL. Another set of outputs could be derived and filtered to give sine wave outputs. It seems the crowd is against 7490s, and 74390s - and I would like to know what the crowd recommends as suitable. Brian KD4FM John Ackermann N8UR wrote: > Hi Bruce -- > > Good point; I'll leave it to the software guys to figure that out. :-) > > John > ---- > > Br > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From david.partridge at dsl.pipex.com Fri Apr 3 12:03:23 2009 From: david.partridge at dsl.pipex.com (David C. Partridge) Date: Fri, 3 Apr 2009 13:03:23 +0100 Subject: [time-nuts] Frequency Divider In-Reply-To: <9071A73A7CA64003AAFDE2BC4F246342@APOLLO> References: <002c01c9b312$118fa6a0$0601a8c0@delldesktop> <49D3E31E.4090906@febo.com> <49D3E67A.6010509@xtra.co.nz><49D3F998.5080009@febo.com><49D42029.3000304@gmail.com> <9071A73A7CA64003AAFDE2BC4F246342@APOLLO> Message-ID: <54998AD60406479D9A435ACAD8AD09D3@APOLLO> Except it's not a Schmidt trigger at the input, it's a MAX999 or ADCMP600 - see Bruce's page on Didier's web site for the basic design of this part of the circuit. D. -----Original Message----- From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of David C. Partridge Sent: 03 April 2009 12:59 To: 'Discussion of precise time and frequency measurement' Subject: Re: [time-nuts] Frequency Divider That's what the board I did last year does, 10 MHz sine in, and 5V p-p square wave out at 10MHz, 5MHz, 1MHz and one additional output with frequency selectable by decade from 100kHz down to 1Hz. Dave -----Original Message----- From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of Brian Kirby Sent: 02 April 2009 03:17 To: Discussion of precise time and frequency measurement Subject: [time-nuts] Frequency Divider Maybe we all could come up with a separate new board to take 10 Mhz and give us 5 Mhz and 1 Mhz out. Start with a buffer amp and then a decent Schmidt trigger. Feed it to a symmetrical divide by 2 for 5 Mhz, and a symmetrical dive by 10 for 1 Mhz. These out puts could be buffered with 74AC04 for TTL. Another set of outputs could be derived and filtered to give sine wave outputs. It seems the crowd is against 7490s, and 74390s - and I would like to know what the crowd recommends as suitable. Brian KD4FM John Ackermann N8UR wrote: > Hi Bruce -- > > Good point; I'll leave it to the software guys to figure that out. :-) > > John > ---- > > Br > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From jra at febo.com Fri Apr 3 12:07:52 2009 From: jra at febo.com (John Ackermann N8UR) Date: Fri, 03 Apr 2009 08:07:52 -0400 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D5B1FE.8020803@sasktel.net> References: <49D5B1FE.8020803@sasktel.net> Message-ID: <49D5FC18.60002@febo.com> I think you guessed it, Ed. There are a number of applications where you want to drive at least two devices from the same reference so using a moderate input impedance facilitates that. I've done some goofy things like trying to drive 3 or more 5334A counters or 3586C VLF receivers from a single reference. My feeling as a result is that you can safely daisychain two devices, but three may be tricky. Ideally, you should terminate the end of the chain with 50 ohms, but depending on the drive level you might not be able to get away with that. John ---- Ed Palmer wrote: > I see that on many counters (e.g. SR620, HP 5370, HP 5372) the external > frequency standard input has an impedance of 1Kohm. Why such a high > value? Are they implying that it's acceptable to daisy-chain a single > reference to multiple devices like an old 10Base2 ethernet network? > Should such a link be terminated in 50 ohms like a 10Base2 network? > > Ed > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From dk4xp at hoffmann-hochfrequenz.de Fri Apr 3 12:25:21 2009 From: dk4xp at hoffmann-hochfrequenz.de (Gerhard Hoffmann) Date: Fri, 03 Apr 2009 14:25:21 +0200 Subject: [time-nuts] homebrew 13 dBm distribution amplifier based on NIST design 5 to 100 MHz In-Reply-To: <1fkdd4p9jpu3f6sn7qmchc7n8ft7j0gaph@4ax.com> References: <1fkdd4p9jpu3f6sn7qmchc7n8ft7j0gaph@4ax.com> Message-ID: <400ct4hknngm4uleuhpchtt1tthq5mk9g0@4ax.com> On Mon, 22 Sep 2008 01:01:31 +0200, you wrote: >after reading "A low noise 100 MHz distribution amplifier for precision metrology" >by M. Siccardi, S. R?misch, F. W. Walls, and A. De Marchi (NIST), >I have implemented a homebrew version of their design. > >Circuits, simulation & measurement data are contained in: I have done a new revision of the distribution amplifier. It has now 6 + 1 channels on a double EuroCard (usual VME bus size) http://www.bilder-hochladen.net/files/9hqp-5-jpg.html I got first silicon^W^W^W epoxy a few days ago, the board is not yet completely populated, but channel 1 works already as expected. I will characterize it after the easter holidays. The circuit is essentially the LT-spice circuit that I have published already. There are no transformers / ferrites in the signal path, so the amplifier should be immune to modulation from transformer or fan magnetic fields. Output power is > 13 dBm. The 7th channel is for cascading or for feeding that 1pps generator. There is also a new low noise preamplifier for phase noise measurements and inspecting noise behaviour of voltage references and such. http://www.bilder-hochladen.net/files/9hqp-6-jpg.html Stages are 3 pairs of SSM2210, cascode, AD797, AD797 and an Opa2132 for *1 Gain and offset regulation. Gain is *1 for phase detector calibration & 60 & 80 dB. Can be made smaller if wanted. The *1 output is always available and DC coupled if needed for VCXO locking. Bandwidth is >1 MHz completely flat with any gain setting. lower BW corner is abt 0.5Hz or DC if the offset loop is defeated(but switching this off makes only sense for lower gains). Noise is the expected 700 pV/sqrtHz. The high gain path can absorb upto 20 mV offset as it is currently dimensioned. All interesting I/O points are on a 100 mil grid, so the amplifier can be used as a "macro" on predrilled board (like Vero Powerplane (r)) if the shielding is to be done for the whole assembly. All switching is performed with gettered bistable relays. Monostable relays had too much power dissipation, messing up the offset when switched on or off. It's fun when your scope setting reads 200 nV / div and you still have a meaningful display, at least for small bandwidth. regards, Gerhard From jim77742 at gmail.com Fri Apr 3 13:59:35 2009 From: jim77742 at gmail.com (Jim Palfreyman) Date: Sat, 4 Apr 2009 00:59:35 +1100 Subject: [time-nuts] 100 hours of astronomy Message-ID: Hi Folks, Blatant advertising spam here. I'm on the 100 hours of astronomy webcast. I will be broadcasting from the University of Tasmania's radio telescope in Australia. It begins at 0100 UT. I'll be briefly discussing my pulsar observations. Go to http://100hoursofastronomy.org/ to check it out. Regards, Jim From cdelect at juno.com Fri Apr 3 16:21:26 2009 From: cdelect at juno.com (Corby Dawson) Date: Fri, 3 Apr 2009 09:21:26 -0700 Subject: [time-nuts] HP 5062C on eBay Message-ID: <20090403.092127.2340.2.cdelect@juno.com> There is another 5062C on eBay from the same source as the last one. Corby Dawson ____________________________________________________________ Faster loans with less paperwork. Compare rates. Click to find the right loan. http://thirdpartyoffers.juno.com/TGL2141/fc/BLSrjpTIrTo8ci9jT1JAj2ebvhCQcBjsj0mgjb38zl0NvwjlvavWtuA1zN2/ From tvb at LeapSecond.com Fri Apr 3 16:40:00 2009 From: tvb at LeapSecond.com (Tom Van Baak) Date: Fri, 3 Apr 2009 09:40:00 -0700 Subject: [time-nuts] Datum / Efratom LPRO 101 - ebay References: <3eb99ee60904021427p3372b53w465a107430562b14@mail.gmail.com> Message-ID: <69307BEBB42A4681BBFD976922FB8497@pc52> Hi Bob, Usually what eBay sellers do is provide a URL reference *link* to my site; rather than a full *copy* of all the text and images into their eBay item description. It's not that big a problem, really. I don't "copyright" web pages or email postings and couldn't enforce it worldwide even if I did. What we want to prevent is an eBay seller giving the impression that the particular item being sold somehow exactly matches the plots included in the item description or that the overseas item being offered for sale has somehow been personally tested by me. You've done a good job supplying low cost surplus gear to the amateur community. You'll often find that the more honest you are with the eBay item description the greater the trust gained. Showing the actual results of your LPRO tests is one thing; but showing the results of my tests as if they were one your tests maybe crosses the line. While we're on this subject, just where do all these surplus LPRO rubidium oscillators come from? If they are old cell towers, what timing equipment is replacing them? Thanks, /tvb ----- Original Message ----- From: "bbobb mokai" To: Sent: Thursday, April 02, 2009 2:27 PM Subject: Re: [time-nuts] Datum / Efratom LPRO 101 - ebay > hi,i am fluke.l. About Mr.TVB's photos on my ebay listings.sorry for > these surprise. > if Tom ask me for any copyright problem,i will remove them.i think,tom has > deal with me twice in last early year ,he also have no ask me to removed > them. > Regards > Bob From w1ksz at earthlink.net Fri Apr 3 16:58:09 2009 From: w1ksz at earthlink.net (Richard W. Solomon) Date: Fri, 3 Apr 2009 12:58:09 -0400 (EDT) Subject: [time-nuts] HP 5062C on eBay Message-ID: <27505635.1238777889961.JavaMail.root@elwamui-little.atl.sa.earthlink.net> ..."Doesn't Lock Up"... Looks like all the Cesium spilled out !! Nice for parts. 73, Dick, W1KSZ -----Original Message----- >From: Corby Dawson >Sent: Apr 3, 2009 12:21 PM >To: time-nuts at febo.com >Subject: [time-nuts] HP 5062C on eBay > >There is another 5062C on eBay from the same source as the last one. > >Corby Dawson >____________________________________________________________ >Faster loans with less paperwork. Compare rates. Click to find the right loan. >http://thirdpartyoffers.juno.com/TGL2141/fc/BLSrjpTIrTo8ci9jT1JAj2ebvhCQcBjsj0mgjb38zl0NvwjlvavWtuA1zN2/ > >_______________________________________________ >time-nuts mailing list -- time-nuts at febo.com >To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >and follow the instructions there. From magnus at rubidium.dyndns.org Fri Apr 3 17:57:28 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 19:57:28 +0200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D5E9B8.9030108@xtra.co.nz> References: <49D5E9B8.9030108@xtra.co.nz> Message-ID: <49D64E08.3020200@rubidium.dyndns.org> Bruce Griffiths skrev: > Ulrich > > Your experience with the SR620 illustrates the point I was making quite > well. > It really does matter what you do in front of the limiter circuit built > into the counter. > A bandpass or any other filter by itself is ineffective unless the > signal is exceptionally noisy. > > By using the inverter in the 74HCT4046 you have added a low gain limiter > stage the bandwidth of which is smaller than that of the SR620 input > circuit. > This has the effect of increasing the slew rate of the input signal > whilst producing an output with less jitter than the SR620 input circuit > would without this low pass filtered limiter circuit (the inverter from > the 74HCT4046). The slew rate at the 74HCT4046 inverter output is > greater than that of the input signal which means that the jitter due > the counter input circuit noise is smaller than when this low gain low > bandwidth limiter isn't used. > The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz > assuming a single pole response with a 300MHz 3dB high frequency cutoff) > and a correspondingly high total input noise (~350uV rms). > If the slew rate of the SR 620 input signal at the trigger point the > jitter due to this noise dominates the trigger circuit output jitter. > The HP5370 time interval counter input circuit has a lower noise > bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input > circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 > limiter) for the same 10MHz signal should be less than that of the SR620 > (without the 74HCT4046 limiter). As a curiosity, there are various variants of the original 4046 which has different sensitivity on the input side... one of them has several inverters in a row to get the needed gain where as the other variant does not. This difference made a huge difference in some applications. > If one uses a state of the art trigger circuit with a noise bandwidth of > 1GHz or more then the total input noise will be even larger so it > becomes even more important to use an optimised cascade of limiter+ low > output pass filter stages to increase the slew rate of the counter > input trigger circuit at the trigger threshold. > Careful optimisation of the gain of each stage and the corresponding > output filter cutoff frequency for each stage is necessary to minimise > the output jitter of the counter trigger circuit. > There is also an optimum number of such stages that minimises the > trigger jitter. > > The optimisation problem for Limiter stages with gaussian wideband input > noise was solved in the 1990's. > Unfortunately the optimum number of stages, associated gains and output > filter bandwidths depends on the input signal frequency and amplitude so > that in general it isn't possible to use the same limiter cascade for a > wide range of signal amplitudes and frequencies and minimise the jitter > for each frequency and amplitude. Actually, you can make a cascade setup which is approaching optimum and insert signal at the stage where the signals slewrate matches the range for each stage. Since the gain steps is larger later in a slew rate amplifier chain, the last stages may have a little coarse slew rate range, but additional mid-range amplifiers that can act as alternative input amps could curcumvent that such that a wide range but and fairly good trigger jitter could be achieved. The comparator level is fed to whatever stage is the first stage. Such an approach could lead to much improved jitter values for lower frequency signals with associated gain in measurement accuracy. It is easy to make a pre-amplifier set that achieves this, but you want to integrate the control algorithms for automatic use. > Thus such circuits aren't usually employed in general purpose frequency counters. Certainly true. A generic counter is usually equipped with triggers such that they can measure slewrate without too much difficulty. > However if the input signal frequency and amplitude are known and stable > then using such a limiter filter cascade is feasible. Indeed. Cheers, Magnus From magnus at rubidium.dyndns.org Fri Apr 3 18:57:38 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 20:57:38 +0200 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D5FC18.60002@febo.com> References: <49D5B1FE.8020803@sasktel.net> <49D5FC18.60002@febo.com> Message-ID: <49D65C22.3060501@rubidium.dyndns.org> John Ackermann N8UR skrev: > I think you guessed it, Ed. There are a number of applications where > you want to drive at least two devices from the same reference so using > a moderate input impedance facilitates that. > > I've done some goofy things like trying to drive 3 or more 5334A > counters or 3586C VLF receivers from a single reference. My feeling as > a result is that you can safely daisychain two devices, but three may be > tricky. > > Ideally, you should terminate the end of the chain with 50 ohms, but > depending on the drive level you might not be able to get away with that. Not terminating could create a null at or near one of them... thus resulting in no input signal for that box. Overcoming that would require more drive level than the other boxes wants... Cheers, Magnus From swithrow at idcomm.com Fri Apr 3 20:04:06 2009 From: swithrow at idcomm.com (Skip Withrow) Date: Fri, 03 Apr 2009 14:04:06 -0600 Subject: [time-nuts] Need Austron 2110 manual Message-ID: <20090403200407.1E685C5EA2C8@mailhost.idcomm.com> Hello Time-Nuts, I am in need of a manual for the Austron 2110 Disciplined Frequency Standard. Anyone have an electronic copy? I have already tried KO4BB's site and BAMA. I would be more than happy to pay shipping so that I could copy/scan a hard-copy if you have one. Guaranteed to be returned promptly. Regards, Skip Withrow From cfharris at erols.com Fri Apr 3 20:11:47 2009 From: cfharris at erols.com (Chuck Harris) Date: Fri, 03 Apr 2009 16:11:47 -0400 Subject: [time-nuts] Need Austron 2110 manual In-Reply-To: <20090403200407.1E685C5EA2C8@mailhost.idcomm.com> References: <20090403200407.1E685C5EA2C8@mailhost.idcomm.com> Message-ID: <49D66D83.5030507@erols.com> Try PRC68.com Skip Withrow wrote: > Hello Time-Nuts, > > I am in need of a manual for the Austron 2110 Disciplined Frequency > Standard. Anyone have an electronic copy? I have already tried KO4BB's > site and BAMA. > > I would be more than happy to pay shipping so that I could copy/scan a > hard-copy if you have one. Guaranteed to be returned promptly. > > Regards, > Skip Withrow > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From bruce.griffiths at xtra.co.nz Fri Apr 3 20:17:28 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 09:17:28 +1300 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D65C22.3060501@rubidium.dyndns.org> References: <49D5B1FE.8020803@sasktel.net> <49D5FC18.60002@febo.com> <49D65C22.3060501@rubidium.dyndns.org> Message-ID: <49D66ED8.3040306@xtra.co.nz> Magnus Another option (useful when the source amplitude is such that terminating isn't an option and there isn't a suitable amplifier available to boost the source amplitude) is to trim the cable lengths to eliminate such standing wave nulls at the counter inputs. Bruce Magnus Danielson wrote: > John Ackermann N8UR skrev: > >> I think you guessed it, Ed. There are a number of applications where >> you want to drive at least two devices from the same reference so using >> a moderate input impedance facilitates that. >> >> I've done some goofy things like trying to drive 3 or more 5334A >> counters or 3586C VLF receivers from a single reference. My feeling as >> a result is that you can safely daisychain two devices, but three may be >> tricky. >> >> Ideally, you should terminate the end of the chain with 50 ohms, but >> depending on the drive level you might not be able to get away with that. >> > > Not terminating could create a null at or near one of them... thus > resulting in no input signal for that box. Overcoming that would require > more drive level than the other boxes wants... > > Cheers, > Magnus > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From EWKehren at aol.com Fri Apr 3 20:17:58 2009 From: EWKehren at aol.com (EWKehren at aol.com) Date: Fri, 3 Apr 2009 16:17:58 EDT Subject: [time-nuts] Need Austron 2110 manual Message-ID: Skip, where are you located. Since I have always gotten my manuals back I will be glad to send it to you if you do not find an electronic one. Bert Kehren Miami In a message dated 4/3/2009 4:15:04 P.M. Eastern Daylight Time, cfharris at erols.com writes: Try PRC68.com Skip Withrow wrote: > Hello Time-Nuts, > > I am in need of a manual for the Austron 2110 Disciplined Frequency > Standard. Anyone have an electronic copy? I have already tried KO4BB's > site and BAMA. > > I would be more than happy to pay shipping so that I could copy/scan a > hard-copy if you have one. Guaranteed to be returned promptly. > > Regards, > Skip Withrow > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) From w1ksz at earthlink.net Fri Apr 3 20:27:51 2009 From: w1ksz at earthlink.net (Richard W. Solomon) Date: Fri, 3 Apr 2009 16:27:51 -0400 (EDT) Subject: [time-nuts] 100 hours of astronomy Message-ID: <1319549.1238790472114.JavaMail.root@mswamui-cedar.atl.sa.earthlink.net> I have been watching now for a couple of hours. Very interesting to this old veteran of several X-Ray Telescopes !! Too bad it wasn't publicized more ... If not for this post I would not have known about it. 73, Dick, W1KSZ Apollo Alpha & X-Ray Spectrometers Uhuru HRAO LOXT Skylab ATM -----Original Message----- >From: Jim Palfreyman >Sent: Apr 3, 2009 9:59 AM >To: Discussion of precise time and frequency measurement >Subject: [time-nuts] 100 hours of astronomy > >Hi Folks, > >Blatant advertising spam here. > >I'm on the 100 hours of astronomy webcast. I will be broadcasting from the >University of Tasmania's radio telescope in Australia. It begins at 0100 UT. > >I'll be briefly discussing my pulsar observations. > >Go to http://100hoursofastronomy.org/ to check it out. > >Regards, > >Jim >_______________________________________________ >time-nuts mailing list -- time-nuts at febo.com >To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >and follow the instructions there. From hmurray at megapathdsl.net Fri Apr 3 20:40:59 2009 From: hmurray at megapathdsl.net (Hal Murray) Date: Fri, 03 Apr 2009 13:40:59 -0700 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: Message from Magnus Danielson of "Fri, 03 Apr 2009 20:57:38 +0200." <49D65C22.3060501@rubidium.dyndns.org> Message-ID: <20090403204100.9D8D5BCE2@ip-64-139-1-69.sjc.megapath.net> > Not terminating could create a null at or near one of them... thus > resulting in no input signal for that box. Overcoming that would > require more drive level than the other boxes wants... 10 MHz is 100 ns. The speed of light is 1 ft per ns. (Yes, coax is slower. I'm just looking for the ballpark.) So if you have several instruments in a rack with short chunks of coax between them, they will all see (close to) the same signal. If the source is in the same rack, everybody sees (close to) the output of the driver. I'm assuming we are talking about a sine wave. With an edge, you will get reflections which can lead to double triggering. -- These are my opinions, not necessarily my employer's. I hate spam. From bruce.griffiths at xtra.co.nz Fri Apr 3 21:10:18 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 10:10:18 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D64E08.3020200@rubidium.dyndns.org> References: <49D5E9B8.9030108@xtra.co.nz> <49D64E08.3020200@rubidium.dyndns.org> Message-ID: <49D67B3A.7010900@xtra.co.nz> Magnus The input noise of a logic inverter or other trigger device used as a clock shaper is important. If we have a logic inverter device with the following characteristics: Input noise: 100uV rms Intrinsic jitter: 1ps rms Then the input signal slew rate at the threshold crossing has to be greater than 3x1E-4/1E-12 = 3E8 V/s or 300 V/us to ensure that the output jitter isnt increased by more than 5% from the intrinsic jitter. With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at the zero crossing). For such an input signal the output jitter will be about 1.14 ps. This increases to about 1.4ps if there is a threshold offset of 1V. This can be reduced to about 1.05ps by amplifying the slope of the input signal by ~ 3.4x. The intrinsic jitter (RJ. DDJ isn't important when the input signal is a low distortion sinewave) of a 74AC04 inverter is about 1ps. However the equivalent input noise is unknown. The noise could, in principle, be determined by measuring the output jitter as a function of the input signal slew rate. Whilst AM and other noise associated with the source can be reduced by filtering, the input noise of a trigger circuit cannot (except perhaps for the trigger circuits input current noise). Magnus Danielson wrote: > Bruce Griffiths skrev: > >> Ulrich >> >> Your experience with the SR620 illustrates the point I was making quite >> well. >> It really does matter what you do in front of the limiter circuit built >> into the counter. >> A bandpass or any other filter by itself is ineffective unless the >> signal is exceptionally noisy. >> >> By using the inverter in the 74HCT4046 you have added a low gain limiter >> stage the bandwidth of which is smaller than that of the SR620 input >> circuit. >> This has the effect of increasing the slew rate of the input signal >> whilst producing an output with less jitter than the SR620 input circuit >> would without this low pass filtered limiter circuit (the inverter from >> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >> greater than that of the input signal which means that the jitter due >> the counter input circuit noise is smaller than when this low gain low >> bandwidth limiter isn't used. >> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >> assuming a single pole response with a 300MHz 3dB high frequency cutoff) >> and a correspondingly high total input noise (~350uV rms). >> If the slew rate of the SR 620 input signal at the trigger point the >> jitter due to this noise dominates the trigger circuit output jitter. >> The HP5370 time interval counter input circuit has a lower noise >> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >> limiter) for the same 10MHz signal should be less than that of the SR620 >> (without the 74HCT4046 limiter). >> > > As a curiosity, there are various variants of the original 4046 which > has different sensitivity on the input side... one of them has several > inverters in a row to get the needed gain where as the other variant > does not. This difference made a huge difference in some applications. > > The appropriate device (one that will have the least output jitter) to use will vary with the input signal zero crossing slew rate. That is it depends on both the input signal frequency and amplitude. >> If one uses a state of the art trigger circuit with a noise bandwidth of >> 1GHz or more then the total input noise will be even larger so it >> becomes even more important to use an optimised cascade of limiter+ low >> output pass filter stages to increase the slew rate of the counter >> input trigger circuit at the trigger threshold. >> Careful optimisation of the gain of each stage and the corresponding >> output filter cutoff frequency for each stage is necessary to minimise >> the output jitter of the counter trigger circuit. >> There is also an optimum number of such stages that minimises the >> trigger jitter. >> >> The optimisation problem for Limiter stages with gaussian wideband input >> noise was solved in the 1990's. >> Unfortunately the optimum number of stages, associated gains and output >> filter bandwidths depends on the input signal frequency and amplitude so >> that in general it isn't possible to use the same limiter cascade for a >> wide range of signal amplitudes and frequencies and minimise the jitter >> for each frequency and amplitude. >> > > Actually, you can make a cascade setup which is approaching optimum and > insert signal at the stage where the signals slewrate matches the range > for each stage. Since the gain steps is larger later in a slew rate > amplifier chain, the last stages may have a little coarse slew rate > range, but additional mid-range amplifiers that can act as alternative > input amps could curcumvent that such that a wide range but and fairly > good trigger jitter could be achieved. > > The comparator level is fed to whatever stage is the first stage. > > Such an approach could lead to much improved jitter values for lower > frequency signals with associated gain in measurement accuracy. > > It is easy to make a pre-amplifier set that achieves this, but you want > to integrate the control algorithms for automatic use. > > That would constitute an interesting design challenge. >> Thus such circuits aren't usually employed in general purpose frequency counters. >> > > Certainly true. A generic counter is usually equipped with triggers such > that they can measure slewrate without too much difficulty. > > >> However if the input signal frequency and amplitude are known and stable >> then using such a limiter filter cascade is feasible. >> > > Indeed. > > Cheers, > Magnus > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Bruce From bruce.griffiths at xtra.co.nz Fri Apr 3 21:16:01 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 10:16:01 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D67B3A.7010900@xtra.co.nz> References: <49D5E9B8.9030108@xtra.co.nz> <49D64E08.3020200@rubidium.dyndns.org> <49D67B3A.7010900@xtra.co.nz> Message-ID: <49D67C91.3070605@xtra.co.nz> Correction: I forgot to include the intrinsic jitter of the gate in the calculations. See underlined corrections below. Bruce Bruce Griffiths wrote: > Magnus > > The input noise of a logic inverter or other trigger device used as a > clock shaper is important. > If we have a logic inverter device with the following characteristics: > > Input noise: 100uV rms > Intrinsic jitter: 1ps rms > > Then the input signal slew rate at the threshold crossing has to be > greater than > > 3x1E-4/1E-12 = 3E8 V/s or 300 V/us > > to ensure that the output jitter isnt increased by more than 5% from the > intrinsic jitter. > > With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at > the zero crossing). > For such an input signal the output jitter will be about _1.5 ps_. > This increases to about _1.72ps_ if there is a threshold offset of 1V. > This can be reduced to about 1.05ps by amplifying the slope of the input > signal by ~ 3.4x. > > The intrinsic jitter (RJ. DDJ isn't important when the input signal is a > low distortion sinewave) of a 74AC04 inverter is about 1ps. > However the equivalent input noise is unknown. > The noise could, in principle, be determined by measuring the output > jitter as a function of the input signal slew rate. > > Whilst AM and other noise associated with the source can be reduced by > filtering, the input noise of a trigger circuit cannot (except perhaps > for the trigger circuits input current noise). > > Magnus Danielson wrote: > >> Bruce Griffiths skrev: >> >> >>> Ulrich >>> >>> Your experience with the SR620 illustrates the point I was making quite >>> well. >>> It really does matter what you do in front of the limiter circuit built >>> into the counter. >>> A bandpass or any other filter by itself is ineffective unless the >>> signal is exceptionally noisy. >>> >>> By using the inverter in the 74HCT4046 you have added a low gain limiter >>> stage the bandwidth of which is smaller than that of the SR620 input >>> circuit. >>> This has the effect of increasing the slew rate of the input signal >>> whilst producing an output with less jitter than the SR620 input circuit >>> would without this low pass filtered limiter circuit (the inverter from >>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>> greater than that of the input signal which means that the jitter due >>> the counter input circuit noise is smaller than when this low gain low >>> bandwidth limiter isn't used. >>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>> assuming a single pole response with a 300MHz 3dB high frequency cutoff) >>> and a correspondingly high total input noise (~350uV rms). >>> If the slew rate of the SR 620 input signal at the trigger point the >>> jitter due to this noise dominates the trigger circuit output jitter. >>> The HP5370 time interval counter input circuit has a lower noise >>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>> limiter) for the same 10MHz signal should be less than that of the SR620 >>> (without the 74HCT4046 limiter). >>> >>> >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them has several >> inverters in a row to get the needed gain where as the other variant >> does not. This difference made a huge difference in some applications. >> >> >> > > The appropriate device (one that will have the least output jitter) to > use will vary with the input signal zero crossing slew rate. > That is it depends on both the input signal frequency and amplitude. > > >>> If one uses a state of the art trigger circuit with a noise bandwidth of >>> 1GHz or more then the total input noise will be even larger so it >>> becomes even more important to use an optimised cascade of limiter+ low >>> output pass filter stages to increase the slew rate of the counter >>> input trigger circuit at the trigger threshold. >>> Careful optimisation of the gain of each stage and the corresponding >>> output filter cutoff frequency for each stage is necessary to minimise >>> the output jitter of the counter trigger circuit. >>> There is also an optimum number of such stages that minimises the >>> trigger jitter. >>> >>> The optimisation problem for Limiter stages with gaussian wideband input >>> noise was solved in the 1990's. >>> Unfortunately the optimum number of stages, associated gains and output >>> filter bandwidths depends on the input signal frequency and amplitude so >>> that in general it isn't possible to use the same limiter cascade for a >>> wide range of signal amplitudes and frequencies and minimise the jitter >>> for each frequency and amplitude. >>> >>> >> Actually, you can make a cascade setup which is approaching optimum and >> insert signal at the stage where the signals slewrate matches the range >> for each stage. Since the gain steps is larger later in a slew rate >> amplifier chain, the last stages may have a little coarse slew rate >> range, but additional mid-range amplifiers that can act as alternative >> input amps could curcumvent that such that a wide range but and fairly >> good trigger jitter could be achieved. >> >> The comparator level is fed to whatever stage is the first stage. >> >> Such an approach could lead to much improved jitter values for lower >> frequency signals with associated gain in measurement accuracy. >> >> It is easy to make a pre-amplifier set that achieves this, but you want >> to integrate the control algorithms for automatic use. >> >> >> > That would constitute an interesting design challenge. > >>> Thus such circuits aren't usually employed in general purpose frequency counters. >>> >>> >> Certainly true. A generic counter is usually equipped with triggers such >> that they can measure slewrate without too much difficulty. >> >> >> >>> However if the input signal frequency and amplitude are known and stable >>> then using such a limiter filter cascade is feasible. >>> >>> >> Indeed. >> >> Cheers, >> Magnus >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> >> > > Bruce > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From magnus at rubidium.dyndns.org Fri Apr 3 21:22:46 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Fri, 03 Apr 2009 23:22:46 +0200 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D66ED8.3040306@xtra.co.nz> References: <49D5B1FE.8020803@sasktel.net> <49D5FC18.60002@febo.com> <49D65C22.3060501@rubidium.dyndns.org> <49D66ED8.3040306@xtra.co.nz> Message-ID: <49D67E26.9070700@rubidium.dyndns.org> Bruce Griffiths skrev: > Magnus > > Another option (useful when the source amplitude is such that > terminating isn't an option and there isn't a suitable amplifier > available to boost the source amplitude) is to trim the cable lengths to > eliminate such standing wave nulls at the counter inputs. Certainly, but consider the frequency of 10 MHz, 100 ns. 1 ns is 2 dm one-way, so a full-wave is 20 m, a half-wave is 10 m and a quarter-wave is 5 m. It is certainly possible, but a lot of cable. I'd think this is when I would recommend tossing a distribution amplifier on it or rely on the outputs to form chains that way. Cheers, Magnus From bruce.griffiths at xtra.co.nz Fri Apr 3 21:36:05 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sat, 04 Apr 2009 10:36:05 +1300 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D67E26.9070700@rubidium.dyndns.org> References: <49D5B1FE.8020803@sasktel.net> <49D5FC18.60002@febo.com> <49D65C22.3060501@rubidium.dyndns.org> <49D66ED8.3040306@xtra.co.nz> <49D67E26.9070700@rubidium.dyndns.org> Message-ID: <49D68145.9030105@xtra.co.nz> Hej Magnus I wasn't recommending this method for anything but a possible solution when no other method was feasible. Of course the other solution is to use a sufficiently short total cable length. The only questions are: How short ? How does the counter reference input impedance (R and C) affect the maximum total cable length? Daisy chaining via the reference output signal provided by some counters will increase the noise of the reference for counters further along the chain. The significance of this depends on the application and the performance of the reference frequency buffers inside the counters. Using a high performance distribution amplifier reduces interaction between counters and the potential degradation due to each counter's reference output buffer. Bruce Magnus Danielson wrote: > Bruce Griffiths skrev: > >> Magnus >> >> Another option (useful when the source amplitude is such that >> terminating isn't an option and there isn't a suitable amplifier >> available to boost the source amplitude) is to trim the cable lengths to >> eliminate such standing wave nulls at the counter inputs. >> > > Certainly, but consider the frequency of 10 MHz, 100 ns. 1 ns is 2 dm > one-way, so a full-wave is 20 m, a half-wave is 10 m and a quarter-wave > is 5 m. It is certainly possible, but a lot of cable. > > Thats true only for cable like RG58 with a solid PE dielectric. For cables having gas injected PE or PTFE foam dielectric the corresponding lengths are a little greater. > I'd think this is when I would recommend tossing a distribution > amplifier on it or rely on the outputs to form chains that way. > > Cheers, > Magnus > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jra at febo.com Fri Apr 3 22:01:24 2009 From: jra at febo.com (John Ackermann N8UR) Date: Fri, 03 Apr 2009 18:01:24 -0400 Subject: [time-nuts] Updated Divider Jitter Results Message-ID: <49D68734.3020900@febo.com> I just finished a jitter test of the first TADD-2 built on the production circuit board. The configuration was somewhat optimized from what I used for the earlier tests. A single 10 MHz source was daisy-chained to the TADD-2 input, to the 5370B external reference input, and to the 5370B STOP channel. The 1 PPS output from the TADD-2 was connected to the 5370B START channel. Thus any reference jitter shouldn't be common-mode, and using the reference clock on the STOP channel avoids the need for a second divider, and ensures that the time interval is small (always less than 100 ns; in this case, about 90 ns). For a 10,000 sample run, the standard deviation was 12.1 picoseconds, and the peak-to-peak variation was 70 picoseconds. Based on experiments I ran a few years ago, I think this is pretty much the noise floor of the 5370B and the divider could be better than this. John From phk at phk.freebsd.dk Sat Apr 4 07:08:39 2009 From: phk at phk.freebsd.dk (Poul-Henning Kamp) Date: Sat, 04 Apr 2009 07:08:39 +0000 Subject: [time-nuts] Updated Divider Jitter Results In-Reply-To: Your message of "Fri, 03 Apr 2009 18:01:24 -0400." <49D68734.3020900@febo.com> Message-ID: <10005.1238828919@critter.freebsd.dk> In message <49D68734.3020900 at febo.com>, John Ackermann N8UR writes: >A single 10 MHz source was daisy-chained to the TADD-2 input, to the >5370B external reference input, Can you do the test again running the 5370B on a different clock or free-running ? Running synchronized clocks like you do makes the calibration of the input circuits in the 5370B very very critical for the measured value. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk at FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. From df6jb at ulrich-bangert.de Sat Apr 4 10:13:40 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Sat, 4 Apr 2009 12:13:40 +0200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D64E08.3020200@rubidium.dyndns.org> Message-ID: Magnus, > As a curiosity, there are various variants of the original 4046 which > has different sensitivity on the input side... one of them > has several inverters in a row to get the needed gain where as the other variant > does not. This difference made a huge difference in some applications. are you going to say with that it would be reasonable to test different brands for input sensivity? I have been believing that all brands have this inverter chain. Best regards Ulrich > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Magnus Danielson > Gesendet: Freitag, 3. April 2009 19:57 > An: Discussion of precise time and frequency measurement > Betreff: Re: [time-nuts] time-nuts Frequency Divider > > > Bruce Griffiths skrev: > > Ulrich > > > > Your experience with the SR620 illustrates the point I was making > > quite well. It really does matter what you do in front of > the limiter > > circuit built into the counter. > > A bandpass or any other filter by itself is ineffective unless the > > signal is exceptionally noisy. > > > > By using the inverter in the 74HCT4046 you have added a low gain > > limiter stage the bandwidth of which is smaller than that > of the SR620 > > input circuit. This has the effect of increasing the slew > rate of the > > input signal whilst producing an output with less jitter than the > > SR620 input circuit would without this low pass filtered limiter > > circuit (the inverter from the 74HCT4046). The slew rate at the > > 74HCT4046 inverter output is greater than that of the input signal > > which means that the jitter due the counter input circuit noise is > > smaller than when this low gain low bandwidth limiter isn't used. > > The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz > > assuming a single pole response with a 300MHz 3dB high > frequency cutoff) > > and a correspondingly high total input noise (~350uV rms). > > If the slew rate of the SR 620 input signal at the trigger point the > > jitter due to this noise dominates the trigger circuit > output jitter. > > The HP5370 time interval counter input circuit has a lower noise > > bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input > > circuit of the SR620 and thus the HP5370 jitter (without > the 74HCT4046 > > limiter) for the same 10MHz signal should be less than that > of the SR620 > > (without the 74HCT4046 limiter). > > As a curiosity, there are various variants of the original 4046 which > has different sensitivity on the input side... one of them > has several > inverters in a row to get the needed gain where as the other variant > does not. This difference made a huge difference in some applications. > > > If one uses a state of the art trigger circuit with a noise > bandwidth > > of 1GHz or more then the total input noise will be even > larger so it > > becomes even more important to use an optimised cascade of limiter+ > > low output pass filter stages to increase the slew rate of > the counter > > input trigger circuit at the trigger threshold. Careful > optimisation > > of the gain of each stage and the corresponding output > filter cutoff > > frequency for each stage is necessary to minimise the > output jitter of > > the counter trigger circuit. There is also an optimum > number of such > > stages that minimises the trigger jitter. > > > > The optimisation problem for Limiter stages with gaussian wideband > > input noise was solved in the 1990's. Unfortunately the > optimum number > > of stages, associated gains and output filter bandwidths depends on > > the input signal frequency and amplitude so that in general > it isn't > > possible to use the same limiter cascade for a wide range of signal > > amplitudes and frequencies and minimise the jitter for each > frequency > > and amplitude. > > Actually, you can make a cascade setup which is approaching > optimum and insert signal at the stage where the signals > slewrate matches the range > for each stage. Since the gain steps is larger later in a slew rate > amplifier chain, the last stages may have a little coarse slew rate > range, but additional mid-range amplifiers that can act as > alternative > input amps could curcumvent that such that a wide range but > and fairly > good trigger jitter could be achieved. > > The comparator level is fed to whatever stage is the first stage. > > Such an approach could lead to much improved jitter values for lower > frequency signals with associated gain in measurement accuracy. > > It is easy to make a pre-amplifier set that achieves this, > but you want > to integrate the control algorithms for automatic use. > > > Thus such circuits aren't usually employed in general purpose > > frequency counters. > > Certainly true. A generic counter is usually equipped with > triggers such > that they can measure slewrate without too much difficulty. > > > However if the input signal frequency and amplitude are known and > > stable then using such a limiter filter cascade is feasible. > > Indeed. > > Cheers, > Magnus > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From bruce.griffiths at xtra.co.nz Sat Apr 4 11:11:13 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 00:11:13 +1300 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D74051.3020806@xtra.co.nz> Ulrich All manufacturers claim that their 74HC4046 or 74HCT4046 have the self biased inverter chains on SIGIN and COMPIN pins. However the AC sensitivity of these inputs differs for each manufacturer. For example the Philips/NXP version is more sensitive than The Fairchild version. The ON semiconductor version datasheet has no AC sensitivity specification. Bruce Ulrich Bangert wrote: > Magnus, > > >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them >> has several inverters in a row to get the needed gain where as the other >> > variant > >> does not. This difference made a huge difference in some applications. >> > > are you going to say with that it would be reasonable to test different > brands for input sensivity? I have been believing that all brands have this > inverter chain. > > Best regards > Ulrich > > >> -----Ursprungliche Nachricht----- >> Von: time-nuts-bounces at febo.com >> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Magnus Danielson >> Gesendet: Freitag, 3. April 2009 19:57 >> An: Discussion of precise time and frequency measurement >> Betreff: Re: [time-nuts] time-nuts Frequency Divider >> >> >> Bruce Griffiths skrev: >> >>> Ulrich >>> >>> Your experience with the SR620 illustrates the point I was making >>> quite well. It really does matter what you do in front of >>> >> the limiter >> >>> circuit built into the counter. >>> A bandpass or any other filter by itself is ineffective unless the >>> signal is exceptionally noisy. >>> >>> By using the inverter in the 74HCT4046 you have added a low gain >>> limiter stage the bandwidth of which is smaller than that >>> >> of the SR620 >> >>> input circuit. This has the effect of increasing the slew >>> >> rate of the >> >>> input signal whilst producing an output with less jitter than the >>> SR620 input circuit would without this low pass filtered limiter >>> circuit (the inverter from the 74HCT4046). The slew rate at the >>> 74HCT4046 inverter output is greater than that of the input signal >>> which means that the jitter due the counter input circuit noise is >>> smaller than when this low gain low bandwidth limiter isn't used. >>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>> assuming a single pole response with a 300MHz 3dB high >>> >> frequency cutoff) >> >>> and a correspondingly high total input noise (~350uV rms). >>> If the slew rate of the SR 620 input signal at the trigger point the >>> jitter due to this noise dominates the trigger circuit >>> >> output jitter. >> >>> The HP5370 time interval counter input circuit has a lower noise >>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>> circuit of the SR620 and thus the HP5370 jitter (without >>> >> the 74HCT4046 >> >>> limiter) for the same 10MHz signal should be less than that >>> >> of the SR620 >> >>> (without the 74HCT4046 limiter). >>> >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them >> has several >> inverters in a row to get the needed gain where as the other variant >> does not. This difference made a huge difference in some applications. >> >> >>> If one uses a state of the art trigger circuit with a noise >>> >> bandwidth >> >>> of 1GHz or more then the total input noise will be even >>> >> larger so it >> >>> becomes even more important to use an optimised cascade of limiter+ >>> low output pass filter stages to increase the slew rate of >>> >> the counter >> >>> input trigger circuit at the trigger threshold. Careful >>> >> optimisation >> >>> of the gain of each stage and the corresponding output >>> >> filter cutoff >> >>> frequency for each stage is necessary to minimise the >>> >> output jitter of >> >>> the counter trigger circuit. There is also an optimum >>> >> number of such >> >>> stages that minimises the trigger jitter. >>> >>> The optimisation problem for Limiter stages with gaussian wideband >>> input noise was solved in the 1990's. Unfortunately the >>> >> optimum number >> >>> of stages, associated gains and output filter bandwidths depends on >>> the input signal frequency and amplitude so that in general >>> >> it isn't >> >>> possible to use the same limiter cascade for a wide range of signal >>> amplitudes and frequencies and minimise the jitter for each >>> >> frequency >> >>> and amplitude. >>> >> Actually, you can make a cascade setup which is approaching >> optimum and insert signal at the stage where the signals >> slewrate matches the range >> for each stage. Since the gain steps is larger later in a slew rate >> amplifier chain, the last stages may have a little coarse slew rate >> range, but additional mid-range amplifiers that can act as >> alternative >> input amps could curcumvent that such that a wide range but >> and fairly >> good trigger jitter could be achieved. >> >> The comparator level is fed to whatever stage is the first stage. >> >> Such an approach could lead to much improved jitter values for lower >> frequency signals with associated gain in measurement accuracy. >> >> It is easy to make a pre-amplifier set that achieves this, >> but you want >> to integrate the control algorithms for automatic use. >> >> >>> Thus such circuits aren't usually employed in general purpose >>> frequency counters. >>> >> Certainly true. A generic counter is usually equipped with >> triggers such >> that they can measure slewrate without too much difficulty. >> >> >>> However if the input signal frequency and amplitude are known and >>> stable then using such a limiter filter cascade is feasible. >>> >> Indeed. >> >> Cheers, >> Magnus >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jra at febo.com Sat Apr 4 11:13:21 2009 From: jra at febo.com (John Ackermann N8UR) Date: Sat, 04 Apr 2009 07:13:21 -0400 Subject: [time-nuts] Updated Divider Jitter Results In-Reply-To: <10005.1238828919@critter.freebsd.dk> References: <10005.1238828919@critter.freebsd.dk> Message-ID: <49D740D1.1030600@febo.com> Sure. I didn't write down the numbers because it was an interim step, but I earlier did that and IIRC the std dev was around 20-25 ps. Would error in the cal circuit tend to falsely increase, or decrease, the result? Or both? John ---- Poul-Henning Kamp said the following on 04/04/2009 03:08 AM: > In message <49D68734.3020900 at febo.com>, John Ackermann N8UR writes: > >> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >> 5370B external reference input, > > Can you do the test again running the 5370B on a different clock or > free-running ? > > Running synchronized clocks like you do makes the calibration of > the input circuits in the 5370B very very critical for the measured > value. > From jra at febo.com Sat Apr 4 11:16:27 2009 From: jra at febo.com (John Ackermann N8UR) Date: Sat, 04 Apr 2009 07:16:27 -0400 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D7418B.9090503@febo.com> Ulrich Bangert said the following on 04/04/2009 06:13 AM: >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them >> has several inverters in a row to get the needed gain where as the other > variant >> does not. This difference made a huge difference in some applications. > > are you going to say with that it would be reasonable to test different > brands for input sensivity? I have been believing that all brands have this > inverter chain. Brooks Shera used the 4046 as the input conditioning circuit in his GPSDO that was published quite a while ago. I seem to recall that he noted only certain brands seemed to work well, but I don't recall the details. John From phk at phk.freebsd.dk Sat Apr 4 11:30:29 2009 From: phk at phk.freebsd.dk (Poul-Henning Kamp) Date: Sat, 04 Apr 2009 11:30:29 +0000 Subject: [time-nuts] Updated Divider Jitter Results In-Reply-To: Your message of "Sat, 04 Apr 2009 07:13:21 -0400." <49D740D1.1030600@febo.com> Message-ID: <11109.1238844629@critter.freebsd.dk> In message <49D740D1.1030600 at febo.com>, John Ackermann N8UR writes: >Sure. I didn't write down the numbers because it was an interim step, >but I earlier did that and IIRC the std dev was around 20-25 ps. > >Would error in the cal circuit tend to falsely increase, or decrease, >the result? Or both? In my experience it generally skews your result downwards, but I have seen it move upwards also, it all depends on the phase. By running the 5370 from a unlocked source makes the input signals "precess" over the input windows and averages stuff out. I only lock my 5370 if I need to measure long timeintervals, for short intervals the timebase error is lost in the noise. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk at FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. From magnus at rubidium.dyndns.org Sat Apr 4 12:18:35 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Sat, 04 Apr 2009 14:18:35 +0200 Subject: [time-nuts] External Frequency Standard Inputs on Counters In-Reply-To: <49D68145.9030105@xtra.co.nz> References: <49D5B1FE.8020803@sasktel.net> <49D5FC18.60002@febo.com> <49D65C22.3060501@rubidium.dyndns.org> <49D66ED8.3040306@xtra.co.nz> <49D67E26.9070700@rubidium.dyndns.org> <49D68145.9030105@xtra.co.nz> Message-ID: <49D7501B.8020003@rubidium.dyndns.org> Bruce Griffiths skrev: > Hej Magnus > > I wasn't recommending this method for anything but a possible solution > when no other method was feasible. > Of course the other solution is to use a sufficiently short total cable > length. > The only questions are: > How short ? > How does the counter reference input impedance (R and C) affect the > maximum total cable length? > > Daisy chaining via the reference output signal provided by some counters > will increase the noise of the reference for counters further along the > chain. > The significance of this depends on the application and the performance > of the reference frequency buffers inside the counters. Naturally. But one can put the less sensitive or needing boxes down the line. It is worth mentioning that there is two principles for using external clock, one is to just select it in and distribute it inside where as the other is to phase-lock the internal crystal oscillator. The later variant is better for those systems that has a low noise clock and frequency steering is needed. > Using a high performance distribution amplifier reduces interaction > between counters and the potential degradation due to each counter's > reference output buffer. Certainly. It also isolates various cables from each other. Thus, disconnecting a box does not become a problem. Also, there is no need to have all boxes turned on. > Bruce > > Magnus Danielson wrote: >> Bruce Griffiths skrev: >> >>> Magnus >>> >>> Another option (useful when the source amplitude is such that >>> terminating isn't an option and there isn't a suitable amplifier >>> available to boost the source amplitude) is to trim the cable lengths to >>> eliminate such standing wave nulls at the counter inputs. >>> >> Certainly, but consider the frequency of 10 MHz, 100 ns. 1 ns is 2 dm >> one-way, so a full-wave is 20 m, a half-wave is 10 m and a quarter-wave >> is 5 m. It is certainly possible, but a lot of cable. >> >> > Thats true only for cable like RG58 with a solid PE dielectric. > For cables having gas injected PE or PTFE foam dielectric the > corresponding lengths are a little greater. Certainly, but it does not help against the main point, it's alot of cable. Cheers, Magnus From magnus at rubidium.dyndns.org Sat Apr 4 12:27:49 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Sat, 04 Apr 2009 14:27:49 +0200 Subject: [time-nuts] Updated Divider Jitter Results In-Reply-To: <11109.1238844629@critter.freebsd.dk> References: <11109.1238844629@critter.freebsd.dk> Message-ID: <49D75245.50606@rubidium.dyndns.org> Poul-Henning Kamp skrev: > In message <49D740D1.1030600 at febo.com>, John Ackermann N8UR writes: >> Sure. I didn't write down the numbers because it was an interim step, >> but I earlier did that and IIRC the std dev was around 20-25 ps. >> >> Would error in the cal circuit tend to falsely increase, or decrease, >> the result? Or both? > > In my experience it generally skews your result downwards, but I have > seen it move upwards also, it all depends on the phase. I have seen how it skews both ways. With a very sensitive hand a minimum can be found which can be fairly low, such as 13 ps but then I had tuned the 200 MHz section carefully. Getting such low results on a general signal is not possible. Also, the ref out of the HP5370 has a wideband 5 MHz signal with overtones noise which can be removed if modified. Modifications requires one little short-out. Cheers, Magnus From magnus at rubidium.dyndns.org Sat Apr 4 12:32:57 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Sat, 04 Apr 2009 14:32:57 +0200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D75379.3080203@rubidium.dyndns.org> Ulrich Bangert skrev: > Magnus, > >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them >> has several inverters in a row to get the needed gain where as the other > variant >> does not. This difference made a huge difference in some applications. > > are you going to say with that it would be reasonable to test different > brands for input sensivity? I have been believing that all brands have this > inverter chain. I don't know for sure about the situation now, but I do know there existed two variants where one had a shorter chain. It caused trouble in the production where they had prototyped and built the initial run with one brand and then second sourced in another brand just to have the box fail. I can't recall the details of where I saw it, but yes, this is an issue. Cheers, Magnus From magnus at rubidium.dyndns.org Sat Apr 4 12:35:56 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Sat, 04 Apr 2009 14:35:56 +0200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D7418B.9090503@febo.com> References: <49D7418B.9090503@febo.com> Message-ID: <49D7542C.4030604@rubidium.dyndns.org> John Ackermann N8UR skrev: > Ulrich Bangert said the following on 04/04/2009 06:13 AM: > >>> As a curiosity, there are various variants of the original 4046 which >>> has different sensitivity on the input side... one of them >>> has several inverters in a row to get the needed gain where as the other >> variant >>> does not. This difference made a huge difference in some applications. >> are you going to say with that it would be reasonable to test different >> brands for input sensivity? I have been believing that all brands have this >> inverter chain. > > Brooks Shera used the 4046 as the input conditioning circuit in his > GPSDO that was published quite a while ago. I seem to recall that he > noted only certain brands seemed to work well, but I don't recall the > details. Maybe using a 4069UB and a small handful of passives would be a better solution? Cheers, Magnus From ed_palmer at sasktel.net Sat Apr 4 15:30:01 2009 From: ed_palmer at sasktel.net (Ed Palmer) Date: Sat, 04 Apr 2009 09:30:01 -0600 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D77CF9.8040501@sasktel.net> I was recently reviewing Brook Shera's GPSDO info and he stated that Fairchild 74HCT4046 chips don't work, but didn't give any details. ( [1]http://www.rt66.com/~shera/setup_notes.html in item 1 of the Parts Procurement Problems/Solutions section.) Is this an example of the input sensitivity problem? A quick Google search didn't turn up a Fairchild data sheet. Ed Ulrich Bangert wrote: Magnus, As a curiosity, there are various variants of the original 4046 which has different sensitivity on the input side... one of them has several inverters in a row to get the needed gain where as the other variant does not. This difference made a huge difference in some applications. are you going to say with that it would be reasonable to test different brands for input sensivity? I have been believing that all brands have this inverter chain. Best regards Ulrich -----Ursprungliche Nachricht----- Von: [2]time-nuts-bounces at febo.com [[3]mailto:time-nuts-bounces at febo.com] Im Auftrag von Magnus Danielson Gesendet: Freitag, 3. April 2009 19:57 An: Discussion of precise time and frequency measurement Betreff: Re: [time-nuts] time-nuts Frequency Divider Bruce Griffiths skrev: Ulrich Your experience with the SR620 illustrates the point I was making quite well. It really does matter what you do in front of the limiter circuit built into the counter. A bandpass or any other filter by itself is ineffective unless the signal is exceptionally noisy. By using the inverter in the 74HCT4046 you have added a low gain limiter stage the bandwidth of which is smaller than that of the SR620 input circuit. This has the effect of increasing the slew rate of the input signal whilst producing an output with less jitter than the SR620 input circuit would without this low pass filtered limiter circuit (the inverter from the 74HCT4046). The slew rate at the 74HCT4046 inverter output is greater than that of the input signal which means that the jitter due the counter input circuit noise is smaller than when this low gain low bandwidth limiter isn't used. The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz assuming a single pole response with a 300MHz 3dB high frequency cutoff) and a correspondingly high total input noise (~350uV rms). If the slew rate of the SR 620 input signal at the trigger point the jitter due to this noise dominates the trigger circuit output jitter. The HP5370 time interval counter input circuit has a lower noise bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 limiter) for the same 10MHz signal should be less than that of the SR620 (without the 74HCT4046 limiter). As a curiosity, there are various variants of the original 4046 which has different sensitivity on the input side... one of them has several inverters in a row to get the needed gain where as the other variant does not. This difference made a huge difference in some applications. If one uses a state of the art trigger circuit with a noise bandwidth of 1GHz or more then the total input noise will be even larger so it becomes even more important to use an optimised cascade of limiter+ low output pass filter stages to increase the slew rate of the counter input trigger circuit at the trigger threshold. Careful optimisation of the gain of each stage and the corresponding output filter cutoff frequency for each stage is necessary to minimise the output jitter of the counter trigger circuit. There is also an optimum number of such stages that minimises the trigger jitter. The optimisation problem for Limiter stages with gaussian wideband input noise was solved in the 1990's. Unfortunately the optimum number of stages, associated gains and output filter bandwidths depends on the input signal frequency and amplitude so that in general it isn't possible to use the same limiter cascade for a wide range of signal amplitudes and frequencies and minimise the jitter for each frequency and amplitude. Actually, you can make a cascade setup which is approaching optimum and insert signal at the stage where the signals slewrate matches the range for each stage. Since the gain steps is larger later in a slew rate amplifier chain, the last stages may have a little coarse slew rate range, but additional mid-range amplifiers that can act as alternative input amps could curcumvent that such that a wide range but and fairly good trigger jitter could be achieved. The comparator level is fed to whatever stage is the first stage. Such an approach could lead to much improved jitter values for lower frequency signals with associated gain in measurement accuracy. It is easy to make a pre-amplifier set that achieves this, but you want to integrate the control algorithms for automatic use. Thus such circuits aren't usually employed in general purpose frequency counters. Certainly true. A generic counter is usually equipped with triggers such that they can measure slewrate without too much difficulty. However if the input signal frequency and amplitude are known and stable then using such a limiter filter cascade is feasible. Indeed. Cheers, Magnus _______________________________________________ time-nuts mailing list -- [4]time-nuts at febo.com To unsubscribe, go to [5]https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. _______________________________________________ time-nuts mailing list -- [6]time-nuts at febo.com To unsubscribe, go to [7]https://www.febo.com/cgi-bin/mailman/listinfo/time-nut s and follow the instructions there. References 1. http://www.rt66.com/~shera/setup_notes.html 2. mailto:time-nuts-bounces at febo.com 3. mailto:time-nuts-bounces at febo.com 4. mailto:time-nuts at febo.com 5. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts 6. mailto:time-nuts at febo.com 7. https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts From mccorkle at ptialaska.net Sat Apr 4 19:20:40 2009 From: mccorkle at ptialaska.net (Richard H McCorkle) Date: Sat, 4 Apr 2009 11:20:40 -0800 (AKDT) Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: <49D7418B.9090503@febo.com> References: <49D7418B.9090503@febo.com> Message-ID: <13414.206.174.20.67.1238872840.squirrel@mymail.acsalaska.net> John, The specifications for AC coupled input sensitivity of the 74HC4046 from the major manufacturers are shown below. Brooks found that the Fairchild device had lower sensitivity and recommended using devices from TI or Phillips. Fairchild MM74HC4046 Ac coupled input sensitivity @ 500 KHz 25mv p-p typical, 100mv p-p guaranteed at 25C @ 2v 50mv p-p typical, 150mv p-p guaranteed at 25C @ 4.5v 135mv p-p typical, 250mv p-p guaranteed at 25C @ 6v Phillips 74HC4046A, TI CD74HC4046 Ac coupled input sensitivity @ 1 MHz 9mv p-p typical @ 2v 11mv p-p typical @ 3v 15mv p-p typical @ 4.5v 33mv p-p typical @ 6v On Semiconductor MC74HC4046A Ac coupled input sensitivity not specified Richard > Ulrich Bangert said the following on 04/04/2009 06:13 AM: > >>> As a curiosity, there are various variants of the original 4046 which >>> has different sensitivity on the input side... one of them >>> has several inverters in a row to get the needed gain where as the other >> variant >>> does not. This difference made a huge difference in some applications. >> >> are you going to say with that it would be reasonable to test different >> brands for input sensivity? I have been believing that all brands have this >> inverter chain. > > Brooks Shera used the 4046 as the input conditioning circuit in his > GPSDO that was published quite a while ago. I seem to recall that he > noted only certain brands seemed to work well, but I don't recall the > details. > > John > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > From EWKehren at aol.com Sat Apr 4 20:04:01 2009 From: EWKehren at aol.com (EWKehren at aol.com) Date: Sat, 4 Apr 2009 16:04:01 EDT Subject: [time-nuts] time-nuts Frequency Divider Message-ID: Having built eight of Brooks units, my experience was that the problem was not with the amplifier but the way the RS F/F in the phase comparator II was working in some of the devices. For me they all worked in the oscillator input but some brands did not work properly with the GPS input. With all the dialog on the divider subject, is it not time to develop one design that combines KISS and all the collective know how? Bert Kehren WB5MZJ In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, bruce.griffiths at xtra.co.nz writes: Correction: I forgot to include the intrinsic jitter of the gate in the calculations. See underlined corrections below. Bruce Bruce Griffiths wrote: > Magnus > > The input noise of a logic inverter or other trigger device used as a > clock shaper is important. > If we have a logic inverter device with the following characteristics: > > Input noise: 100uV rms > Intrinsic jitter: 1ps rms > > Then the input signal slew rate at the threshold crossing has to be > greater than > > 3x1E-4/1E-12 = 3E8 V/s or 300 V/us > > to ensure that the output jitter isnt increased by more than 5% from the > intrinsic jitter. > > With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at > the zero crossing). > For such an input signal the output jitter will be about _1.5 ps_. > This increases to about _1.72ps_ if there is a threshold offset of 1V. > This can be reduced to about 1.05ps by amplifying the slope of the input > signal by ~ 3.4x. > > The intrinsic jitter (RJ. DDJ isn't important when the input signal is a > low distortion sinewave) of a 74AC04 inverter is about 1ps. > However the equivalent input noise is unknown. > The noise could, in principle, be determined by measuring the output > jitter as a function of the input signal slew rate. > > Whilst AM and other noise associated with the source can be reduced by > filtering, the input noise of a trigger circuit cannot (except perhaps > for the trigger circuits input current noise). > > Magnus Danielson wrote: > >> Bruce Griffiths skrev: >> >> >>> Ulrich >>> >>> Your experience with the SR620 illustrates the point I was making quite >>> well. >>> It really does matter what you do in front of the limiter circuit built >>> into the counter. >>> A bandpass or any other filter by itself is ineffective unless the >>> signal is exceptionally noisy. >>> >>> By using the inverter in the 74HCT4046 you have added a low gain limiter >>> stage the bandwidth of which is smaller than that of the SR620 input >>> circuit. >>> This has the effect of increasing the slew rate of the input signal >>> whilst producing an output with less jitter than the SR620 input circuit >>> would without this low pass filtered limiter circuit (the inverter from >>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>> greater than that of the input signal which means that the jitter due >>> the counter input circuit noise is smaller than when this low gain low >>> bandwidth limiter isn't used. >>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>> assuming a single pole response with a 300MHz 3dB high frequency cutoff) >>> and a correspondingly high total input noise (~350uV rms). >>> If the slew rate of the SR 620 input signal at the trigger point the >>> jitter due to this noise dominates the trigger circuit output jitter. >>> The HP5370 time interval counter input circuit has a lower noise >>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>> limiter) for the same 10MHz signal should be less than that of the SR620 >>> (without the 74HCT4046 limiter). >>> >>> >> As a curiosity, there are various variants of the original 4046 which >> has different sensitivity on the input side... one of them has several >> inverters in a row to get the needed gain where as the other variant >> does not. This difference made a huge difference in some applications. >> >> >> > > The appropriate device (one that will have the least output jitter) to > use will vary with the input signal zero crossing slew rate. > That is it depends on both the input signal frequency and amplitude. > > >>> If one uses a state of the art trigger circuit with a noise bandwidth of >>> 1GHz or more then the total input noise will be even larger so it >>> becomes even more important to use an optimised cascade of limiter+ low >>> output pass filter stages to increase the slew rate of the counter >>> input trigger circuit at the trigger threshold. >>> Careful optimisation of the gain of each stage and the corresponding >>> output filter cutoff frequency for each stage is necessary to minimise >>> the output jitter of the counter trigger circuit. >>> There is also an optimum number of such stages that minimises the >>> trigger jitter. >>> >>> The optimisation problem for Limiter stages with gaussian wideband input >>> noise was solved in the 1990's. >>> Unfortunately the optimum number of stages, associated gains and output >>> filter bandwidths depends on the input signal frequency and amplitude so >>> that in general it isn't possible to use the same limiter cascade for a >>> wide range of signal amplitudes and frequencies and minimise the jitter >>> for each frequency and amplitude. >>> >>> >> Actually, you can make a cascade setup which is approaching optimum and >> insert signal at the stage where the signals slewrate matches the range >> for each stage. Since the gain steps is larger later in a slew rate >> amplifier chain, the last stages may have a little coarse slew rate >> range, but additional mid-range amplifiers that can act as alternative >> input amps could curcumvent that such that a wide range but and fairly >> good trigger jitter could be achieved. >> >> The comparator level is fed to whatever stage is the first stage. >> >> Such an approach could lead to much improved jitter values for lower >> frequency signals with associated gain in measurement accuracy. >> >> It is easy to make a pre-amplifier set that achieves this, but you want >> to integrate the control algorithms for automatic use. >> >> >> > That would constitute an interesting design challenge. > >>> Thus such circuits aren't usually employed in general purpose frequency counters. >>> >>> >> Certainly true. A generic counter is usually equipped with triggers such >> that they can measure slewrate without too much difficulty. >> >> >> >>> However if the input signal frequency and amplitude are known and stable >>> then using such a limiter filter cascade is feasible. >>> >>> >> Indeed. >> >> Cheers, >> Magnus >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> >> > > Bruce > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) From kilodelta4foxmike at gmail.com Sat Apr 4 20:18:50 2009 From: kilodelta4foxmike at gmail.com (Brian Kirby) Date: Sat, 04 Apr 2009 15:18:50 -0500 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D68734.3020900@febo.com> References: <49D68734.3020900@febo.com> Message-ID: <49D7C0AA.6060708@gmail.com> I will report some results on a asynchronous divider, which I basically copied from Dr. Thomas Clark's designs, which everybody likes to report as a bad design. The 10 MHz input signal is coupled thru a resistor and capacitor. On the other side of the capacitor is the resistive divider that is tied to Vcc and ground - it biases the signal to 2.5 volts, which is feed to the input of the 74HC132. The output of the 74HC132 feeds several 74HC390s until it becomes a buffered 1 pulse per second signal. I also have buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used to externally synchronize the 74HC390s. I used the Thunderbolt as the source of 10 MHz and it was feed to the divider, and the stop input on the HP5370B. The 5370B was run on internal clock. The 1 PPS from the divider feed the start input on the 5370B. 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS 100K planned Also a second test, using the Thunderbolt as a source of 10 MHz and it was feed to the divider, the stop input on the 5370B and the external clock of the 5370B. The 1 PPS from the divider feed the start input on the 5370B. 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS 100K measurement in progress. I believe having STD in parts of 10-14th is fairly respectable for amateur designs.. Brian KD4FM John Ackermann N8UR wrote: > I just finished a jitter test of the first TADD-2 built on the > production circuit board. > > The configuration was somewhat optimized from what I used for the > earlier tests. > > A single 10 MHz source was daisy-chained to the TADD-2 input, to the > 5370B external reference input, and to the 5370B STOP channel. The 1 > PPS output from the TADD-2 was connected to the 5370B START channel. > Thus any reference jitter shouldn't be common-mode, and using the > reference clock on the STOP channel avoids the need for a second > divider, and ensures that the time interval is small (always less than > 100 ns; in this case, about 90 ns). > > For a 10,000 sample run, the standard deviation was 12.1 picoseconds, > and the peak-to-peak variation was 70 picoseconds. Based on experiments > I ran a few years ago, I think this is pretty much the noise floor of > the 5370B and the divider could be better than this. > > John > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Sat Apr 4 20:33:41 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 08:33:41 +1200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D7C425.8080605@xtra.co.nz> Bert Neither the HP5370 nor the SR620 have low enough internal jitter to accurately characterise the intrinisic output jitter of either a 74HC04 (~4ps) or a 74AC04 (~1ps). Rather than just tossing together a divider from various parts though to produce an output with low jitter its better to be able to characterise the jitter properties (intrinsic as well as that due to logic device input noise with a finite input signal slew rate) of various logic families. It is then possible to actually design a sine to logic level converter that achieves the lowest possible output jitter for a given complexity and specified input frequency and amplitude. The real problem is that one needs to accurately measure jitter of 1ps or so. There are few time interval counters that allow this. One can also measure the change in noise floor when such a device is placed in the clock input path of a high frequency ADC and thence derive the jitter. In principle, the output jitter of a divider can also be calculated from the phase noise spectrum of its output. Bruce EWKehren at aol.com wrote: > Having built eight of Brooks units, my experience was that the problem was > not with the amplifier but the way the RS F/F in the phase comparator II was > working in some of the devices. For me they all worked in the oscillator input > but some brands did not work properly with the GPS input. With all the dialog > on the divider subject, is it not time to develop one design that combines > KISS and all the collective know how? Bert Kehren WB5MZJ > > > In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Correction: > > I forgot to include the intrinsic jitter of the gate in the calculations. > See underlined corrections below. > > > Bruce > > Bruce Griffiths wrote: > > > >> Magnus >> >> The input noise of a logic inverter or other trigger device used as a >> clock shaper is important. >> If we have a logic inverter device with the following characteristics: >> >> Input noise: 100uV rms >> Intrinsic jitter: 1ps rms >> >> Then the input signal slew rate at the threshold crossing has to be >> greater than >> >> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >> >> to ensure that the output jitter isnt increased by more than 5% from the >> intrinsic jitter. >> >> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >> the zero crossing). >> For such an input signal the output jitter will be about _1.5 ps_. >> This increases to about _1.72ps_ if there is a threshold offset of 1V. >> This can be reduced to about 1.05ps by amplifying the slope of the input >> signal by ~ 3.4x. >> >> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >> low distortion sinewave) of a 74AC04 inverter is about 1ps. >> However the equivalent input noise is unknown. >> The noise could, in principle, be determined by measuring the output >> jitter as a function of the input signal slew rate. >> >> Whilst AM and other noise associated with the source can be reduced by >> filtering, the input noise of a trigger circuit cannot (except perhaps >> for the trigger circuits input current noise). >> >> Magnus Danielson wrote: >> >> >>> Bruce Griffiths skrev: >>> >>> >>> >>>> Ulrich >>>> >>>> Your experience with the SR620 illustrates the point I was making quite >>>> well. >>>> It really does matter what you do in front of the limiter circuit built >>>> into the counter. >>>> A bandpass or any other filter by itself is ineffective unless the >>>> signal is exceptionally noisy. >>>> >>>> By using the inverter in the 74HCT4046 you have added a low gain limiter >>>> stage the bandwidth of which is smaller than that of the SR620 input >>>> circuit. >>>> This has the effect of increasing the slew rate of the input signal >>>> whilst producing an output with less jitter than the SR620 input circuit >>>> would without this low pass filtered limiter circuit (the inverter from >>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>> greater than that of the input signal which means that the jitter due >>>> the counter input circuit noise is smaller than when this low gain low >>>> bandwidth limiter isn't used. >>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>> assuming a single pole response with a 300MHz 3dB high frequency cutoff) >>>> and a correspondingly high total input noise (~350uV rms). >>>> If the slew rate of the SR 620 input signal at the trigger point the >>>> jitter due to this noise dominates the trigger circuit output jitter. >>>> The HP5370 time interval counter input circuit has a lower noise >>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>> limiter) for the same 10MHz signal should be less than that of the SR620 >>>> (without the 74HCT4046 limiter). >>>> >>>> >>>> >>> As a curiosity, there are various variants of the original 4046 which >>> has different sensitivity on the input side... one of them has several >>> inverters in a row to get the needed gain where as the other variant >>> does not. This difference made a huge difference in some applications. >>> >>> >>> >>> >> The appropriate device (one that will have the least output jitter) to >> use will vary with the input signal zero crossing slew rate. >> That is it depends on both the input signal frequency and amplitude. >> >> >> >>>> If one uses a state of the art trigger circuit with a noise bandwidth of >>>> 1GHz or more then the total input noise will be even larger so it >>>> becomes even more important to use an optimised cascade of limiter+ low >>>> output pass filter stages to increase the slew rate of the counter >>>> input trigger circuit at the trigger threshold. >>>> Careful optimisation of the gain of each stage and the corresponding >>>> output filter cutoff frequency for each stage is necessary to minimise >>>> the output jitter of the counter trigger circuit. >>>> There is also an optimum number of such stages that minimises the >>>> trigger jitter. >>>> >>>> The optimisation problem for Limiter stages with gaussian wideband input >>>> noise was solved in the 1990's. >>>> Unfortunately the optimum number of stages, associated gains and output >>>> filter bandwidths depends on the input signal frequency and amplitude so >>>> that in general it isn't possible to use the same limiter cascade for a >>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>> for each frequency and amplitude. >>>> >>>> >>>> >>> Actually, you can make a cascade setup which is approaching optimum and >>> insert signal at the stage where the signals slewrate matches the range >>> for each stage. Since the gain steps is larger later in a slew rate >>> amplifier chain, the last stages may have a little coarse slew rate >>> range, but additional mid-range amplifiers that can act as alternative >>> input amps could curcumvent that such that a wide range but and fairly >>> good trigger jitter could be achieved. >>> >>> The comparator level is fed to whatever stage is the first stage. >>> >>> Such an approach could lead to much improved jitter values for lower >>> frequency signals with associated gain in measurement accuracy. >>> >>> It is easy to make a pre-amplifier set that achieves this, but you want >>> to integrate the control algorithms for automatic use. >>> >>> >>> >>> >> That would constitute an interesting design challenge. >> >> >>>> Thus such circuits aren't usually employed in general purpose frequency >>>> > counters. > >>>> >>>> >>>> >>> Certainly true. A generic counter is usually equipped with triggers such >>> that they can measure slewrate without too much difficulty. >>> >>> >>> >>> >>>> However if the input signal frequency and amplitude are known and stable >>>> then using such a limiter filter cascade is feasible. >>>> >>>> >>>> >>> Indeed. >>> >>> Cheers, >>> Magnus >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >>> and follow the instructions there. >>> >>> >>> >>> >> Bruce >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs in a > recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jra at febo.com Sat Apr 4 20:44:39 2009 From: jra at febo.com (John Ackermann N8UR) Date: Sat, 04 Apr 2009 16:44:39 -0400 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7C0AA.6060708@gmail.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> Message-ID: <49D7C6B7.1090801@febo.com> Hi Brian -- It's good to collect this data; thanks. It's interesting that your std dev in the first test seems to increase significantly with the number of samples; I haven't seen that kind of scaling here (1K sample and 10k sample turned in very similar std dev). From what Poul-Henning said earlier, your first run may suffer the same distortion as my data at the bottom of this thread. I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 (the first real use I've had for that box!) and with 1 PPS input on the start channel, 10 MHz from the same source on the stop channel, and 10K samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as I can determine, the Wavecrest doesn't allow you to use an external reference, and its internal reference runs at 100 MHz so it probably wouldn't be useful in this measurement.) That's consistent with what I measured earlier with the 5370B when I didn't have the reference and the inputs in coherence. It appears that the test below, where I used the same reference for *everything* triggered the problem that Poul-Henning warned about, so those results should be disregarded. While I haven't done any testing to validate this, I think the complaint about the 74HC390 dividers isn't so much their jitter in normal use, but the tempco problems the cascaded stages can cause. If you can do it, it would be interesting to measure the phase change over temperature -- I've done a preliminary experiment on that for the TADD-2, but plan to rerun it with much better measurement technique. I'm also hoping to do a jitter and tempco test of the Wenzel input conditioning circuit by itself. I really like that circuit for its wide input amplitude range. John ---- Brian Kirby said the following on 04/04/2009 04:18 PM: > I will report some results on a asynchronous divider, which I basically > copied from Dr. Thomas Clark's designs, which everybody likes to report > as a bad design. > > The 10 MHz input signal is coupled thru a resistor and capacitor. On > the other side of the capacitor is the resistive divider that is tied to > Vcc and ground - it biases the signal to 2.5 volts, which is feed to the > input of the 74HC132. The output of the 74HC132 feeds several 74HC390s > until it becomes a buffered 1 pulse per second signal. I also have > buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used > to externally synchronize the 74HC390s. > > I used the Thunderbolt as the source of 10 MHz and it was feed to the > divider, and the stop input on the HP5370B. The 5370B was run on > internal clock. The 1 PPS from the divider feed the start input on the > 5370B. > > 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. > 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS > 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS > 100K planned > > Also a second test, using the Thunderbolt as a source of 10 MHz and it > was feed to the divider, the stop input on the 5370B and the external > clock of the 5370B. The 1 PPS from the divider feed the start input on > the 5370B. > > 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS > 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS > 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS > 100K measurement in progress. > > I believe having STD in parts of 10-14th is fairly respectable for > amateur designs.. > > Brian KD4FM > > John Ackermann N8UR wrote: >> I just finished a jitter test of the first TADD-2 built on the >> production circuit board. >> >> The configuration was somewhat optimized from what I used for the >> earlier tests. >> >> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >> 5370B external reference input, and to the 5370B STOP channel. The 1 >> PPS output from the TADD-2 was connected to the 5370B START channel. >> Thus any reference jitter shouldn't be common-mode, and using the >> reference clock on the STOP channel avoids the need for a second >> divider, and ensures that the time interval is small (always less than >> 100 ns; in this case, about 90 ns). >> >> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >> and the peak-to-peak variation was 70 picoseconds. Based on experiments >> I ran a few years ago, I think this is pretty much the noise floor of >> the 5370B and the divider could be better than this. >> >> John >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From bruce.griffiths at xtra.co.nz Sat Apr 4 20:46:38 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 08:46:38 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7C0AA.6060708@gmail.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> Message-ID: <49D7C72E.50501@xtra.co.nz> Brian The 5370B has inadequate resolution and noise to allow detection of the difference between a jitter of say 1ps or one 4x that. Your longer term measurements probably reflect the combined effect of thermal drift in the 5370B and thermal drift in the divider propagation delay. The acceptable output jitter of a divider depends on the application for which it is intended. For generating a PPS signal for comparing with other PPS signals using a time interval counter like the SR620 or HP5370A/B almost any reasonable design will have an output jitter that is difficult to measure with such a time interval counter. However for long term measurements the clock to output delay tempco will be rather large for a non fully sysnchronous divider. If one wishes to use the output as a frequency standard for a low noise synthesizer or similar application then the phase noise characteristics of the divider output are more critical. Bruce Brian Kirby wrote: > I will report some results on a asynchronous divider, which I basically > copied from Dr. Thomas Clark's designs, which everybody likes to report > as a bad design. > > The 10 MHz input signal is coupled thru a resistor and capacitor. On > the other side of the capacitor is the resistive divider that is tied to > Vcc and ground - it biases the signal to 2.5 volts, which is feed to the > input of the 74HC132. The output of the 74HC132 feeds several 74HC390s > until it becomes a buffered 1 pulse per second signal. I also have > buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used > to externally synchronize the 74HC390s. > > I used the Thunderbolt as the source of 10 MHz and it was feed to the > divider, and the stop input on the HP5370B. The 5370B was run on > internal clock. The 1 PPS from the divider feed the start input on the > 5370B. > > 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. > 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS > 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS > 100K planned > > Also a second test, using the Thunderbolt as a source of 10 MHz and it > was feed to the divider, the stop input on the 5370B and the external > clock of the 5370B. The 1 PPS from the divider feed the start input on > the 5370B. > > 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS > 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS > 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS > 100K measurement in progress. > > I believe having STD in parts of 10-14th is fairly respectable for > amateur designs.. > > Brian KD4FM > > John Ackermann N8UR wrote: > >> I just finished a jitter test of the first TADD-2 built on the >> production circuit board. >> >> The configuration was somewhat optimized from what I used for the >> earlier tests. >> >> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >> 5370B external reference input, and to the 5370B STOP channel. The 1 >> PPS output from the TADD-2 was connected to the 5370B START channel. >> Thus any reference jitter shouldn't be common-mode, and using the >> reference clock on the STOP channel avoids the need for a second >> divider, and ensures that the time interval is small (always less than >> 100 ns; in this case, about 90 ns). >> >> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >> and the peak-to-peak variation was 70 picoseconds. Based on experiments >> I ran a few years ago, I think this is pretty much the noise floor of >> the 5370B and the divider could be better than this. >> >> John >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From EWKehren at aol.com Sat Apr 4 20:51:46 2009 From: EWKehren at aol.com (EWKehren at aol.com) Date: Sat, 4 Apr 2009 16:51:46 EDT Subject: [time-nuts] time-nuts Frequency Divider Message-ID: Bruce, thank you for the info. I have never had the need or desire to get 1 ps accuracy however in designing low noise signal sources I have always had to battle reference oscillator noise and was often nor sure if it was the oscillator or the input circuit. However I would like to see a recommendation as to an attainable design. Thanks again Bert In a message dated 4/4/2009 4:35:09 P.M. Eastern Daylight Time, bruce.griffiths at xtra.co.nz writes: Bert Neither the HP5370 nor the SR620 have low enough internal jitter to accurately characterise the intrinisic output jitter of either a 74HC04 (~4ps) or a 74AC04 (~1ps). Rather than just tossing together a divider from various parts though to produce an output with low jitter its better to be able to characterise the jitter properties (intrinsic as well as that due to logic device input noise with a finite input signal slew rate) of various logic families. It is then possible to actually design a sine to logic level converter that achieves the lowest possible output jitter for a given complexity and specified input frequency and amplitude. The real problem is that one needs to accurately measure jitter of 1ps or so. There are few time interval counters that allow this. One can also measure the change in noise floor when such a device is placed in the clock input path of a high frequency ADC and thence derive the jitter. In principle, the output jitter of a divider can also be calculated from the phase noise spectrum of its output. Bruce EWKehren at aol.com wrote: > Having built eight of Brooks units, my experience was that the problem was > not with the amplifier but the way the RS F/F in the phase comparator II was > working in some of the devices. For me they all worked in the oscillator input > but some brands did not work properly with the GPS input. With all the dialog > on the divider subject, is it not time to develop one design that combines > KISS and all the collective know how? Bert Kehren WB5MZJ > > > In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Correction: > > I forgot to include the intrinsic jitter of the gate in the calculations. > See underlined corrections below. > > > Bruce > > Bruce Griffiths wrote: > > > >> Magnus >> >> The input noise of a logic inverter or other trigger device used as a >> clock shaper is important. >> If we have a logic inverter device with the following characteristics: >> >> Input noise: 100uV rms >> Intrinsic jitter: 1ps rms >> >> Then the input signal slew rate at the threshold crossing has to be >> greater than >> >> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >> >> to ensure that the output jitter isnt increased by more than 5% from the >> intrinsic jitter. >> >> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >> the zero crossing). >> For such an input signal the output jitter will be about _1.5 ps_. >> This increases to about _1.72ps_ if there is a threshold offset of 1V. >> This can be reduced to about 1.05ps by amplifying the slope of the input >> signal by ~ 3.4x. >> >> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >> low distortion sinewave) of a 74AC04 inverter is about 1ps. >> However the equivalent input noise is unknown. >> The noise could, in principle, be determined by measuring the output >> jitter as a function of the input signal slew rate. >> >> Whilst AM and other noise associated with the source can be reduced by >> filtering, the input noise of a trigger circuit cannot (except perhaps >> for the trigger circuits input current noise). >> >> Magnus Danielson wrote: >> >> >>> Bruce Griffiths skrev: >>> >>> >>> >>>> Ulrich >>>> >>>> Your experience with the SR620 illustrates the point I was making quite >>>> well. >>>> It really does matter what you do in front of the limiter circuit built >>>> into the counter. >>>> A bandpass or any other filter by itself is ineffective unless the >>>> signal is exceptionally noisy. >>>> >>>> By using the inverter in the 74HCT4046 you have added a low gain limiter >>>> stage the bandwidth of which is smaller than that of the SR620 input >>>> circuit. >>>> This has the effect of increasing the slew rate of the input signal >>>> whilst producing an output with less jitter than the SR620 input circuit >>>> would without this low pass filtered limiter circuit (the inverter from >>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>> greater than that of the input signal which means that the jitter due >>>> the counter input circuit noise is smaller than when this low gain low >>>> bandwidth limiter isn't used. >>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>> assuming a single pole response with a 300MHz 3dB high frequency cutoff) >>>> and a correspondingly high total input noise (~350uV rms). >>>> If the slew rate of the SR 620 input signal at the trigger point the >>>> jitter due to this noise dominates the trigger circuit output jitter. >>>> The HP5370 time interval counter input circuit has a lower noise >>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>> limiter) for the same 10MHz signal should be less than that of the SR620 >>>> (without the 74HCT4046 limiter). >>>> >>>> >>>> >>> As a curiosity, there are various variants of the original 4046 which >>> has different sensitivity on the input side... one of them has several >>> inverters in a row to get the needed gain where as the other variant >>> does not. This difference made a huge difference in some applications. >>> >>> >>> >>> >> The appropriate device (one that will have the least output jitter) to >> use will vary with the input signal zero crossing slew rate. >> That is it depends on both the input signal frequency and amplitude. >> >> >> >>>> If one uses a state of the art trigger circuit with a noise bandwidth of >>>> 1GHz or more then the total input noise will be even larger so it >>>> becomes even more important to use an optimised cascade of limiter+ low >>>> output pass filter stages to increase the slew rate of the counter >>>> input trigger circuit at the trigger threshold. >>>> Careful optimisation of the gain of each stage and the corresponding >>>> output filter cutoff frequency for each stage is necessary to minimise >>>> the output jitter of the counter trigger circuit. >>>> There is also an optimum number of such stages that minimises the >>>> trigger jitter. >>>> >>>> The optimisation problem for Limiter stages with gaussian wideband input >>>> noise was solved in the 1990's. >>>> Unfortunately the optimum number of stages, associated gains and output >>>> filter bandwidths depends on the input signal frequency and amplitude so >>>> that in general it isn't possible to use the same limiter cascade for a >>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>> for each frequency and amplitude. >>>> >>>> >>>> >>> Actually, you can make a cascade setup which is approaching optimum and >>> insert signal at the stage where the signals slewrate matches the range >>> for each stage. Since the gain steps is larger later in a slew rate >>> amplifier chain, the last stages may have a little coarse slew rate >>> range, but additional mid-range amplifiers that can act as alternative >>> input amps could curcumvent that such that a wide range but and fairly >>> good trigger jitter could be achieved. >>> >>> The comparator level is fed to whatever stage is the first stage. >>> >>> Such an approach could lead to much improved jitter values for lower >>> frequency signals with associated gain in measurement accuracy. >>> >>> It is easy to make a pre-amplifier set that achieves this, but you want >>> to integrate the control algorithms for automatic use. >>> >>> >>> >>> >> That would constitute an interesting design challenge. >> >> >>>> Thus such circuits aren't usually employed in general purpose frequency >>>> > counters. > >>>> >>>> >>>> >>> Certainly true. A generic counter is usually equipped with triggers such >>> that they can measure slewrate without too much difficulty. >>> >>> >>> >>> >>>> However if the input signal frequency and amplitude are known and stable >>>> then using such a limiter filter cascade is feasible. >>>> >>>> >>>> >>> Indeed. >>> >>> Cheers, >>> Magnus >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >>> and follow the instructions there. >>> >>> >>> >>> >> Bruce >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs in a > recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) From bruce.griffiths at xtra.co.nz Sat Apr 4 21:33:01 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 09:33:01 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7C6B7.1090801@febo.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> Message-ID: <49D7D20D.5030208@xtra.co.nz> John One can cure the propagation delay tempco associated with a 74HC390 divider string by resynchronising the output to the input clock. However worst case design means that a 3 stage synchroniser is required. Assuming a 10Mhz input clock frequency: First resychronise the output to 1MHz (worst case propagation delay for PPS output is < 1us) Then resynchronise this output to 2MHz (assumes a biquinary configuration for the 1st 1/2 of the input '390) Finally resynchronise this output to the 10MHz input clock. Bruce John Ackermann N8UR wrote: > Hi Brian -- > > It's good to collect this data; thanks. It's interesting that your std > dev in the first test seems to increase significantly with the number of > samples; I haven't seen that kind of scaling here (1K sample and 10k > sample turned in very similar std dev). From what Poul-Henning said > earlier, your first run may suffer the same distortion as my data at the > bottom of this thread. > > I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 > (the first real use I've had for that box!) and with 1 PPS input on the > start channel, 10 MHz from the same source on the stop channel, and 10K > samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as > I can determine, the Wavecrest doesn't allow you to use an external > reference, and its internal reference runs at 100 MHz so it probably > wouldn't be useful in this measurement.) > > That's consistent with what I measured earlier with the 5370B when I > didn't have the reference and the inputs in coherence. It appears that > the test below, where I used the same reference for *everything* > triggered the problem that Poul-Henning warned about, so those results > should be disregarded. > > While I haven't done any testing to validate this, I think the complaint > about the 74HC390 dividers isn't so much their jitter in normal use, but > the tempco problems the cascaded stages can cause. If you can do it, it > would be interesting to measure the phase change over temperature -- > I've done a preliminary experiment on that for the TADD-2, but plan to > rerun it with much better measurement technique. > > I'm also hoping to do a jitter and tempco test of the Wenzel input > conditioning circuit by itself. I really like that circuit for its wide > input amplitude range. > > John > ---- > Brian Kirby said the following on 04/04/2009 04:18 PM: > >> I will report some results on a asynchronous divider, which I basically >> copied from Dr. Thomas Clark's designs, which everybody likes to report >> as a bad design. >> >> The 10 MHz input signal is coupled thru a resistor and capacitor. On >> the other side of the capacitor is the resistive divider that is tied to >> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the >> input of the 74HC132. The output of the 74HC132 feeds several 74HC390s >> until it becomes a buffered 1 pulse per second signal. I also have >> buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used >> to externally synchronize the 74HC390s. >> >> I used the Thunderbolt as the source of 10 MHz and it was feed to the >> divider, and the stop input on the HP5370B. The 5370B was run on >> internal clock. The 1 PPS from the divider feed the start input on the >> 5370B. >> >> 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. >> 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS >> 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS >> 100K planned >> >> Also a second test, using the Thunderbolt as a source of 10 MHz and it >> was feed to the divider, the stop input on the 5370B and the external >> clock of the 5370B. The 1 PPS from the divider feed the start input on >> the 5370B. >> >> 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS >> 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS >> 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS >> 100K measurement in progress. >> >> I believe having STD in parts of 10-14th is fairly respectable for >> amateur designs.. >> >> Brian KD4FM >> >> John Ackermann N8UR wrote: >> >>> I just finished a jitter test of the first TADD-2 built on the >>> production circuit board. >>> >>> The configuration was somewhat optimized from what I used for the >>> earlier tests. >>> >>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >>> 5370B external reference input, and to the 5370B STOP channel. The 1 >>> PPS output from the TADD-2 was connected to the 5370B START channel. >>> Thus any reference jitter shouldn't be common-mode, and using the >>> reference clock on the STOP channel avoids the need for a second >>> divider, and ensures that the time interval is small (always less than >>> 100 ns; in this case, about 90 ns). >>> >>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >>> and the peak-to-peak variation was 70 picoseconds. Based on experiments >>> I ran a few years ago, I think this is pretty much the noise floor of >>> the 5370B and the divider could be better than this. >>> >>> John >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Sat Apr 4 21:37:18 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 09:37:18 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7C6B7.1090801@febo.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> Message-ID: <49D7D30E.40208@xtra.co.nz> John With a slow slew rate input signal like a 10MHz sinewave the Wavecrest jitter due to the noise of its wideband input amplifiers may be quite high. So it may be better to measure the relative jitter of 2 dividers. Bruce John Ackermann N8UR wrote: > Hi Brian -- > > It's good to collect this data; thanks. It's interesting that your std > dev in the first test seems to increase significantly with the number of > samples; I haven't seen that kind of scaling here (1K sample and 10k > sample turned in very similar std dev). From what Poul-Henning said > earlier, your first run may suffer the same distortion as my data at the > bottom of this thread. > > I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 > (the first real use I've had for that box!) and with 1 PPS input on the > start channel, 10 MHz from the same source on the stop channel, and 10K > samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as > I can determine, the Wavecrest doesn't allow you to use an external > reference, and its internal reference runs at 100 MHz so it probably > wouldn't be useful in this measurement.) > > That's consistent with what I measured earlier with the 5370B when I > didn't have the reference and the inputs in coherence. It appears that > the test below, where I used the same reference for *everything* > triggered the problem that Poul-Henning warned about, so those results > should be disregarded. > > While I haven't done any testing to validate this, I think the complaint > about the 74HC390 dividers isn't so much their jitter in normal use, but > the tempco problems the cascaded stages can cause. If you can do it, it > would be interesting to measure the phase change over temperature -- > I've done a preliminary experiment on that for the TADD-2, but plan to > rerun it with much better measurement technique. > > I'm also hoping to do a jitter and tempco test of the Wenzel input > conditioning circuit by itself. I really like that circuit for its wide > input amplitude range. > > John > ---- > Brian Kirby said the following on 04/04/2009 04:18 PM: > >> I will report some results on a asynchronous divider, which I basically >> copied from Dr. Thomas Clark's designs, which everybody likes to report >> as a bad design. >> >> The 10 MHz input signal is coupled thru a resistor and capacitor. On >> the other side of the capacitor is the resistive divider that is tied to >> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the >> input of the 74HC132. The output of the 74HC132 feeds several 74HC390s >> until it becomes a buffered 1 pulse per second signal. I also have >> buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used >> to externally synchronize the 74HC390s. >> >> I used the Thunderbolt as the source of 10 MHz and it was feed to the >> divider, and the stop input on the HP5370B. The 5370B was run on >> internal clock. The 1 PPS from the divider feed the start input on the >> 5370B. >> >> 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. >> 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS >> 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS >> 100K planned >> >> Also a second test, using the Thunderbolt as a source of 10 MHz and it >> was feed to the divider, the stop input on the 5370B and the external >> clock of the 5370B. The 1 PPS from the divider feed the start input on >> the 5370B. >> >> 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS >> 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS >> 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS >> 100K measurement in progress. >> >> I believe having STD in parts of 10-14th is fairly respectable for >> amateur designs.. >> >> Brian KD4FM >> >> John Ackermann N8UR wrote: >> >>> I just finished a jitter test of the first TADD-2 built on the >>> production circuit board. >>> >>> The configuration was somewhat optimized from what I used for the >>> earlier tests. >>> >>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >>> 5370B external reference input, and to the 5370B STOP channel. The 1 >>> PPS output from the TADD-2 was connected to the 5370B START channel. >>> Thus any reference jitter shouldn't be common-mode, and using the >>> reference clock on the STOP channel avoids the need for a second >>> divider, and ensures that the time interval is small (always less than >>> 100 ns; in this case, about 90 ns). >>> >>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >>> and the peak-to-peak variation was 70 picoseconds. Based on experiments >>> I ran a few years ago, I think this is pretty much the noise floor of >>> the 5370B and the divider could be better than this. >>> >>> John >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jra at febo.com Sat Apr 4 23:04:38 2009 From: jra at febo.com (John Ackermann N8UR) Date: Sat, 04 Apr 2009 19:04:38 -0400 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7D30E.40208@xtra.co.nz> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> Message-ID: <49D7E786.3060903@febo.com> I can do that, but was hoping to isolate the performance of the Wenzel waveform conversion circuit. An initial test showed jitter of about 25 ps -- which is about the same as for the whole divider chain, so you may be correct that the input amplifiers are limiting. But also, I was doing a quick and dirty setup without paying much attention to how the signal was coupled. I'll be able to improve on that in tomorrow's experiments. John ---- Bruce Griffiths said the following on 04/04/2009 05:37 PM: > John > > With a slow slew rate input signal like a 10MHz sinewave the Wavecrest > jitter due to the noise of its wideband input amplifiers may be quite high. > > So it may be better to measure the relative jitter of 2 dividers. > > Bruce > > John Ackermann N8UR wrote: >> Hi Brian -- >> >> It's good to collect this data; thanks. It's interesting that your std >> dev in the first test seems to increase significantly with the number of >> samples; I haven't seen that kind of scaling here (1K sample and 10k >> sample turned in very similar std dev). From what Poul-Henning said >> earlier, your first run may suffer the same distortion as my data at the >> bottom of this thread. >> >> I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 >> (the first real use I've had for that box!) and with 1 PPS input on the >> start channel, 10 MHz from the same source on the stop channel, and 10K >> samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as >> I can determine, the Wavecrest doesn't allow you to use an external >> reference, and its internal reference runs at 100 MHz so it probably >> wouldn't be useful in this measurement.) >> >> That's consistent with what I measured earlier with the 5370B when I >> didn't have the reference and the inputs in coherence. It appears that >> the test below, where I used the same reference for *everything* >> triggered the problem that Poul-Henning warned about, so those results >> should be disregarded. >> >> While I haven't done any testing to validate this, I think the complaint >> about the 74HC390 dividers isn't so much their jitter in normal use, but >> the tempco problems the cascaded stages can cause. If you can do it, it >> would be interesting to measure the phase change over temperature -- >> I've done a preliminary experiment on that for the TADD-2, but plan to >> rerun it with much better measurement technique. >> >> I'm also hoping to do a jitter and tempco test of the Wenzel input >> conditioning circuit by itself. I really like that circuit for its wide >> input amplitude range. >> >> John >> ---- >> Brian Kirby said the following on 04/04/2009 04:18 PM: >> >>> I will report some results on a asynchronous divider, which I basically >>> copied from Dr. Thomas Clark's designs, which everybody likes to report >>> as a bad design. >>> >>> The 10 MHz input signal is coupled thru a resistor and capacitor. On >>> the other side of the capacitor is the resistive divider that is tied to >>> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the >>> input of the 74HC132. The output of the 74HC132 feeds several 74HC390s >>> until it becomes a buffered 1 pulse per second signal. I also have >>> buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used >>> to externally synchronize the 74HC390s. >>> >>> I used the Thunderbolt as the source of 10 MHz and it was feed to the >>> divider, and the stop input on the HP5370B. The 5370B was run on >>> internal clock. The 1 PPS from the divider feed the start input on the >>> 5370B. >>> >>> 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. >>> 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS >>> 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS >>> 100K planned >>> >>> Also a second test, using the Thunderbolt as a source of 10 MHz and it >>> was feed to the divider, the stop input on the 5370B and the external >>> clock of the 5370B. The 1 PPS from the divider feed the start input on >>> the 5370B. >>> >>> 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS >>> 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS >>> 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS >>> 100K measurement in progress. >>> >>> I believe having STD in parts of 10-14th is fairly respectable for >>> amateur designs.. >>> >>> Brian KD4FM >>> >>> John Ackermann N8UR wrote: >>> >>>> I just finished a jitter test of the first TADD-2 built on the >>>> production circuit board. >>>> >>>> The configuration was somewhat optimized from what I used for the >>>> earlier tests. >>>> >>>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >>>> 5370B external reference input, and to the 5370B STOP channel. The 1 >>>> PPS output from the TADD-2 was connected to the 5370B START channel. >>>> Thus any reference jitter shouldn't be common-mode, and using the >>>> reference clock on the STOP channel avoids the need for a second >>>> divider, and ensures that the time interval is small (always less than >>>> 100 ns; in this case, about 90 ns). >>>> >>>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >>>> and the peak-to-peak variation was 70 picoseconds. Based on experiments >>>> I ran a few years ago, I think this is pretty much the noise floor of >>>> the 5370B and the divider could be better than this. >>>> >>>> John >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>>> >>>> >>>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From bruce.griffiths at xtra.co.nz Sat Apr 4 23:07:57 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 11:07:57 +1200 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: <49D7E84D.7000601@xtra.co.nz> Bert Unless you can provide a set of specifications it isn't possible to recommend any particular design as being fit for the application. For the purposes of comparing a divider generated PPS signal against a GPS derived PPS output almost any input clock shaper should have adequate performance. For such applications achieving a sufficiently low jitter PPS output can be achieved using almost any divider chain. However ensuring a low clock to output propagation delay tempco is entirely another matter and either requires a fully synchronous divider or using an output retiming synchroniser. If multiple ripple clocking is used in the divider then a 3 stage synchroniser that first resynchronises to 1MHz, then 2MHz and finally to 10MHz may be required. If the lower frequency dividers in the cascade use something as slow as 4000 series CMOS then even more synchroniser stages will be required. If we consider minimising the trigger jitter of an SR620 driven from say a 2V pp 10MHz sine wave, then a single stage limiter with a slope gain of about 5x and a bandwidth of about 50MHz will ensure that the trigger circuit jitter due to its linter and trigger circuit input noise is reduced to below 2ps rms with a low noise input source. If a 2 stage limiter cascade with the same slope gain is used the jitter due to limiter and trigger circuit input noise can be reduced to below 1.3ps rms with a low noise source if the low pass filter time constant at the output of each stage is chosen appropriately. If the output of a divider is to be used as a low phase noise source then picosecond or even subpicosecond jitter is desirable. For the ultimate performance in such applications a regenerative divider can have a much lower output phase noise than a digital divider. Injection locked dividers are one form of regenerative divider complete with integrated mixer and filter, however conjugate regenerative dividers using a diode mixer and low phase noise amplifier etc will have lower phase noise. Bruce EWKehren at aol.com wrote: > Bruce, thank you for the info. I have never had the need or desire to get 1 > ps accuracy however in designing low noise signal sources I have always had to > battle reference oscillator noise and was often nor sure if it was the > oscillator or the input circuit. However I would like to see a recommendation as > to an attainable design. Thanks again Bert > > > In a message dated 4/4/2009 4:35:09 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Bert > > Neither the HP5370 nor the SR620 have low enough internal jitter to > accurately characterise the intrinisic output jitter of either a 74HC04 > (~4ps) or a 74AC04 (~1ps). > Rather than just tossing together a divider from various parts though to > produce an output with low jitter its better to be able to characterise > the jitter properties (intrinsic as well as that due to logic device > input noise with a finite input signal slew rate) of various logic > families. > It is then possible to actually design a sine to logic level converter > that achieves the lowest possible output jitter for a given complexity > and specified input frequency and amplitude. > > The real problem is that one needs to accurately measure jitter of 1ps > or so. > There are few time interval counters that allow this. > One can also measure the change in noise floor when such a device is > placed in the clock input path of a high frequency ADC and thence derive > the jitter. > In principle, the output jitter of a divider can also be calculated from > the phase noise spectrum of its output. > > Bruce > > > > EWKehren at aol.com wrote: > >> Having built eight of Brooks units, my experience was that the problem was >> > > >> not with the amplifier but the way the RS F/F in the phase comparator II >> > was > >> working in some of the devices. For me they all worked in the oscillator >> > input > >> but some brands did not work properly with the GPS input. With all the >> > dialog > >> on the divider subject, is it not time to develop one design that >> > combines > >> KISS and all the collective know how? Bert Kehren WB5MZJ >> >> >> In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, >> bruce.griffiths at xtra.co.nz writes: >> >> Correction: >> >> I forgot to include the intrinsic jitter of the gate in the calculations. >> See underlined corrections below. >> >> >> Bruce >> >> Bruce Griffiths wrote: >> >> >> >> >>> Magnus >>> >>> The input noise of a logic inverter or other trigger device used as a >>> clock shaper is important. >>> If we have a logic inverter device with the following characteristics: >>> >>> Input noise: 100uV rms >>> Intrinsic jitter: 1ps rms >>> >>> Then the input signal slew rate at the threshold crossing has to be >>> greater than >>> >>> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >>> >>> to ensure that the output jitter isnt increased by more than 5% from the >>> intrinsic jitter. >>> >>> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >>> the zero crossing). >>> For such an input signal the output jitter will be about _1.5 ps_. >>> This increases to about _1.72ps_ if there is a threshold offset of 1V. >>> This can be reduced to about 1.05ps by amplifying the slope of the input >>> signal by ~ 3.4x. >>> >>> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >>> low distortion sinewave) of a 74AC04 inverter is about 1ps. >>> However the equivalent input noise is unknown. >>> The noise could, in principle, be determined by measuring the output >>> jitter as a function of the input signal slew rate. >>> >>> Whilst AM and other noise associated with the source can be reduced by >>> filtering, the input noise of a trigger circuit cannot (except perhaps >>> for the trigger circuits input current noise). >>> >>> Magnus Danielson wrote: >>> >>> >>> >>>> Bruce Griffiths skrev: >>>> >>>> >>>> >>>> >>>>> Ulrich >>>>> >>>>> Your experience with the SR620 illustrates the point I was making >>>>> > quite > >>>>> well. >>>>> It really does matter what you do in front of the limiter circuit built >>>>> into the counter. >>>>> A bandpass or any other filter by itself is ineffective unless the >>>>> signal is exceptionally noisy. >>>>> >>>>> By using the inverter in the 74HCT4046 you have added a low gain >>>>> > limiter > >>>>> stage the bandwidth of which is smaller than that of the SR620 input >>>>> circuit. >>>>> This has the effect of increasing the slew rate of the input signal >>>>> whilst producing an output with less jitter than the SR620 input >>>>> > circuit > >>>>> would without this low pass filtered limiter circuit (the inverter from >>>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>>> greater than that of the input signal which means that the jitter due >>>>> the counter input circuit noise is smaller than when this low gain low >>>>> bandwidth limiter isn't used. >>>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>>> assuming a single pole response with a 300MHz 3dB high frequency >>>>> > cutoff) > >>>>> and a correspondingly high total input noise (~350uV rms). >>>>> If the slew rate of the SR 620 input signal at the trigger point the >>>>> jitter due to this noise dominates the trigger circuit output jitter. >>>>> The HP5370 time interval counter input circuit has a lower noise >>>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>>> limiter) for the same 10MHz signal should be less than that of the >>>>> > SR620 > >>>>> (without the 74HCT4046 limiter). >>>>> >>>>> >>>>> >>>>> >>>> As a curiosity, there are various variants of the original 4046 which >>>> has different sensitivity on the input side... one of them has several >>>> inverters in a row to get the needed gain where as the other variant >>>> does not. This difference made a huge difference in some applications. >>>> >>>> >>>> >>>> >>>> >>> The appropriate device (one that will have the least output jitter) to >>> use will vary with the input signal zero crossing slew rate. >>> That is it depends on both the input signal frequency and amplitude. >>> >>> >>> >>> >>>>> If one uses a state of the art trigger circuit with a noise bandwidth >>>>> > of > >>>>> 1GHz or more then the total input noise will be even larger so it >>>>> becomes even more important to use an optimised cascade of limiter+ low >>>>> output pass filter stages to increase the slew rate of the counter >>>>> input trigger circuit at the trigger threshold. >>>>> Careful optimisation of the gain of each stage and the corresponding >>>>> output filter cutoff frequency for each stage is necessary to minimise >>>>> the output jitter of the counter trigger circuit. >>>>> There is also an optimum number of such stages that minimises the >>>>> trigger jitter. >>>>> >>>>> The optimisation problem for Limiter stages with gaussian wideband >>>>> > input > >>>>> noise was solved in the 1990's. >>>>> Unfortunately the optimum number of stages, associated gains and output >>>>> filter bandwidths depends on the input signal frequency and amplitude >>>>> > so > >>>>> that in general it isn't possible to use the same limiter cascade for a >>>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>>> for each frequency and amplitude. >>>>> >>>>> >>>>> >>>>> >>>> Actually, you can make a cascade setup which is approaching optimum and >>>> insert signal at the stage where the signals slewrate matches the range >>>> > > >>>> for each stage. Since the gain steps is larger later in a slew rate >>>> amplifier chain, the last stages may have a little coarse slew rate >>>> range, but additional mid-range amplifiers that can act as alternative >>>> input amps could curcumvent that such that a wide range but and fairly >>>> good trigger jitter could be achieved. >>>> >>>> The comparator level is fed to whatever stage is the first stage. >>>> >>>> Such an approach could lead to much improved jitter values for lower >>>> frequency signals with associated gain in measurement accuracy. >>>> >>>> It is easy to make a pre-amplifier set that achieves this, but you want >>>> to integrate the control algorithms for automatic use. >>>> >>>> >>>> >>>> >>>> >>> That would constitute an interesting design challenge. >>> >>> >>> >>>>> Thus such circuits aren't usually employed in general purpose >>>>> > frequency > >>>>> >>>>> >> counters. >> >> >>>>> >>>>> >>>>> >>>>> >>>> Certainly true. A generic counter is usually equipped with triggers >>>> > such > >>>> that they can measure slewrate without too much difficulty. >>>> >>>> >>>> >>>> >>>> >>>>> However if the input signal frequency and amplitude are known and >>>>> > stable > >>>>> then using such a limiter filter cascade is feasible. >>>>> >>>>> >>>>> >>>>> >>>> Indeed. >>>> >>>> Cheers, >>>> Magnus >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com >>>> To unsubscribe, go to >>>> >>>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>>> and follow the instructions there. >>>> >>>> >>>> >>>> >>>> >>> Bruce >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>> and follow the instructions there. >>> >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> **************Worried about job security? Check out the 5 safest jobs in a >> recession. >> >> > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs in a > recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jmiles at pop.net Sat Apr 4 23:10:19 2009 From: jmiles at pop.net (John Miles) Date: Sat, 4 Apr 2009 16:10:19 -0700 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7C6B7.1090801@febo.com> Message-ID: > > I believe having STD in parts of 10-14th is fairly respectable for > > amateur designs.. It depends on whether it's due to the counter or the DUT. Keep in mind the 5370's own jitter is about 15-20 ps for a best-case unit (and they all seem to be a bit different). For an application like an ADC sampling clock, SNR is 20*log(1/(2*pi*freq*jitter)). In this case the jitter floor is around 10 ps, and you would like to think the device itself is cleaner. Using that equation, 10 ps of jitter at 10 MHz puts the SNR at about 64 dB. That's about the same SNR floor that you'd see if you used a traditional microwave spectrum analyzer to observe the integrated noise on the same 10 MHz source. You would never try to use a conventional SA to measure phase noise on a 10 MHz source, unless you knew from the outset that you had a really, seriously awful 10 MHz source. Likewise, you can't use a conventional time-interval counter to characterize the jitter in the time domain. You need a specialized test set, either a very clean direct-sampling ADC/FFT or another type of baseband PN analyzer. > >> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, > >> and the peak-to-peak variation was 70 picoseconds. Based on > experiments > >> I ran a few years ago, I think this is pretty much the noise floor of > >> the 5370B and the divider could be better than this. Exactly. The divider had better be *much* better than that, or it is not useful for a large number of applications. The TSC5120 can do residual noise measurements, right...? That's the better tool for the job. -- john, KE5FX From bruce.griffiths at xtra.co.nz Sat Apr 4 23:16:11 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 11:16:11 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7E786.3060903@febo.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> <49D7E786.3060903@febo.com> Message-ID: <49D7EA3B.7080502@xtra.co.nz> John The jitter of the Wenzel waveform conversion circuit will vary with the input signal amplitude. Thus one could probably measure the jitter as a function of input signal amplitude and derive the waveform conversion circuit jitter performance from that data. Bruce John Ackermann N8UR wrote: > I can do that, but was hoping to isolate the performance of the Wenzel > waveform conversion circuit. An initial test showed jitter of about 25 > ps -- which is about the same as for the whole divider chain, so you may > be correct that the input amplifiers are limiting. But also, I was > doing a quick and dirty setup without paying much attention to how the > signal was coupled. I'll be able to improve on that in tomorrow's > experiments. > > John > ---- > > Bruce Griffiths said the following on 04/04/2009 05:37 PM: > >> John >> >> With a slow slew rate input signal like a 10MHz sinewave the Wavecrest >> jitter due to the noise of its wideband input amplifiers may be quite high. >> >> So it may be better to measure the relative jitter of 2 dividers. >> >> Bruce >> >> John Ackermann N8UR wrote: >> >>> Hi Brian -- >>> >>> It's good to collect this data; thanks. It's interesting that your std >>> dev in the first test seems to increase significantly with the number of >>> samples; I haven't seen that kind of scaling here (1K sample and 10k >>> sample turned in very similar std dev). From what Poul-Henning said >>> earlier, your first run may suffer the same distortion as my data at the >>> bottom of this thread. >>> >>> I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 >>> (the first real use I've had for that box!) and with 1 PPS input on the >>> start channel, 10 MHz from the same source on the stop channel, and 10K >>> samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as >>> I can determine, the Wavecrest doesn't allow you to use an external >>> reference, and its internal reference runs at 100 MHz so it probably >>> wouldn't be useful in this measurement.) >>> >>> That's consistent with what I measured earlier with the 5370B when I >>> didn't have the reference and the inputs in coherence. It appears that >>> the test below, where I used the same reference for *everything* >>> triggered the problem that Poul-Henning warned about, so those results >>> should be disregarded. >>> >>> While I haven't done any testing to validate this, I think the complaint >>> about the 74HC390 dividers isn't so much their jitter in normal use, but >>> the tempco problems the cascaded stages can cause. If you can do it, it >>> would be interesting to measure the phase change over temperature -- >>> I've done a preliminary experiment on that for the TADD-2, but plan to >>> rerun it with much better measurement technique. >>> >>> I'm also hoping to do a jitter and tempco test of the Wenzel input >>> conditioning circuit by itself. I really like that circuit for its wide >>> input amplitude range. >>> >>> John >>> ---- >>> Brian Kirby said the following on 04/04/2009 04:18 PM: >>> >>> >>>> I will report some results on a asynchronous divider, which I basically >>>> copied from Dr. Thomas Clark's designs, which everybody likes to report >>>> as a bad design. >>>> >>>> The 10 MHz input signal is coupled thru a resistor and capacitor. On >>>> the other side of the capacitor is the resistive divider that is tied to >>>> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the >>>> input of the 74HC132. The output of the 74HC132 feeds several 74HC390s >>>> until it becomes a buffered 1 pulse per second signal. I also have >>>> buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used >>>> to externally synchronize the 74HC390s. >>>> >>>> I used the Thunderbolt as the source of 10 MHz and it was feed to the >>>> divider, and the stop input on the HP5370B. The 5370B was run on >>>> internal clock. The 1 PPS from the divider feed the start input on the >>>> 5370B. >>>> >>>> 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. >>>> 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS >>>> 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS >>>> 100K planned >>>> >>>> Also a second test, using the Thunderbolt as a source of 10 MHz and it >>>> was feed to the divider, the stop input on the 5370B and the external >>>> clock of the 5370B. The 1 PPS from the divider feed the start input on >>>> the 5370B. >>>> >>>> 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS >>>> 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS >>>> 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS >>>> 100K measurement in progress. >>>> >>>> I believe having STD in parts of 10-14th is fairly respectable for >>>> amateur designs.. >>>> >>>> Brian KD4FM >>>> >>>> John Ackermann N8UR wrote: >>>> >>>> >>>>> I just finished a jitter test of the first TADD-2 built on the >>>>> production circuit board. >>>>> >>>>> The configuration was somewhat optimized from what I used for the >>>>> earlier tests. >>>>> >>>>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >>>>> 5370B external reference input, and to the 5370B STOP channel. The 1 >>>>> PPS output from the TADD-2 was connected to the 5370B START channel. >>>>> Thus any reference jitter shouldn't be common-mode, and using the >>>>> reference clock on the STOP channel avoids the need for a second >>>>> divider, and ensures that the time interval is small (always less than >>>>> 100 ns; in this case, about 90 ns). >>>>> >>>>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >>>>> and the peak-to-peak variation was 70 picoseconds. Based on experiments >>>>> I ran a few years ago, I think this is pretty much the noise floor of >>>>> the 5370B and the divider could be better than this. >>>>> >>>>> John >>>>> >>>>> _______________________________________________ >>>>> time-nuts mailing list -- time-nuts at febo.com >>>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>> and follow the instructions there. >>>>> >>>>> >>>>> >>>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>>> >>>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From bruce.griffiths at xtra.co.nz Sat Apr 4 23:30:28 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 11:30:28 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7E786.3060903@febo.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> <49D7E786.3060903@febo.com> Message-ID: <49D7ED94.6080304@xtra.co.nz> John I can't find a spec for the Wavecrest 2075 input amplifier/trigger circuit noise but it could be as high as 1mV rms given its 800MHz+ input bandwidth. If the noise is 1mV rms: Then an input signal slew rate of 1V/ns is required to keep the jitter contribution of the amplifier input noise below 1ps rms. A 3 stage limiter cascade with an overall slope gain of about 12x can be used to increase the slew rate of a 10MHz 2V pp input signal to 1V/ns. With an appropriate distribution of limiter stage gain and bandwidth, the jitter contribution due to limiter noise and Wavecrest input noise can be held below1.2ps rms. The jitter contribution due to amplifier input noise with such an input signal connected directly to the Wavecrest input would be about 16ps rms. Bruce John Ackermann N8UR wrote: > I can do that, but was hoping to isolate the performance of the Wenzel > waveform conversion circuit. An initial test showed jitter of about 25 > ps -- which is about the same as for the whole divider chain, so you may > be correct that the input amplifiers are limiting. But also, I was > doing a quick and dirty setup without paying much attention to how the > signal was coupled. I'll be able to improve on that in tomorrow's > experiments. > > John > ---- > > Bruce Griffiths said the following on 04/04/2009 05:37 PM: > >> John >> >> With a slow slew rate input signal like a 10MHz sinewave the Wavecrest >> jitter due to the noise of its wideband input amplifiers may be quite high. >> >> So it may be better to measure the relative jitter of 2 dividers. >> >> Bruce >> >> John Ackermann N8UR wrote: >> >>> Hi Brian -- >>> >>> It's good to collect this data; thanks. It's interesting that your std >>> dev in the first test seems to increase significantly with the number of >>> samples; I haven't seen that kind of scaling here (1K sample and 10k >>> sample turned in very similar std dev). From what Poul-Henning said >>> earlier, your first run may suffer the same distortion as my data at the >>> bottom of this thread. >>> >>> I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075 >>> (the first real use I've had for that box!) and with 1 PPS input on the >>> start channel, 10 MHz from the same source on the stop channel, and 10K >>> samples, I got 22.0 ps of jitter, and a 92 ps min/max range. (As far as >>> I can determine, the Wavecrest doesn't allow you to use an external >>> reference, and its internal reference runs at 100 MHz so it probably >>> wouldn't be useful in this measurement.) >>> >>> That's consistent with what I measured earlier with the 5370B when I >>> didn't have the reference and the inputs in coherence. It appears that >>> the test below, where I used the same reference for *everything* >>> triggered the problem that Poul-Henning warned about, so those results >>> should be disregarded. >>> >>> While I haven't done any testing to validate this, I think the complaint >>> about the 74HC390 dividers isn't so much their jitter in normal use, but >>> the tempco problems the cascaded stages can cause. If you can do it, it >>> would be interesting to measure the phase change over temperature -- >>> I've done a preliminary experiment on that for the TADD-2, but plan to >>> rerun it with much better measurement technique. >>> >>> I'm also hoping to do a jitter and tempco test of the Wenzel input >>> conditioning circuit by itself. I really like that circuit for its wide >>> input amplitude range. >>> >>> John >>> ---- >>> Brian Kirby said the following on 04/04/2009 04:18 PM: >>> >>> >>>> I will report some results on a asynchronous divider, which I basically >>>> copied from Dr. Thomas Clark's designs, which everybody likes to report >>>> as a bad design. >>>> >>>> The 10 MHz input signal is coupled thru a resistor and capacitor. On >>>> the other side of the capacitor is the resistive divider that is tied to >>>> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the >>>> input of the 74HC132. The output of the 74HC132 feeds several 74HC390s >>>> until it becomes a buffered 1 pulse per second signal. I also have >>>> buffered 5 MHz and 1 MHz outputs. The other 3/4 of the 74HC132 are used >>>> to externally synchronize the 74HC390s. >>>> >>>> I used the Thunderbolt as the source of 10 MHz and it was feed to the >>>> divider, and the stop input on the HP5370B. The 5370B was run on >>>> internal clock. The 1 PPS from the divider feed the start input on the >>>> 5370B. >>>> >>>> 100 seconds TI 79.865 nS MIN 79.80 nS MAX 79.98 nS STD 36.4 pS. >>>> 1000 seconds TI 79.831 nS MIN 79.71 nS MAX 80.00 nS STD 49.9 pS >>>> 10K seconds TI 80.1552 nS MIN 79.79 nS MAX 80.88 nS STD 271 pS >>>> 100K planned >>>> >>>> Also a second test, using the Thunderbolt as a source of 10 MHz and it >>>> was feed to the divider, the stop input on the 5370B and the external >>>> clock of the 5370B. The 1 PPS from the divider feed the start input on >>>> the 5370B. >>>> >>>> 100 seconds TI 75.002 nS MIN 74.96 nS MAX 75.04 nS STD 22.5 pS >>>> 1000 seconds TI 74.931 nS MIN 74.80 nS MAX 75.04 nS STD 56.8 pS >>>> 10K seconds TI 77.5135 nS MIN 77.40 nS MAX 77.62 nS STD 35.9 pS >>>> 100K measurement in progress. >>>> >>>> I believe having STD in parts of 10-14th is fairly respectable for >>>> amateur designs.. >>>> >>>> Brian KD4FM >>>> >>>> John Ackermann N8UR wrote: >>>> >>>> >>>>> I just finished a jitter test of the first TADD-2 built on the >>>>> production circuit board. >>>>> >>>>> The configuration was somewhat optimized from what I used for the >>>>> earlier tests. >>>>> >>>>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the >>>>> 5370B external reference input, and to the 5370B STOP channel. The 1 >>>>> PPS output from the TADD-2 was connected to the 5370B START channel. >>>>> Thus any reference jitter shouldn't be common-mode, and using the >>>>> reference clock on the STOP channel avoids the need for a second >>>>> divider, and ensures that the time interval is small (always less than >>>>> 100 ns; in this case, about 90 ns). >>>>> >>>>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, >>>>> and the peak-to-peak variation was 70 picoseconds. Based on experiments >>>>> I ran a few years ago, I think this is pretty much the noise floor of >>>>> the 5370B and the divider could be better than this. >>>>> >>>>> John >>>>> >>>>> _______________________________________________ >>>>> time-nuts mailing list -- time-nuts at febo.com >>>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>>> and follow the instructions there. >>>>> >>>>> >>>>> >>>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com >>>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>>> and follow the instructions there. >>>> >>>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From jra at febo.com Sun Apr 5 00:09:28 2009 From: jra at febo.com (John Ackermann N8UR) Date: Sat, 04 Apr 2009 20:09:28 -0400 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7ED94.6080304@xtra.co.nz> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> <49D7E786.3060903@febo.com> <49D7ED94.6080304@xtra.co.nz> Message-ID: <49D7F6B8.6000701@febo.com> Bruce Griffiths said the following on 04/04/2009 07:30 PM: > John > > I can't find a spec for the Wavecrest 2075 input amplifier/trigger > circuit noise but it could be as high as 1mV rms given its 800MHz+ input > bandwidth. > > If the noise is 1mV rms: > Then an input signal slew rate of 1V/ns is required to keep the jitter > contribution of the amplifier input noise below 1ps rms. > A 3 stage limiter cascade with an overall slope gain of about 12x can be > used to increase the slew rate of a 10MHz 2V pp input signal to 1V/ns. > With an appropriate distribution of limiter stage gain and bandwidth, > the jitter contribution due to limiter noise and Wavecrest input noise > can be held below1.2ps rms. > The jitter contribution due to amplifier input noise with such an input > signal connected directly to the Wavecrest input would be about 16ps rms. Bruce -- A simple experiment just verified your hunch that input amp noise is a limiting factor. Using the Wavecrest in time interval ("total propagation delay") mode with signal going into channel 1, then through a 4 foot cable into channel 2 to generate about 6 ns of delay (with a tee at channel 2 providing a 50 ohm load): A 10 MHz sine wave at 1.0V P-P shows a 100K sample jitter of 23 ps. A 10 MHz pulse train at 1.0V P-P from a 5359A Time Synthesizer (with < 5 ns transition time) shows a 100K sample jitter of 4 ps. I think I missed the point of your suggestion a couple of messages ago, but I get it now -- to measure the input circuit performance, I probably need to use two input circuits, one fed to start and the other to stop, so the Wavecrest can get a better slew rate to deal with, then divide by sqrt(2). That'll be part of tomorrow's experiments... John From bruce.griffiths at xtra.co.nz Sun Apr 5 00:42:28 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 12:42:28 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7F6B8.6000701@febo.com> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> <49D7E786.3060903@febo.com> <49D7ED94.6080304@xtra.co.nz> <49D7F6B8.6000701@febo.com> Message-ID: <49D7FE74.5030708@xtra.co.nz> John The parameters for a simple model for the Wavecrest input jitter can be derived from your measurements as For each channel: Jitter = SQRT[8E-24 + 2.53E-7/(S*S)] Where S is the input signal slew rate at the trigger threshold Input noise ~ 503 uV rms. (2.53E-7 = square of input rms noise) 8E-24 = square of Wavecrest input channel intrinsic jitter (2.8ps rms). Bruce John Ackermann N8UR wrote: > Bruce Griffiths said the following on 04/04/2009 07:30 PM: > >> John >> >> I can't find a spec for the Wavecrest 2075 input amplifier/trigger >> circuit noise but it could be as high as 1mV rms given its 800MHz+ input >> bandwidth. >> >> If the noise is 1mV rms: >> Then an input signal slew rate of 1V/ns is required to keep the jitter >> contribution of the amplifier input noise below 1ps rms. >> A 3 stage limiter cascade with an overall slope gain of about 12x can be >> used to increase the slew rate of a 10MHz 2V pp input signal to 1V/ns. >> With an appropriate distribution of limiter stage gain and bandwidth, >> the jitter contribution due to limiter noise and Wavecrest input noise >> can be held below1.2ps rms. >> The jitter contribution due to amplifier input noise with such an input >> signal connected directly to the Wavecrest input would be about 16ps rms. >> > > Bruce -- > > A simple experiment just verified your hunch that input amp noise is a > limiting factor. Using the Wavecrest in time interval ("total > propagation delay") mode with signal going into channel 1, then through > a 4 foot cable into channel 2 to generate about 6 ns of delay (with a > tee at channel 2 providing a 50 ohm load): > > A 10 MHz sine wave at 1.0V P-P shows a 100K sample jitter of 23 ps. > > A 10 MHz pulse train at 1.0V P-P from a 5359A Time Synthesizer (with < 5 > ns transition time) shows a 100K sample jitter of 4 ps. > > I think I missed the point of your suggestion a couple of messages ago, > but I get it now -- to measure the input circuit performance, I probably > need to use two input circuits, one fed to start and the other to stop, > so the Wavecrest can get a better slew rate to deal with, then divide by > sqrt(2). That'll be part of tomorrow's experiments... > > John > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From peterawson at earthlink.net Sun Apr 5 00:42:39 2009 From: peterawson at earthlink.net (Pete) Date: Sat, 4 Apr 2009 18:42:39 -0600 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz><49D7E786.3060903@febo.com> <49D7ED94.6080304@xtra.co.nz> Message-ID: <90C98A701B1C4CC4B7B61642EE8AEAC2@BASE1> Bruce, Your analysis conforms closely to measured results on my DTS-2075. With the cleanest 10MHz source I have, at 2Vp-p, the DTS-2075 jitter reading is 11.4ps rms. Running this number back into equivalent input noise yields 716uV rms. The DTS-2075 input spec (assumed to be for -3dB response) is 700MHz, which should be nearly 900MHz equivalent noise bandwidth. These numbers are all reasonable & serve to demonstrate the need for low noise signal conditioning. Pete Rawson From bruce.griffiths at xtra.co.nz Sun Apr 5 01:09:35 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Sun, 05 Apr 2009 13:09:35 +1200 Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 In-Reply-To: <49D7FE74.5030708@xtra.co.nz> References: <49D68734.3020900@febo.com> <49D7C0AA.6060708@gmail.com> <49D7C6B7.1090801@febo.com> <49D7D30E.40208@xtra.co.nz> <49D7E786.3060903@febo.com> <49D7ED94.6080304@xtra.co.nz> <49D7F6B8.6000701@febo.com> <49D7FE74.5030708@xtra.co.nz> Message-ID: <49D804CF.3080106@xtra.co.nz> For start stop measurements with the same slew rate signal at each input channel Total jitter = SQRT [16E-24 + 5.06E-7/(S*S)] where the effective (combined) input noise is 711 uV rms. and the intrinsic jitter is 4ps rms. Bruce Bruce Griffiths wrote: > John > > The parameters for a simple model for the Wavecrest input jitter can be > derived from your measurements as > > For each channel: > Jitter = SQRT[8E-24 + 2.53E-7/(S*S)] > Where S is the input signal slew rate at the trigger threshold > > Input noise ~ 503 uV rms. (2.53E-7 = square of input rms noise) > 8E-24 = square of Wavecrest input channel intrinsic jitter (2.8ps rms). > > Bruce > > John Ackermann N8UR wrote: > >> Bruce Griffiths said the following on 04/04/2009 07:30 PM: >> >> >>> John >>> >>> I can't find a spec for the Wavecrest 2075 input amplifier/trigger >>> circuit noise but it could be as high as 1mV rms given its 800MHz+ input >>> bandwidth. >>> >>> If the noise is 1mV rms: >>> Then an input signal slew rate of 1V/ns is required to keep the jitter >>> contribution of the amplifier input noise below 1ps rms. >>> A 3 stage limiter cascade with an overall slope gain of about 12x can be >>> used to increase the slew rate of a 10MHz 2V pp input signal to 1V/ns. >>> With an appropriate distribution of limiter stage gain and bandwidth, >>> the jitter contribution due to limiter noise and Wavecrest input noise >>> can be held below1.2ps rms. >>> The jitter contribution due to amplifier input noise with such an input >>> signal connected directly to the Wavecrest input would be about 16ps rms. >>> >>> >> Bruce -- >> >> A simple experiment just verified your hunch that input amp noise is a >> limiting factor. Using the Wavecrest in time interval ("total >> propagation delay") mode with signal going into channel 1, then through >> a 4 foot cable into channel 2 to generate about 6 ns of delay (with a >> tee at channel 2 providing a 50 ohm load): >> >> A 10 MHz sine wave at 1.0V P-P shows a 100K sample jitter of 23 ps. >> >> A 10 MHz pulse train at 1.0V P-P from a 5359A Time Synthesizer (with < 5 >> ns transition time) shows a 100K sample jitter of 4 ps. >> >> I think I missed the point of your suggestion a couple of messages ago, >> but I get it now -- to measure the input circuit performance, I probably >> need to use two input circuits, one fed to start and the other to stop, >> so the Wavecrest can get a better slew rate to deal with, then divide by >> sqrt(2). That'll be part of tomorrow's experiments... >> >> John >> >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From SAIDJACK at aol.com Sun Apr 5 03:37:59 2009 From: SAIDJACK at aol.com (SAIDJACK at aol.com) Date: Sat, 4 Apr 2009 23:37:59 EDT Subject: [time-nuts] Updated Divider Jitter Results - 74HC390 Message-ID: Hello Pete, Bruce, I can confirm that the Wavecrest is sensitive to edge rise-time. It was not designed to measure sine waves. With a 10MHz sine wave from a Fury GPSDO as the source I get 8 - 10ps rms jitter. That exact same signal run through an NC7SZ04 buffer prior to feeding it into the DTS-2075, then scaled to the +/-1.1Vpeak input of the DTS-2075 yields jitter below the units' noise floor (~3.2ps rms) on a good OCXO. I also have a DTS-2070C that performs slightly better - about 2.9ps rms. bye, Said In a message dated 4/4/2009 17:43:23 Pacific Daylight Time, peterawson at earthlink.net writes: Bruce, Your analysis conforms closely to measured results on my DTS-2075. With the cleanest 10MHz source I have, at 2Vp-p, the DTS-2075 jitter reading is 11.4ps rms. Running this number back into equivalent input noise yields 716uV rms. The DTS-2075 input spec (assumed to be for -3dB response) is 700MHz, which should be nearly 900MHz equivalent noise bandwidth. These numbers are all reasonable & serve to demonstrate the need for low noise signal conditioning. Pete Rawson From EWKehren at aol.com Sun Apr 5 14:25:50 2009 From: EWKehren at aol.com (EWKehren at aol.com) Date: Sun, 5 Apr 2009 10:25:50 EDT Subject: [time-nuts] time-nuts Frequency Divider Message-ID: Thank you Bruce for your valuable insight. In the past I did spend time on Cesium Standards and with valuable inputs from Corby concerning the FTS tube interface I converted a HP 5062C to a Standard using a FTS tube. I also made other changes like changing to a 10 MHz 10811, the Master Clock 1 PPS assembly and the 1 PPS Advance Generator assembly. It has served me well over the last ten years. Only recently did I get back into the game with more focus on oscillators, mainly because of the vast accumulation of units and with Corby's help am looking at oscillators and try to get good short term as well as long term performance. This is all part of a downsizing effort. Way to much stuff. I only recently joined time-nuts and follow the dialog. It is clear that there is a vast knowledge base that could and probably is used to develop solutions in this arena and a candidate could be a general purpose divider chain that addresses most if not all the issues. Over forty years ago in my college years I did a counter using Motorola MC 790 series and presented a student paper on that subject at IEEE. Did some more work at home at TI that you can find in old TI Opto Electronics Catalogs. In this case my contribution would be limited to laying out a PC board. Bert In a message dated 4/4/2009 7:09:00 P.M. Eastern Daylight Time, bruce.griffiths at xtra.co.nz writes: Bert Unless you can provide a set of specifications it isn't possible to recommend any particular design as being fit for the application. For the purposes of comparing a divider generated PPS signal against a GPS derived PPS output almost any input clock shaper should have adequate performance. For such applications achieving a sufficiently low jitter PPS output can be achieved using almost any divider chain. However ensuring a low clock to output propagation delay tempco is entirely another matter and either requires a fully synchronous divider or using an output retiming synchroniser. If multiple ripple clocking is used in the divider then a 3 stage synchroniser that first resynchronises to 1MHz, then 2MHz and finally to 10MHz may be required. If the lower frequency dividers in the cascade use something as slow as 4000 series CMOS then even more synchroniser stages will be required. If we consider minimising the trigger jitter of an SR620 driven from say a 2V pp 10MHz sine wave, then a single stage limiter with a slope gain of about 5x and a bandwidth of about 50MHz will ensure that the trigger circuit jitter due to its linter and trigger circuit input noise is reduced to below 2ps rms with a low noise input source. If a 2 stage limiter cascade with the same slope gain is used the jitter due to limiter and trigger circuit input noise can be reduced to below 1.3ps rms with a low noise source if the low pass filter time constant at the output of each stage is chosen appropriately. If the output of a divider is to be used as a low phase noise source then picosecond or even subpicosecond jitter is desirable. For the ultimate performance in such applications a regenerative divider can have a much lower output phase noise than a digital divider. Injection locked dividers are one form of regenerative divider complete with integrated mixer and filter, however conjugate regenerative dividers using a diode mixer and low phase noise amplifier etc will have lower phase noise. Bruce EWKehren at aol.com wrote: > Bruce, thank you for the info. I have never had the need or desire to get 1 > ps accuracy however in designing low noise signal sources I have always had to > battle reference oscillator noise and was often nor sure if it was the > oscillator or the input circuit. However I would like to see a recommendation as > to an attainable design. Thanks again Bert > > > In a message dated 4/4/2009 4:35:09 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Bert > > Neither the HP5370 nor the SR620 have low enough internal jitter to > accurately characterise the intrinisic output jitter of either a 74HC04 > (~4ps) or a 74AC04 (~1ps). > Rather than just tossing together a divider from various parts though to > produce an output with low jitter its better to be able to characterise > the jitter properties (intrinsic as well as that due to logic device > input noise with a finite input signal slew rate) of various logic > families. > It is then possible to actually design a sine to logic level converter > that achieves the lowest possible output jitter for a given complexity > and specified input frequency and amplitude. > > The real problem is that one needs to accurately measure jitter of 1ps > or so. > There are few time interval counters that allow this. > One can also measure the change in noise floor when such a device is > placed in the clock input path of a high frequency ADC and thence derive > the jitter. > In principle, the output jitter of a divider can also be calculated from > the phase noise spectrum of its output. > > Bruce > > > > EWKehren at aol.com wrote: > >> Having built eight of Brooks units, my experience was that the problem was >> > > >> not with the amplifier but the way the RS F/F in the phase comparator II >> > was > >> working in some of the devices. For me they all worked in the oscillator >> > input > >> but some brands did not work properly with the GPS input. With all the >> > dialog > >> on the divider subject, is it not time to develop one design that >> > combines > >> KISS and all the collective know how? Bert Kehren WB5MZJ >> >> >> In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, >> bruce.griffiths at xtra.co.nz writes: >> >> Correction: >> >> I forgot to include the intrinsic jitter of the gate in the calculations. >> See underlined corrections below. >> >> >> Bruce >> >> Bruce Griffiths wrote: >> >> >> >> >>> Magnus >>> >>> The input noise of a logic inverter or other trigger device used as a >>> clock shaper is important. >>> If we have a logic inverter device with the following characteristics: >>> >>> Input noise: 100uV rms >>> Intrinsic jitter: 1ps rms >>> >>> Then the input signal slew rate at the threshold crossing has to be >>> greater than >>> >>> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >>> >>> to ensure that the output jitter isnt increased by more than 5% from the >>> intrinsic jitter. >>> >>> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >>> the zero crossing). >>> For such an input signal the output jitter will be about _1.5 ps_. >>> This increases to about _1.72ps_ if there is a threshold offset of 1V. >>> This can be reduced to about 1.05ps by amplifying the slope of the input >>> signal by ~ 3.4x. >>> >>> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >>> low distortion sinewave) of a 74AC04 inverter is about 1ps. >>> However the equivalent input noise is unknown. >>> The noise could, in principle, be determined by measuring the output >>> jitter as a function of the input signal slew rate. >>> >>> Whilst AM and other noise associated with the source can be reduced by >>> filtering, the input noise of a trigger circuit cannot (except perhaps >>> for the trigger circuits input current noise). >>> >>> Magnus Danielson wrote: >>> >>> >>> >>>> Bruce Griffiths skrev: >>>> >>>> >>>> >>>> >>>>> Ulrich >>>>> >>>>> Your experience with the SR620 illustrates the point I was making >>>>> > quite > >>>>> well. >>>>> It really does matter what you do in front of the limiter circuit built >>>>> into the counter. >>>>> A bandpass or any other filter by itself is ineffective unless the >>>>> signal is exceptionally noisy. >>>>> >>>>> By using the inverter in the 74HCT4046 you have added a low gain >>>>> > limiter > >>>>> stage the bandwidth of which is smaller than that of the SR620 input >>>>> circuit. >>>>> This has the effect of increasing the slew rate of the input signal >>>>> whilst producing an output with less jitter than the SR620 input >>>>> > circuit > >>>>> would without this low pass filtered limiter circuit (the inverter from >>>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>>> greater than that of the input signal which means that the jitter due >>>>> the counter input circuit noise is smaller than when this low gain low >>>>> bandwidth limiter isn't used. >>>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>>> assuming a single pole response with a 300MHz 3dB high frequency >>>>> > cutoff) > >>>>> and a correspondingly high total input noise (~350uV rms). >>>>> If the slew rate of the SR 620 input signal at the trigger point the >>>>> jitter due to this noise dominates the trigger circuit output jitter. >>>>> The HP5370 time interval counter input circuit has a lower noise >>>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>>> limiter) for the same 10MHz signal should be less than that of the >>>>> > SR620 > >>>>> (without the 74HCT4046 limiter). >>>>> >>>>> >>>>> >>>>> >>>> As a curiosity, there are various variants of the original 4046 which >>>> has different sensitivity on the input side... one of them has several >>>> inverters in a row to get the needed gain where as the other variant >>>> does not. This difference made a huge difference in some applications. >>>> >>>> >>>> >>>> >>>> >>> The appropriate device (one that will have the least output jitter) to >>> use will vary with the input signal zero crossing slew rate. >>> That is it depends on both the input signal frequency and amplitude. >>> >>> >>> >>> >>>>> If one uses a state of the art trigger circuit with a noise bandwidth >>>>> > of > >>>>> 1GHz or more then the total input noise will be even larger so it >>>>> becomes even more important to use an optimised cascade of limiter+ low >>>>> output pass filter stages to increase the slew rate of the counter >>>>> input trigger circuit at the trigger threshold. >>>>> Careful optimisation of the gain of each stage and the corresponding >>>>> output filter cutoff frequency for each stage is necessary to minimise >>>>> the output jitter of the counter trigger circuit. >>>>> There is also an optimum number of such stages that minimises the >>>>> trigger jitter. >>>>> >>>>> The optimisation problem for Limiter stages with gaussian wideband >>>>> > input > >>>>> noise was solved in the 1990's. >>>>> Unfortunately the optimum number of stages, associated gains and output >>>>> filter bandwidths depends on the input signal frequency and amplitude >>>>> > so > >>>>> that in general it isn't possible to use the same limiter cascade for a >>>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>>> for each frequency and amplitude. >>>>> >>>>> >>>>> >>>>> >>>> Actually, you can make a cascade setup which is approaching optimum and >>>> insert signal at the stage where the signals slewrate matches the range >>>> > > >>>> for each stage. Since the gain steps is larger later in a slew rate >>>> amplifier chain, the last stages may have a little coarse slew rate >>>> range, but additional mid-range amplifiers that can act as alternative >>>> input amps could curcumvent that such that a wide range but and fairly >>>> good trigger jitter could be achieved. >>>> >>>> The comparator level is fed to whatever stage is the first stage. >>>> >>>> Such an approach could lead to much improved jitter values for lower >>>> frequency signals with associated gain in measurement accuracy. >>>> >>>> It is easy to make a pre-amplifier set that achieves this, but you want >>>> to integrate the control algorithms for automatic use. >>>> >>>> >>>> >>>> >>>> >>> That would constitute an interesting design challenge. >>> >>> >>> >>>>> Thus such circuits aren't usually employed in general purpose >>>>> > frequency > >>>>> >>>>> >> counters. >> >> >>>>> >>>>> >>>>> >>>>> >>>> Certainly true. A generic counter is usually equipped with triggers >>>> > such > >>>> that they can measure slewrate without too much difficulty. >>>> >>>> >>>> >>>> >>>> >>>>> However if the input signal frequency and amplitude are known and >>>>> > stable > >>>>> then using such a limiter filter cascade is feasible. >>>>> >>>>> >>>>> >>>>> >>>> Indeed. >>>> >>>> Cheers, >>>> Magnus >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com >>>> To unsubscribe, go to >>>> >>>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>>> and follow the instructions there. >>>> >>>> >>>> >>>> >>>> >>> Bruce >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>> and follow the instructions there. >>> >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> **************Worried about job security? Check out the 5 safest jobs in a >> recession. >> >> > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs in a > recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) From david.partridge at dsl.pipex.com Sun Apr 5 15:56:01 2009 From: david.partridge at dsl.pipex.com (David C. Partridge) Date: Sun, 5 Apr 2009 16:56:01 +0100 Subject: [time-nuts] time-nuts Frequency Divider In-Reply-To: References: Message-ID: Just another reminder - this job has been done, at least no-one has come back to me and said "Dave, your divider isn't up to scratch". Cheers Dave -----Original Message----- From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of EWKehren at aol.com Sent: 05 April 2009 15:26 To: time-nuts at febo.com Subject: Re: [time-nuts] time-nuts Frequency Divider Thank you Bruce for your valuable insight. In the past I did spend time on Cesium Standards and with valuable inputs from Corby concerning the FTS tube interface I converted a HP 5062C to a Standard using a FTS tube. I also made other changes like changing to a 10 MHz 10811, the Master Clock 1 PPS assembly and the 1 PPS Advance Generator assembly. It has served me well over the last ten years. Only recently did I get back into the game with more focus on oscillators, mainly because of the vast accumulation of units and with Corby's help am looking at oscillators and try to get good short term as well as long term performance. This is all part of a downsizing effort. Way to much stuff. I only recently joined time-nuts and follow the dialog. It is clear that there is a vast knowledge base that could and probably is used to develop solutions in this arena and a candidate could be a general purpose divider chain that addresses most if not all the issues. Over forty years ago in my college years I did a counter using Motorola MC 790 series and presented a student paper on that subject at IEEE. Did some more work at home at TI that you can find in old TI Opto Electronics Catalogs. In this case my contribution would be limited to laying out a PC board. Bert In a message dated 4/4/2009 7:09:00 P.M. Eastern Daylight Time, bruce.griffiths at xtra.co.nz writes: Bert Unless you can provide a set of specifications it isn't possible to recommend any particular design as being fit for the application. For the purposes of comparing a divider generated PPS signal against a GPS derived PPS output almost any input clock shaper should have adequate performance. For such applications achieving a sufficiently low jitter PPS output can be achieved using almost any divider chain. However ensuring a low clock to output propagation delay tempco is entirely another matter and either requires a fully synchronous divider or using an output retiming synchroniser. If multiple ripple clocking is used in the divider then a 3 stage synchroniser that first resynchronises to 1MHz, then 2MHz and finally to 10MHz may be required. If the lower frequency dividers in the cascade use something as slow as 4000 series CMOS then even more synchroniser stages will be required. If we consider minimising the trigger jitter of an SR620 driven from say a 2V pp 10MHz sine wave, then a single stage limiter with a slope gain of about 5x and a bandwidth of about 50MHz will ensure that the trigger circuit jitter due to its linter and trigger circuit input noise is reduced to below 2ps rms with a low noise input source. If a 2 stage limiter cascade with the same slope gain is used the jitter due to limiter and trigger circuit input noise can be reduced to below 1.3ps rms with a low noise source if the low pass filter time constant at the output of each stage is chosen appropriately. If the output of a divider is to be used as a low phase noise source then picosecond or even subpicosecond jitter is desirable. For the ultimate performance in such applications a regenerative divider can have a much lower output phase noise than a digital divider. Injection locked dividers are one form of regenerative divider complete with integrated mixer and filter, however conjugate regenerative dividers using a diode mixer and low phase noise amplifier etc will have lower phase noise. Bruce EWKehren at aol.com wrote: > Bruce, thank you for the info. I have never had the need or desire to > get 1 > ps accuracy however in designing low noise signal sources I have > always had to > battle reference oscillator noise and was often nor sure if it was > the oscillator or the input circuit. However I would like to see a recommendation as > to an attainable design. Thanks again Bert > > > In a message dated 4/4/2009 4:35:09 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Bert > > Neither the HP5370 nor the SR620 have low enough internal jitter to > accurately characterise the intrinisic output jitter of either a > 74HC04 > (~4ps) or a 74AC04 (~1ps). > Rather than just tossing together a divider from various parts > though to produce an output with low jitter its better to be able to characterise > the jitter properties (intrinsic as well as that due to logic device > input noise with a finite input signal slew rate) of various logic > families. > It is then possible to actually design a sine to logic level > converter that achieves the lowest possible output jitter for a given complexity > and specified input frequency and amplitude. > > The real problem is that one needs to accurately measure jitter of > 1ps or so. > There are few time interval counters that allow this. > One can also measure the change in noise floor when such a device is > placed in the clock input path of a high frequency ADC and thence > derive the jitter. > In principle, the output jitter of a divider can also be calculated > from the phase noise spectrum of its output. > > Bruce > > > > EWKehren at aol.com wrote: > >> Having built eight of Brooks units, my experience was that the >> problem was >> > > >> not with the amplifier but the way the RS F/F in the phase >> comparator II >> > was > >> working in some of the devices. For me they all worked in the >> oscillator >> > input > >> but some brands did not work properly with the GPS input. With all >> the >> > dialog > >> on the divider subject, is it not time to develop one design that >> > combines > >> KISS and all the collective know how? Bert Kehren WB5MZJ >> >> >> In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, >> bruce.griffiths at xtra.co.nz writes: >> >> Correction: >> >> I forgot to include the intrinsic jitter of the gate in the calculations. >> See underlined corrections below. >> >> >> Bruce >> >> Bruce Griffiths wrote: >> >> >> >> >>> Magnus >>> >>> The input noise of a logic inverter or other trigger device used >>> as a clock shaper is important. >>> If we have a logic inverter device with the following characteristics: >>> >>> Input noise: 100uV rms >>> Intrinsic jitter: 1ps rms >>> >>> Then the input signal slew rate at the threshold crossing has to be >>> greater than >>> >>> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >>> >>> to ensure that the output jitter isnt increased by more than 5% >>> from the >>> intrinsic jitter. >>> >>> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >>> the zero crossing). >>> For such an input signal the output jitter will be about _1.5 ps_. >>> This increases to about _1.72ps_ if there is a threshold offset of 1V. >>> This can be reduced to about 1.05ps by amplifying the slope of >>> the input >>> signal by ~ 3.4x. >>> >>> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >>> low distortion sinewave) of a 74AC04 inverter is about 1ps. >>> However the equivalent input noise is unknown. >>> The noise could, in principle, be determined by measuring the >>> output jitter as a function of the input signal slew rate. >>> >>> Whilst AM and other noise associated with the source can be >>> reduced by filtering, the input noise of a trigger circuit cannot (except perhaps >>> for the trigger circuits input current noise). >>> >>> Magnus Danielson wrote: >>> >>> >>> >>>> Bruce Griffiths skrev: >>>> >>>> >>>> >>>> >>>>> Ulrich >>>>> >>>>> Your experience with the SR620 illustrates the point I was making >>>>> > quite > >>>>> well. >>>>> It really does matter what you do in front of the limiter >>>>> circuit built >>>>> into the counter. >>>>> A bandpass or any other filter by itself is ineffective unless the >>>>> signal is exceptionally noisy. >>>>> >>>>> By using the inverter in the 74HCT4046 you have added a low >>>>> gain >>>>> > limiter > >>>>> stage the bandwidth of which is smaller than that of the SR620 input >>>>> circuit. >>>>> This has the effect of increasing the slew rate of the input signal >>>>> whilst producing an output with less jitter than the SR620 input >>>>> > circuit > >>>>> would without this low pass filtered limiter circuit (the >>>>> inverter from >>>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>>> greater than that of the input signal which means that the jitter due >>>>> the counter input circuit noise is smaller than when this low gain low >>>>> bandwidth limiter isn't used. >>>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>>> assuming a single pole response with a 300MHz 3dB high frequency >>>>> > cutoff) > >>>>> and a correspondingly high total input noise (~350uV rms). >>>>> If the slew rate of the SR 620 input signal at the trigger point the >>>>> jitter due to this noise dominates the trigger circuit output jitter. >>>>> The HP5370 time interval counter input circuit has a lower noise >>>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>>> limiter) for the same 10MHz signal should be less than that of the >>>>> > SR620 > >>>>> (without the 74HCT4046 limiter). >>>>> >>>>> >>>>> >>>>> >>>> As a curiosity, there are various variants of the original 4046 which >>>> has different sensitivity on the input side... one of them has several >>>> inverters in a row to get the needed gain where as the other variant >>>> does not. This difference made a huge difference in some applications. >>>> >>>> >>>> >>>> >>>> >>> The appropriate device (one that will have the least output jitter) to >>> use will vary with the input signal zero crossing slew rate. >>> That is it depends on both the input signal frequency and amplitude. >>> >>> >>> >>> >>>>> If one uses a state of the art trigger circuit with a noise bandwidth >>>>> > of > >>>>> 1GHz or more then the total input noise will be even larger so >>>>> it becomes even more important to use an optimised cascade of >>>>> limiter+ low >>>>> output pass filter stages to increase the slew rate of the counter >>>>> input trigger circuit at the trigger threshold. >>>>> Careful optimisation of the gain of each stage and the corresponding >>>>> output filter cutoff frequency for each stage is necessary to minimise >>>>> the output jitter of the counter trigger circuit. >>>>> There is also an optimum number of such stages that minimises the >>>>> trigger jitter. >>>>> >>>>> The optimisation problem for Limiter stages with gaussian >>>>> wideband >>>>> > input > >>>>> noise was solved in the 1990's. >>>>> Unfortunately the optimum number of stages, associated gains >>>>> and output >>>>> filter bandwidths depends on the input signal frequency and amplitude >>>>> > so > >>>>> that in general it isn't possible to use the same limiter >>>>> cascade for a >>>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>>> for each frequency and amplitude. >>>>> >>>>> >>>>> >>>>> >>>> Actually, you can make a cascade setup which is approaching optimum and >>>> insert signal at the stage where the signals slewrate matches >>>> the range >>>> > > >>>> for each stage. Since the gain steps is larger later in a slew rate >>>> amplifier chain, the last stages may have a little coarse slew rate >>>> range, but additional mid-range amplifiers that can act as alternative >>>> input amps could curcumvent that such that a wide range but and fairly >>>> good trigger jitter could be achieved. >>>> >>>> The comparator level is fed to whatever stage is the first stage. >>>> >>>> Such an approach could lead to much improved jitter values for lower >>>> frequency signals with associated gain in measurement accuracy. >>>> >>>> It is easy to make a pre-amplifier set that achieves this, but >>>> you want >>>> to integrate the control algorithms for automatic use. >>>> >>>> >>>> >>>> >>>> >>> That would constitute an interesting design challenge. >>> >>> >>> >>>>> Thus such circuits aren't usually employed in general purpose >>>>> > frequency > >>>>> >>>>> >> counters. >> >> >>>>> >>>>> >>>>> >>>>> >>>> Certainly true. A generic counter is usually equipped with >>>> triggers >>>> > such > >>>> that they can measure slewrate without too much difficulty. >>>> >>>> >>>> >>>> >>>> >>>>> However if the input signal frequency and amplitude are known and >>>>> > stable > >>>>> then using such a limiter filter cascade is feasible. >>>>> >>>>> >>>>> >>>>> >>>> Indeed. >>>> >>>> Cheers, >>>> Magnus >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go >>>> to >>>> >>>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>>> and follow the instructions there. >>>> >>>> >>>> >>>> >>>> >>> Bruce >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>> and follow the instructions there. >>> >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> **************Worried about job security? Check out the 5 safest >> jobs in a >> recession. >> >> > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) > >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs > in a recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From EWKehren at aol.com Sun Apr 5 17:10:24 2009 From: EWKehren at aol.com (EWKehren at aol.com) Date: Sun, 5 Apr 2009 13:10:24 EDT Subject: [time-nuts] time-nuts Frequency Divider Message-ID: Sorry Dave, as I said I am new to the site and am not aware of your work. Would you please supply me with the link so I can take a look. If the job is done why all the conversation? Bert In a message dated 4/5/2009 11:57:33 A.M. Eastern Daylight Time, david.partridge at dsl.pipex.com writes: Just another reminder - this job has been done, at least no-one has come back to me and said "Dave, your divider isn't up to scratch". Cheers Dave -----Original Message----- From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of EWKehren at aol.com Sent: 05 April 2009 15:26 To: time-nuts at febo.com Subject: Re: [time-nuts] time-nuts Frequency Divider Thank you Bruce for your valuable insight. In the past I did spend time on Cesium Standards and with valuable inputs from Corby concerning the FTS tube interface I converted a HP 5062C to a Standard using a FTS tube. I also made other changes like changing to a 10 MHz 10811, the Master Clock 1 PPS assembly and the 1 PPS Advance Generator assembly. It has served me well over the last ten years. Only recently did I get back into the game with more focus on oscillators, mainly because of the vast accumulation of units and with Corby's help am looking at oscillators and try to get good short term as well as long term performance. This is all part of a downsizing effort. Way to much stuff. I only recently joined time-nuts and follow the dialog. It is clear that there is a vast knowledge base that could and probably is used to develop solutions in this arena and a candidate could be a general purpose divider chain that addresses most if not all the issues. Over forty years ago in my college years I did a counter using Motorola MC 790 series and presented a student paper on that subject at IEEE. Did some more work at home at TI that you can find in old TI Opto Electronics Catalogs. In this case my contribution would be limited to laying out a PC board. Bert In a message dated 4/4/2009 7:09:00 P.M. Eastern Daylight Time, bruce.griffiths at xtra.co.nz writes: Bert Unless you can provide a set of specifications it isn't possible to recommend any particular design as being fit for the application. For the purposes of comparing a divider generated PPS signal against a GPS derived PPS output almost any input clock shaper should have adequate performance. For such applications achieving a sufficiently low jitter PPS output can be achieved using almost any divider chain. However ensuring a low clock to output propagation delay tempco is entirely another matter and either requires a fully synchronous divider or using an output retiming synchroniser. If multiple ripple clocking is used in the divider then a 3 stage synchroniser that first resynchronises to 1MHz, then 2MHz and finally to 10MHz may be required. If the lower frequency dividers in the cascade use something as slow as 4000 series CMOS then even more synchroniser stages will be required. If we consider minimising the trigger jitter of an SR620 driven from say a 2V pp 10MHz sine wave, then a single stage limiter with a slope gain of about 5x and a bandwidth of about 50MHz will ensure that the trigger circuit jitter due to its linter and trigger circuit input noise is reduced to below 2ps rms with a low noise input source. If a 2 stage limiter cascade with the same slope gain is used the jitter due to limiter and trigger circuit input noise can be reduced to below 1.3ps rms with a low noise source if the low pass filter time constant at the output of each stage is chosen appropriately. If the output of a divider is to be used as a low phase noise source then picosecond or even subpicosecond jitter is desirable. For the ultimate performance in such applications a regenerative divider can have a much lower output phase noise than a digital divider. Injection locked dividers are one form of regenerative divider complete with integrated mixer and filter, however conjugate regenerative dividers using a diode mixer and low phase noise amplifier etc will have lower phase noise. Bruce EWKehren at aol.com wrote: > Bruce, thank you for the info. I have never had the need or desire to > get 1 > ps accuracy however in designing low noise signal sources I have > always had to > battle reference oscillator noise and was often nor sure if it was > the oscillator or the input circuit. However I would like to see a recommendation as > to an attainable design. Thanks again Bert > > > In a message dated 4/4/2009 4:35:09 P.M. Eastern Daylight Time, > bruce.griffiths at xtra.co.nz writes: > > Bert > > Neither the HP5370 nor the SR620 have low enough internal jitter to > accurately characterise the intrinisic output jitter of either a > 74HC04 > (~4ps) or a 74AC04 (~1ps). > Rather than just tossing together a divider from various parts > though to produce an output with low jitter its better to be able to characterise > the jitter properties (intrinsic as well as that due to logic device > input noise with a finite input signal slew rate) of various logic > families. > It is then possible to actually design a sine to logic level > converter that achieves the lowest possible output jitter for a given complexity > and specified input frequency and amplitude. > > The real problem is that one needs to accurately measure jitter of > 1ps or so. > There are few time interval counters that allow this. > One can also measure the change in noise floor when such a device is > placed in the clock input path of a high frequency ADC and thence > derive the jitter. > In principle, the output jitter of a divider can also be calculated > from the phase noise spectrum of its output. > > Bruce > > > > EWKehren at aol.com wrote: > >> Having built eight of Brooks units, my experience was that the >> problem was >> > > >> not with the amplifier but the way the RS F/F in the phase >> comparator II >> > was > >> working in some of the devices. For me they all worked in the >> oscillator >> > input > >> but some brands did not work properly with the GPS input. With all >> the >> > dialog > >> on the divider subject, is it not time to develop one design that >> > combines > >> KISS and all the collective know how? Bert Kehren WB5MZJ >> >> >> In a message dated 4/3/2009 5:17:18 P.M. Eastern Daylight Time, >> bruce.griffiths at xtra.co.nz writes: >> >> Correction: >> >> I forgot to include the intrinsic jitter of the gate in the calculations. >> See underlined corrections below. >> >> >> Bruce >> >> Bruce Griffiths wrote: >> >> >> >> >>> Magnus >>> >>> The input noise of a logic inverter or other trigger device used >>> as a clock shaper is important. >>> If we have a logic inverter device with the following characteristics: >>> >>> Input noise: 100uV rms >>> Intrinsic jitter: 1ps rms >>> >>> Then the input signal slew rate at the threshold crossing has to be >>> greater than >>> >>> 3x1E-4/1E-12 = 3E8 V/s or 300 V/us >>> >>> to ensure that the output jitter isnt increased by more than 5% >>> from the >>> intrinsic jitter. >>> >>> With a 1.4V pk 10MHz sinewave input the maximum slew rate is ~89V/us (at >>> the zero crossing). >>> For such an input signal the output jitter will be about _1.5 ps_. >>> This increases to about _1.72ps_ if there is a threshold offset of 1V. >>> This can be reduced to about 1.05ps by amplifying the slope of >>> the input >>> signal by ~ 3.4x. >>> >>> The intrinsic jitter (RJ. DDJ isn't important when the input signal is a >>> low distortion sinewave) of a 74AC04 inverter is about 1ps. >>> However the equivalent input noise is unknown. >>> The noise could, in principle, be determined by measuring the >>> output jitter as a function of the input signal slew rate. >>> >>> Whilst AM and other noise associated with the source can be >>> reduced by filtering, the input noise of a trigger circuit cannot (except perhaps >>> for the trigger circuits input current noise). >>> >>> Magnus Danielson wrote: >>> >>> >>> >>>> Bruce Griffiths skrev: >>>> >>>> >>>> >>>> >>>>> Ulrich >>>>> >>>>> Your experience with the SR620 illustrates the point I was making >>>>> > quite > >>>>> well. >>>>> It really does matter what you do in front of the limiter >>>>> circuit built >>>>> into the counter. >>>>> A bandpass or any other filter by itself is ineffective unless the >>>>> signal is exceptionally noisy. >>>>> >>>>> By using the inverter in the 74HCT4046 you have added a low >>>>> gain >>>>> > limiter > >>>>> stage the bandwidth of which is smaller than that of the SR620 input >>>>> circuit. >>>>> This has the effect of increasing the slew rate of the input signal >>>>> whilst producing an output with less jitter than the SR620 input >>>>> > circuit > >>>>> would without this low pass filtered limiter circuit (the >>>>> inverter from >>>>> the 74HCT4046). The slew rate at the 74HCT4046 inverter output is >>>>> greater than that of the input signal which means that the jitter due >>>>> the counter input circuit noise is smaller than when this low gain low >>>>> bandwidth limiter isn't used. >>>>> The input circuit of the SR620 has a wide noise bandwidth (~ 470MHz >>>>> assuming a single pole response with a 300MHz 3dB high frequency >>>>> > cutoff) > >>>>> and a correspondingly high total input noise (~350uV rms). >>>>> If the slew rate of the SR 620 input signal at the trigger point the >>>>> jitter due to this noise dominates the trigger circuit output jitter. >>>>> The HP5370 time interval counter input circuit has a lower noise >>>>> bandwidth (~160MHz??) and is quieter (~ 100uV rms) than the input >>>>> circuit of the SR620 and thus the HP5370 jitter (without the 74HCT4046 >>>>> limiter) for the same 10MHz signal should be less than that of the >>>>> > SR620 > >>>>> (without the 74HCT4046 limiter). >>>>> >>>>> >>>>> >>>>> >>>> As a curiosity, there are various variants of the original 4046 which >>>> has different sensitivity on the input side... one of them has several >>>> inverters in a row to get the needed gain where as the other variant >>>> does not. This difference made a huge difference in some applications. >>>> >>>> >>>> >>>> >>>> >>> The appropriate device (one that will have the least output jitter) to >>> use will vary with the input signal zero crossing slew rate. >>> That is it depends on both the input signal frequency and amplitude. >>> >>> >>> >>> >>>>> If one uses a state of the art trigger circuit with a noise bandwidth >>>>> > of > >>>>> 1GHz or more then the total input noise will be even larger so >>>>> it becomes even more important to use an optimised cascade of >>>>> limiter+ low >>>>> output pass filter stages to increase the slew rate of the counter >>>>> input trigger circuit at the trigger threshold. >>>>> Careful optimisation of the gain of each stage and the corresponding >>>>> output filter cutoff frequency for each stage is necessary to minimise >>>>> the output jitter of the counter trigger circuit. >>>>> There is also an optimum number of such stages that minimises the >>>>> trigger jitter. >>>>> >>>>> The optimisation problem for Limiter stages with gaussian >>>>> wideband >>>>> > input > >>>>> noise was solved in the 1990's. >>>>> Unfortunately the optimum number of stages, associated gains >>>>> and output >>>>> filter bandwidths depends on the input signal frequency and amplitude >>>>> > so > >>>>> that in general it isn't possible to use the same limiter >>>>> cascade for a >>>>> wide range of signal amplitudes and frequencies and minimise the jitter >>>>> for each frequency and amplitude. >>>>> >>>>> >>>>> >>>>> >>>> Actually, you can make a cascade setup which is approaching optimum and >>>> insert signal at the stage where the signals slewrate matches >>>> the range >>>> > > >>>> for each stage. Since the gain steps is larger later in a slew rate >>>> amplifier chain, the last stages may have a little coarse slew rate >>>> range, but additional mid-range amplifiers that can act as alternative >>>> input amps could curcumvent that such that a wide range but and fairly >>>> good trigger jitter could be achieved. >>>> >>>> The comparator level is fed to whatever stage is the first stage. >>>> >>>> Such an approach could lead to much improved jitter values for lower >>>> frequency signals with associated gain in measurement accuracy. >>>> >>>> It is easy to make a pre-amplifier set that achieves this, but >>>> you want >>>> to integrate the control algorithms for automatic use. >>>> >>>> >>>> >>>> >>>> >>> That would constitute an interesting design challenge. >>> >>> >>> >>>>> Thus such circuits aren't usually employed in general purpose >>>>> > frequency > >>>>> >>>>> >> counters. >> >> >>>>> >>>>> >>>>> >>>>> >>>> Certainly true. A generic counter is usually equipped with >>>> triggers >>>> > such > >>>> that they can measure slewrate without too much difficulty. >>>> >>>> >>>> >>>> >>>> >>>>> However if the input signal frequency and amplitude are known and >>>>> > stable > >>>>> then using such a limiter filter cascade is feasible. >>>>> >>>>> >>>>> >>>>> >>>> Indeed. >>>> >>>> Cheers, >>>> Magnus >>>> >>>> _______________________________________________ >>>> time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go >>>> to >>>> >>>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>>> and follow the instructions there. >>>> >>>> >>>> >>>> >>>> >>> Bruce >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to >>> >>> >> https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> >> >>> and follow the instructions there. >>> >>> >>> >>> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> **************Worried about job security? Check out the 5 safest >> jobs in a >> recession. >> >> > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) > >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to >> > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > >> and follow the instructions there. >> >> >> > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > **************Worried about job security? Check out the 5 safest jobs > in a recession. > (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare0000000 3) _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. **************Worried about job security? Check out the 5 safest jobs in a recession. (http://jobs.aol.com/gallery/growing-job-industries?ncid=emlcntuscare00000003) From sam at canardpc.com Mon Apr 6 13:59:49 2009 From: sam at canardpc.com (Samuel D. [x86/CPC]) Date: Mon, 6 Apr 2009 15:59:49 +0200 Subject: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier Message-ID: <00b101c9b6bf$f36103c0$da230b40$@com> Hi there, I'm working on a new GPS-Disciplined Rubidium Frequency Standard and I'm now designing the distribution amplifier stage. There is many schematics everywhere on the Internet, the most famous is the TADD-1 reviewed by the not-less-famous TVB. Almost all of them use high-speed Op Amps originally designed for video processing. The most common AOP are the MAX477 (used in TADD-1) and the MAX4135. Unfortunately, both of them are now obsolete and will be discontinued soon. I checked Digikey and Farnell, but those parts are not available anymore, so, I'm looking for an equivalent (or better!) replacement. Any hints ? PS : A French member of that list, Daniel, contacted me some weeks ago. Due to a corrupted Outlook file, I lost your contact and wasn't able to keep in touch with you. Please send me an email if you read this ;) --------------------- Samuel DEMEULEMEESTER Presse Non Stop - Canard PC http://www.canardpc.com Tel : +33.6.13.73.4003 MSN : sam at x86.fr From lasse.moell at swipnet.se Mon Apr 6 15:23:18 2009 From: lasse.moell at swipnet.se (Lasse) Date: Mon, 06 Apr 2009 17:23:18 +0200 Subject: [time-nuts] Update: Datum/Trimble 9390 PROM Message-ID: Just received my new PROMS ver. DT103E and everything appears to work. My reader did not support the 28F010N chips so have no dump... I suggest you contact the local Symmmetricom rep for a free chip! /Lasse From yuri at ostry.ru Mon Apr 6 15:29:17 2009 From: yuri at ostry.ru (Yuri Ostry) Date: Mon, 6 Apr 2009 19:29:17 +0400 Subject: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier In-Reply-To: <00b101c9b6bf$f36103c0$da230b40$@com> References: <00b101c9b6bf$f36103c0$da230b40$@com> Message-ID: <828755970.20090406192917@ostry.ru> Hello, Monday, April 6, 2009, 17:59:49, Samuel D. wrote: S> Hi there, S> I'm working on a new GPS-Disciplined Rubidium Frequency Standard and I'm now S> designing the distribution amplifier stage. There is many schematics S> everywhere on the Internet, the most famous is the TADD-1 reviewed by the S> not-less-famous TVB. Almost all of them use high-speed Op Amps originally S> designed for video processing. The most common AOP are the MAX477 (used in S> TADD-1) and the MAX4135. Unfortunately, both of them are now obsolete and S> will be discontinued soon. I checked Digikey and Farnell, but those parts S> are not available anymore, so, I'm looking for an equivalent (or better!) S> replacement. S> Any hints ? Check current Analog Devices opamps offers. There is some pin to pin replacement for MAX477. If memory serves me corectly, it is AD8047 (I may be wrong, though, check datasheets). -- Best regards, Yuri mailto:yuri at ostry.ru From sam at canardpc.com Mon Apr 6 16:21:39 2009 From: sam at canardpc.com (Samuel D. [x86/CPC]) Date: Mon, 6 Apr 2009 18:21:39 +0200 Subject: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier In-Reply-To: <828755970.20090406192917@ostry.ru> References: <00b101c9b6bf$f36103c0$da230b40$@com> <828755970.20090406192917@ostry.ru> Message-ID: <00e501c9b6d3$c411b7e0$4c3527a0$@com> The slew rate seems a bit slow on AD8047 (750 V/?s VS 1100 V/?s). A great (but expensive) AOP with really nice specs is the LT1227 from Linear. But I'm not a time guru and perhaps there is some tricks that I'm not aware of. For a distribution amplifier designed to share an accurate 10 MHz sine wave (and perhaps a 5 Mhz square wave), what are the most important specs to look at ? -----Message d'origine----- De?: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] De la part de Yuri Ostry Envoy??: lundi 6 avril 2009 17:29 ??: Discussion of precise time and frequency measurement Objet?: Re: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier Hello, Monday, April 6, 2009, 17:59:49, Samuel D. wrote: S> Hi there, S> I'm working on a new GPS-Disciplined Rubidium Frequency Standard and I'm now S> designing the distribution amplifier stage. There is many schematics S> everywhere on the Internet, the most famous is the TADD-1 reviewed by the S> not-less-famous TVB. Almost all of them use high-speed Op Amps originally S> designed for video processing. The most common AOP are the MAX477 (used in S> TADD-1) and the MAX4135. Unfortunately, both of them are now obsolete and S> will be discontinued soon. I checked Digikey and Farnell, but those parts S> are not available anymore, so, I'm looking for an equivalent (or better!) S> replacement. S> Any hints ? Check current Analog Devices opamps offers. There is some pin to pin replacement for MAX477. If memory serves me corectly, it is AD8047 (I may be wrong, though, check datasheets). -- Best regards, Yuri mailto:yuri at ostry.ru _______________________________________________ time-nuts mailing list -- time-nuts at febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. From paul at greenrover.demon.co.uk Mon Apr 6 17:06:11 2009 From: paul at greenrover.demon.co.uk (paul at greenrover.demon.co.uk) Date: Mon, 06 Apr 2009 18:06:11 +0100 Subject: [time-nuts] Hand Held GPS In-Reply-To: <49D0642E.3010904@greenrover.demon.co.uk> References: <49CC93C9.4010908@greenrover.demon.co.uk> <1197.SVVXXVxVQkI=.1238164282.squirrel@webmail.securepacific.net> <36802.80.251.207.129.1238271578.squirrel@webmail.lysator.liu.se> <49D0642E.3010904@greenrover.demon.co.uk> Message-ID: <49DA3683.80604@greenrover.demon.co.uk> paul at greenrover.demon.co.uk wrote: To follow up on my previous request for help, I ordered a Garmin GPSmap60 which delivers an unloaded 3.2V to the MCX connector with fresh batteries. Tried it on a couple of Symetricom and Motorola site antennas on the end of 100 feet of cable and it works just fine. So thanks for all the pointers and help - job done! Regards Paul -- 73 de Paul GW8IZR IO73TI http://www.gw8izr.com From Arnold.Tibus at gmx.de Mon Apr 6 17:09:14 2009 From: Arnold.Tibus at gmx.de (Arnold Tibus) Date: Mon, 06 Apr 2009 19:09:14 +0200 Subject: [time-nuts] RF mixers for oscillator characterization, some questions Message-ID: Hello the Time Nuts, I am looking for some good mixers for oscillator phase/ noise measurements, so I would be happy if somebody would assist in giving helpful answers to my ordinary questions: What mixers have to be applied/ are recommendable? What has to be observed? Can I use just ordinary dbm as they are in use in modern hf receivers? What about the hp models as the 10514A? I saw mentioned 'series' on such models, are they selected ore is it just the normal serie no, different for each unit? Is it risky to buy used ones and what are nominal prices for these items? Many tia, regards, Arnold From KE9H at austin.rr.com Mon Apr 6 17:47:53 2009 From: KE9H at austin.rr.com (Graham / KE9H) Date: Mon, 06 Apr 2009 12:47:53 -0500 Subject: [time-nuts] Sawtooth correction in UT+ receiver In-Reply-To: References: Message-ID: <49DA4049.6000308@austin.rr.com> All: I have several Motorola UT+ receivers, hardware version R5, version 3.1 software. Will these receivers provide a sawtooth correction message that can be used for external correction? If so, can you provide or point me at the documentation for the messages? Thanks, --- Graham / KE9H == From peterawson at earthlink.net Mon Apr 6 19:57:40 2009 From: peterawson at earthlink.net (Pete) Date: Mon, 6 Apr 2009 13:57:40 -0600 Subject: [time-nuts] RF mixers for oscillator characterization, some questions References: Message-ID: Arnold, I have had good experience with the SYPD series from Mini-circuits. I have not seen any used, but their new cost is reasonable. They do several things well e.g. the DC offset on the units I received is <1mV & they produce >2V p-p when driven @ +7dBm. Pete Rawson From bruce.griffiths at xtra.co.nz Mon Apr 6 21:46:47 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Tue, 07 Apr 2009 09:46:47 +1200 Subject: [time-nuts] RF mixers for oscillator characterization, some questions In-Reply-To: References: Message-ID: <49DA7847.5010905@xtra.co.nz> Pete wrote: > Arnold, > > I have had good experience with the SYPD series > from Mini-circuits. I have not seen any used, but > their new cost is reasonable. They do several things > well e.g. the DC offset on the units I received is > <1mV & they produce >2V p-p when driven @ > +7dBm. > > Pete Rawson > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Pete These are OK except when one needs to isolate the IF ground from the RF grounds to avoid low frequency ground loop problems. The RPD and MPD through hole series are better in this regard as they allow the IF ground to be isolated from the RF grounds. The flicker phase noise characteristics of the mixer/phase detector should be measured as some mixers/phase detectors have lower flicker phase noise than others. The termination of the IF port will affect the mixer phase noise. For offset frequencies < 100kHz a capacitive termination of the IF port which reflects the sum frequency back into the mixer reduces the mixer phase noise. The tradeoff is that the mixer output at higher offset frequencies is attenuated by the IF port termination. Terminating the IF port in a capacitor reduces the RF port impedance, so that a low value series resistor (22 to 39 ohms - select for lowest VSWR) is then required to improve the RF port VSWR. Terminating the IF port with a capacitor also alters the mixer gain (as a phase detector) so this needs to be measured in conjunction with the noise 10514 and 10534 mixers using discrete diodes supposedly have lower flicker noise than mixers using integrated quad diodes. Bruce From bruce.griffiths at xtra.co.nz Mon Apr 6 22:29:24 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Tue, 07 Apr 2009 10:29:24 +1200 Subject: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier In-Reply-To: <00b101c9b6bf$f36103c0$da230b40$@com> References: <00b101c9b6bf$f36103c0$da230b40$@com> Message-ID: <49DA8244.7010906@xtra.co.nz> Samuel Wideband oapmps should only used in distribution amplifiers when their inferior flicker phase noise and phase noise floor characteristics are acceptable. One can easily achieve a far lower flicker and broadband phase noise floor using discrete components rather than opamps. Even the simple discrete component buffers used in some Austron frequency standards will have better phase noise characteristics than an opamp based distribution amplifier. If you decide to use opamps you need to look at: 1) Slew rate 2) Distortion at the anticipated output level and frequency. 3) Opamp input noise both in the flicker region as well as at high frequency. Using an input step up transformer can be helpful in reducing the phase noise of an opamp based distribution amplifier. It is also advisable to use a very low noise power supply as power supply noise will modulate the opamp RF phase shift thereby increasing the flicker phase noise level. Bruce Samuel D. [x86/CPC] wrote: > Hi there, > > I'm working on a new GPS-Disciplined Rubidium Frequency Standard and I'm now > designing the distribution amplifier stage. There is many schematics > everywhere on the Internet, the most famous is the TADD-1 reviewed by the > not-less-famous TVB. Almost all of them use high-speed Op Amps originally > designed for video processing. The most common AOP are the MAX477 (used in > TADD-1) and the MAX4135. Unfortunately, both of them are now obsolete and > will be discontinued soon. I checked Digikey and Farnell, but those parts > are not available anymore, so, I'm looking for an equivalent (or better!) > replacement. > > Any hints ? > > PS : A French member of that list, Daniel, contacted me some weeks ago. Due > to a corrupted Outlook file, I lost your contact and wasn't able to keep in > touch with you. Please send me an email if you read this ;) > > --------------------- > Samuel DEMEULEMEESTER > Presse Non Stop - Canard PC > http://www.canardpc.com > Tel : +33.6.13.73.4003 > MSN : sam at x86.fr > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From magnus at rubidium.dyndns.org Mon Apr 6 22:58:56 2009 From: magnus at rubidium.dyndns.org (Magnus Danielson) Date: Tue, 07 Apr 2009 00:58:56 +0200 Subject: [time-nuts] RF mixers for oscillator characterization, some questions In-Reply-To: <49DA7847.5010905@xtra.co.nz> References: <49DA7847.5010905@xtra.co.nz> Message-ID: <49DA8930.9000208@rubidium.dyndns.org> Bruce Griffiths skrev: > Pete wrote: >> Arnold, >> >> I have had good experience with the SYPD series >> from Mini-circuits. I have not seen any used, but >> their new cost is reasonable. They do several things >> well e.g. the DC offset on the units I received is >> <1mV & they produce >2V p-p when driven @ >> +7dBm. >> >> Pete Rawson >> >> _______________________________________________ >> time-nuts mailing list -- time-nuts at febo.com >> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >> and follow the instructions there. >> >> > Pete > > These are OK except when one needs to isolate the IF ground from the RF > grounds to avoid low frequency ground loop problems. > The RPD and MPD through hole series are better in this regard as they > allow the IF ground to be isolated from the RF grounds. It should be noted that several of their SMB mixers have separated grounds, but it is not documented in their datasheets. > The flicker phase noise characteristics of the mixer/phase detector > should be measured as some mixers/phase detectors have lower flicker > phase noise than others. > The termination of the IF port will affect the mixer phase noise. For > offset frequencies < 100kHz a capacitive termination of the IF port > which reflects the sum frequency back into the mixer reduces the mixer > phase noise. It essentially sees a very low impedance at those frequencies. My experiments with capacitive loading of mixers basically indicates that the actual low-frequency slope of an unloaded mixer does not change, but the capacitor load filters the sum-frequency (with overtones) while a resistive 50 ohm load just loads the amplitude down and gives no significant change to performance. Optimum performance out of a mixer in my experience comes from fairly high-impedance load at low frequencies with a direct capacitive loading for filtering effects. A non-filtered response is quite interesting to see with a fairly slow beating frequency occuring. Kind of soothing waveforms floating slowly as waves over the scope. > The tradeoff is that the mixer output at higher offset > frequencies is attenuated by the IF port termination. > Terminating the IF port in a capacitor reduces the RF port impedance, so > that a low value series resistor (22 to 39 ohms - select for lowest > VSWR) is then required to improve the RF port VSWR. Which in improves phase-stability as reflected waves has less impact. -3 dB pads have also been used by the good folks over at NIST at one time. > Terminating the IF port with a capacitor also alters the mixer gain (as > a phase detector) so this needs to be measured in conjunction with the noise Well... the normal 50 Ohm loading alters the mixer gain... not the cap. But since the normation is towards 50 Ohm... ah well... > 10514 and 10534 mixers using discrete diodes supposedly have lower > flicker noise than mixers using integrated quad diodes. They however has common ground in their every day laboratory variants. There exist variants meant for production. However, they are not made out of that exquisite components, so their performance should be replicable, as have been pointed out before. Cheers, Magnus From bruce.griffiths at xtra.co.nz Mon Apr 6 23:40:41 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Tue, 07 Apr 2009 11:40:41 +1200 Subject: [time-nuts] RF mixers for oscillator characterization, some questions In-Reply-To: <49DA8930.9000208@rubidium.dyndns.org> References: <49DA7847.5010905@xtra.co.nz> <49DA8930.9000208@rubidium.dyndns.org> Message-ID: <49DA92F9.8080100@xtra.co.nz> Magnus Magnus Danielson wrote: > Bruce Griffiths skrev: > >> Pete wrote: >> >>> Arnold, >>> >>> I have had good experience with the SYPD series >>> from Mini-circuits. I have not seen any used, but >>> their new cost is reasonable. They do several things >>> well e.g. the DC offset on the units I received is >>> <1mV & they produce >2V p-p when driven @ >>> +7dBm. >>> >>> Pete Rawson >>> >>> _______________________________________________ >>> time-nuts mailing list -- time-nuts at febo.com >>> To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >>> and follow the instructions there. >>> >>> >>> >> Pete >> >> These are OK except when one needs to isolate the IF ground from the RF >> grounds to avoid low frequency ground loop problems. >> The RPD and MPD through hole series are better in this regard as they >> allow the IF ground to be isolated from the RF grounds. >> > > It should be noted that several of their SMB mixers have separated > grounds, but it is not documented in their datasheets. > > >> The flicker phase noise characteristics of the mixer/phase detector >> should be measured as some mixers/phase detectors have lower flicker >> phase noise than others. >> The termination of the IF port will affect the mixer phase noise. For >> offset frequencies < 100kHz a capacitive termination of the IF port >> which reflects the sum frequency back into the mixer reduces the mixer >> phase noise. >> > > It essentially sees a very low impedance at those frequencies. > > My experiments with capacitive loading of mixers basically indicates > that the actual low-frequency slope of an unloaded mixer does not > change, but the capacitor load filters the sum-frequency (with > overtones) while a resistive 50 ohm load just loads the amplitude down > and gives no significant change to performance. Optimum performance out > of a mixer in my experience comes from fairly high-impedance load at low > frequencies with a direct capacitive loading for filtering effects. > > A non-filtered response is quite interesting to see with a fairly slow > beating frequency occuring. Kind of soothing waveforms floating slowly > as waves over the scope. > > The effect of reflecting the sum frequency back into the mixer is documented in some Watkins Johnson and HP/Agilent appliction notes. It can be very effective even at microwave frequencies. >> The tradeoff is that the mixer output at higher offset >> frequencies is attenuated by the IF port termination. >> Terminating the IF port in a capacitor reduces the RF port impedance, so >> that a low value series resistor (22 to 39 ohms - select for lowest >> VSWR) is then required to improve the RF port VSWR. >> > > Which in improves phase-stability as reflected waves has less impact. > -3 dB pads have also been used by the good folks over at NIST at one time. > > The best combination is a series resistor plus an attenuator pad. >> Terminating the IF port with a capacitor also alters the mixer gain (as >> a phase detector) so this needs to be measured in conjunction with the noise >> > > Well... the normal 50 Ohm loading alters the mixer gain... not the cap. > But since the normation is towards 50 Ohm... ah well... > > >> 10514 and 10534 mixers using discrete diodes supposedly have lower >> flicker noise than mixers using integrated quad diodes. >> > > They however has common ground in their every day laboratory variants. > There exist variants meant for production. However, they are not made > out of that exquisite components, so their performance should be > replicable, as have been pointed out before. > > The B versions intended for through hole PCB mount have separate grounds for all ports. These don't seem to be as widely available as they once were although I have an HP10534B one. > Cheers, > Magnus > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Bruce From df6jb at ulrich-bangert.de Tue Apr 7 06:46:37 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Tue, 7 Apr 2009 08:46:37 +0200 Subject: [time-nuts] Replacement High-Speed AOP for Distribution Amplifier In-Reply-To: <00b101c9b6bf$f36103c0$da230b40$@com> Message-ID: <153CF70722B84B95A94BECC671029B2C@athlon> Samuel, from the "high isolation" point of view an AD8007 may be a good choice if you are out for a chip based design. If you consider a discrete design, follow Bruce's "low noise pages". Best regards Ulrich > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Samuel D. [x86/CPC] > Gesendet: Montag, 6. April 2009 16:00 > An: time-nuts at febo.com > Betreff: [time-nuts] Replacement High-Speed AOP for > Distribution Amplifier > > > Hi there, > > I'm working on a new GPS-Disciplined Rubidium Frequency > Standard and I'm now designing the distribution amplifier > stage. There is many schematics everywhere on the Internet, > the most famous is the TADD-1 reviewed by the not-less-famous > TVB. Almost all of them use high-speed Op Amps originally > designed for video processing. The most common AOP are the > MAX477 (used in > TADD-1) and the MAX4135. Unfortunately, both of them are now > obsolete and will be discontinued soon. I checked Digikey and > Farnell, but those parts are not available anymore, so, I'm > looking for an equivalent (or better!) replacement. > > Any hints ? > > PS : A French member of that list, Daniel, contacted me some > weeks ago. Due to a corrupted Outlook file, I lost your > contact and wasn't able to keep in touch with you. Please > send me an email if you read this ;) > > --------------------- > Samuel DEMEULEMEESTER > Presse Non Stop - Canard PC > http://www.canardpc.com > Tel : +33.6.13.73.4003 > MSN : sam at x86.fr > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From df6jb at ulrich-bangert.de Tue Apr 7 07:00:49 2009 From: df6jb at ulrich-bangert.de (Ulrich Bangert) Date: Tue, 7 Apr 2009 09:00:49 +0200 Subject: [time-nuts] Sawtooth correction in UT+ receiver In-Reply-To: <49DA4049.6000308@austin.rr.com> Message-ID: Graham, I just sent the command description to your private mail address. 73s de Ulrich, DF6JB > -----Ursprungliche Nachricht----- > Von: time-nuts-bounces at febo.com > [mailto:time-nuts-bounces at febo.com] Im Auftrag von Graham / KE9H > Gesendet: Montag, 6. April 2009 19:48 > An: Discussion of precise time and frequency measurement > Betreff: [time-nuts] Sawtooth correction in UT+ receiver > > > All: > > I have several Motorola UT+ receivers, hardware version R5, > version 3.1 software. Will these receivers provide a > sawtooth correction message that can be used for external correction? > > If so, can you provide or point me at the documentation for > the messages? > > Thanks, > --- Graham / KE9H > > == > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. From rexa at sonic.net Tue Apr 7 09:25:36 2009 From: rexa at sonic.net (Rex) Date: Tue, 07 Apr 2009 02:25:36 -0700 Subject: [time-nuts] CTS oscillator info? Message-ID: <49DB1C10.6020101@sonic.net> I just bought an oscillator on ebay. Here's the basic description from the listing, "This is an auction for one CTS Knights 970-2162-0 (WP 93216-L1) 5MHz OCXO oscillator." It is a double oven and actually has a frequency of 5.000055 MHz on the label, so 55 Hz above 5 MHz. I'm hoping it is a very clean source and will be good for beating against other 5 MHz sources to measure them, but I haven't found any more info on this one with searches. Does anyone on the list have any guess what it might have been used with? I'm guessing it may be for some piece of measurement test equipment. Or does anyone have a lead on specs for the quality of its output signal? The auction was 130297655960, if anyone wants to look at the pictures. thanks, Rex From sar10538 at gmail.com Tue Apr 7 11:16:30 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Tue, 7 Apr 2009 23:16:30 +1200 Subject: [time-nuts] Cabling GPS antennas Message-ID: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> I'm installing a Lucent KS-24019L112A connected to a Z3805A with the two located about 15m apart from each other. Both items connect via a 50Ohm N connector so I'm cabling for that impedance. Ideally I'd like to buy RG213 or LMR-400 but that is rare'ish down here in NZ and the price reflects that. I won't consider RG58 as there will be hardly anything coming out of the end of the cable with the loss it has at these frequencies. I was thinking outside the square and see that dual/quad screened RG6 is cheap and plentiful now but of course it's 75Ohm and there would be a big fat impedance mismatch using this. I thought about looking at fitting impedance matching baluns at each end but that is not cheap and there are losses involved with this approach anyway. Is it just down to bighting the bullet or has anyone had a way round this? 73, Steve -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet From sar10538 at gmail.com Tue Apr 7 11:18:30 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Tue, 7 Apr 2009 23:18:30 +1200 Subject: [time-nuts] Cabling GPS antennas In-Reply-To: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> References: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> Message-ID: <1231b6a80904070418x7e27eb76gc08dba3c1cfe6eca@mail.gmail.com> BTW, has anyone got a spare mount for this antenna they would be prepared to sell me? 2009/4/7 Steve Rooke : > I'm installing a Lucent KS-24019L112A connected to a Z3805A with the > two located about 15m apart from each other. Both items connect via a > 50Ohm N connector so I'm cabling for that impedance. Ideally I'd like > to buy RG213 or LMR-400 but that is rare'ish down here in NZ and the > price reflects that. I won't consider RG58 as there will be hardly > anything coming out of the end of the cable with the loss it has at > these frequencies. I was thinking outside the square and see that > dual/quad screened RG6 is cheap and plentiful now but of course it's > 75Ohm and there would be a big fat impedance mismatch using this. I > thought about looking at fitting impedance matching baluns at each end > but that is not cheap and there are losses involved with this approach > anyway. > > Is it just down to bighting the bullet or has anyone had a way round this? > > 73, > Steve > -- > Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW > Omnium finis imminet > -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet From sar10538 at gmail.com Tue Apr 7 12:09:38 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Wed, 8 Apr 2009 00:09:38 +1200 Subject: [time-nuts] Characterising frequency standards Message-ID: <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> A while back when we were discussing the performance of the Shortt free pendulum clock a reference was made to tvb's paper on allen deviation, http://www.leapsecond.com/hsn2006/ch2.pdf, which I found to be an excellent primer on the subject. It was interesting to see that with only a subset of the data, the allen deviations up to about the total of the data collection period could be calculated with reasonable accuracy. This had me thinking that if just a proportion of the data covering up to a specific averaging time gave good results, would disconnected data amounting to the same period give the same results. To me it seems that accuracy of the results is not related to the need to capture every event consecutively, it is more a case of collecting the same size data set even though samples were not consecutive. My reasoning behind this is that any set of data for a DUT should give the same results even though the data sets are not related time wise. OK, there are affects caused by different environmental conditions and drift but these can be calculated out. The only think that would shoot a big hole in this is if there was a repeatable difference between alternate cycles. So why am I saying this, well from what I have read on this group and on the web, I have been left with a feeling that it was vital to capture every event over a samplig period to ensure an accurate measurement. This requires equipment capable of time-stamping each event or employing such techniques as picket-fence. This is due to the limitations of most counters being unable to reset in time to measure the next time period of an input. At this stage I cannot see why it is not possible to just measure a cycle, let the counter/timer reset and then let it measure the next full cycle that follows. Agreed this would mean that alternate cycles were lost (assuming the counter/timer can reset within the space of one cycle) but the measurement could still collect the same amount of data points, it would just take twice as long. In fact, it could be possible to make the counter/timer measure alternate cycles on the opposite transitions, thereby reducing the total measurement time to just one and a half times the 'normal' time. With respect to any problem related to alternate cycles, the measurement system could be made to collect two data sets with single cycle skipped between each set. The difference will be that the data set would consist of measurements of each individual non-sequential cycle as opposed to a history of the start times of each cycle. So the short story is, does the data stream really have to consist of sequential samples or is it just a statistical thing so for the same size of data set, the results should be similar. 73, Steve -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet From bruce.griffiths at xtra.co.nz Tue Apr 7 12:39:10 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Wed, 08 Apr 2009 00:39:10 +1200 Subject: [time-nuts] Characterising frequency standards In-Reply-To: <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> References: <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> Message-ID: <49DB496E.6030602@xtra.co.nz> Steve Rooke wrote: > A while back when we were discussing the performance of the Shortt > free pendulum clock a reference was made to tvb's paper on allen > deviation, http://www.leapsecond.com/hsn2006/ch2.pdf, which I found to > be an excellent primer on the subject. It was interesting to see that > with only a subset of the data, the allen deviations up to about the > total of the data collection period could be calculated with > reasonable accuracy. This had me thinking that if just a proportion of > the data covering up to a specific averaging time gave good results, > would disconnected data amounting to the same period give the same > results. To me it seems that accuracy of the results is not related to > the need to capture every event consecutively, it is more a case of > collecting the same size data set even though samples were not > consecutive. My reasoning behind this is that any set of data for a > DUT should give the same results even though the data sets are not > related time wise. OK, there are affects caused by different > environmental conditions and drift but these can be calculated out. > The only think that would shoot a big hole in this is if there was a > repeatable difference between alternate cycles. > > So why am I saying this, well from what I have read on this group and > on the web, I have been left with a feeling that it was vital to > capture every event over a samplig period to ensure an accurate > measurement. This requires equipment capable of time-stamping each > event or employing such techniques as picket-fence. This is due to the > limitations of most counters being unable to reset in time to measure > the next time period of an input. At this stage I cannot see why it is > not possible to just measure a cycle, let the counter/timer reset and > then let it measure the next full cycle that follows. Agreed this > would mean that alternate cycles were lost (assuming the counter/timer > can reset within the space of one cycle) but the measurement could > still collect the same amount of data points, it would just take twice > as long. In fact, it could be possible to make the counter/timer > measure alternate cycles on the opposite transitions, thereby reducing > the total measurement time to just one and a half times the 'normal' > time. With respect to any problem related to alternate cycles, the > measurement system could be made to collect two data sets with single > cycle skipped between each set. > > The difference will be that the data set would consist of measurements > of each individual non-sequential cycle as opposed to a history of the > start times of each cycle. > > So the short story is, does the data stream really have to consist of > sequential samples or is it just a statistical thing so for the same > size of data set, the results should be similar. > > 73, > Steve > Steve It is essential to measure the phase differences between every Nth zero crossing without missing any such cycles. You don't have to time stamp every zero crossing every Nth one will suffice but one then has no information for shorter time intervals than N periods. More accurate estimation of the Allan deviation is possible if the time interval between time stamps is shorter. The reason that you can't omit one of the time stamps in the sequence (if you wish to accurately characterise the frequency stability of the source under test) is that the process isn't stationary. Estimates of classical measures such as the mean and standard deviation from the samples diverge as the number of samples increase. Whilst attempts have been made to estimate the error due to deadtime, the corrections require that the phase noise characteristics of the 2 (or more) sources being compared are accurately known. Avoiding deadtime problems is fairly easy if you use an instrument that can timestamp events on the fly. It is almost trivial to build such an instrument within a single FPGA or CPLD. Bruce From vogelchr at vogel.cx Tue Apr 7 12:40:31 2009 From: vogelchr at vogel.cx (Christian Vogel) Date: Tue, 07 Apr 2009 14:40:31 +0200 Subject: [time-nuts] Cabling GPS antennas In-Reply-To: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> References: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> Message-ID: <20090407144031.69xl3jdog0skww4w@webmail.df.eu> Hi Steve, > these frequencies. I was thinking outside the square and see that > dual/quad screened RG6 is cheap and plentiful now but of course it's > 75Ohm and there would be a big fat impedance mismatch using this. I > thought about looking at fitting impedance matching baluns at each end > but that is not cheap and there are losses involved with this approach > anyway. the manual of the Trimble Thunderbolt GPSDO recommends doing exactly that. 75Ohm cable obviously is cheaper, due to it being ubiquitously used for TV and video installations and has lower loss due to the higher impedance (impedance/resistance ratio). They (Trimble) claim that reflections will not introduce any problems. One can argue that, to cause interference effects, a wave has to travel back from the GPSO to the antenna and back to the GPDO (where it interferes with the direct signal). This will be attenuated by the SWR twice, and dampened by the cable loss twice. The issue at hand has been discussed at length one (two?) year(s) ago and included a link to an article that analytically analyzed the effect of multipath (of which the reflections are a specific case) on GPS accurady, if I remember correctly. Chris --- Quote from the Trimble manual (ThunderboltBook2003.pdf), Page "3-5" --- Note ? RG-59 is a 75 ohm coaxial cable. The ThunderBolt and the Bullet antenna are compatible with either 50-ohm or 75-ohm cable. Compared to most 50 ohm cable, 75 ohm cable provides superior transmissibility for the 1.5 GHz GPS signal and a better quality cable for the price. Mismatched impedance is not a problem. Note ? The input impedance of the ThunderBolt RF input & its antenna is 50 ohms. From bruce.griffiths at xtra.co.nz Tue Apr 7 12:47:09 2009 From: bruce.griffiths at xtra.co.nz (Bruce Griffiths) Date: Wed, 08 Apr 2009 00:47:09 +1200 Subject: [time-nuts] Cabling GPS antennas In-Reply-To: <20090407144031.69xl3jdog0skww4w@webmail.df.eu> References: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> <20090407144031.69xl3jdog0skww4w@webmail.df.eu> Message-ID: <49DB4B4D.2070705@xtra.co.nz> The reason that such cable mismatch isnt a problem is that the VSWR of the Thunderbolt input is relatively high. Bruce Christian Vogel wrote: > Hi Steve, > > >> these frequencies. I was thinking outside the square and see that >> dual/quad screened RG6 is cheap and plentiful now but of course it's >> 75Ohm and there would be a big fat impedance mismatch using this. I >> thought about looking at fitting impedance matching baluns at each end >> but that is not cheap and there are losses involved with this approach >> anyway. >> > > the manual of the Trimble Thunderbolt GPSDO recommends doing exactly > that. 75Ohm cable obviously is cheaper, due to it being ubiquitously > used for TV and video installations and has lower loss due to the > higher impedance (impedance/resistance ratio). They (Trimble) claim > that reflections will not introduce any problems. > > One can argue that, to cause interference effects, a wave has to > travel back from the GPSO to the antenna and back to the GPDO (where > it interferes with the direct signal). This will be attenuated by the > SWR twice, and dampened by the cable loss twice. > > The issue at hand has been discussed at length one (two?) year(s) ago > and included a link to an article that analytically analyzed the > effect of multipath (of which the reflections are a specific case) on > GPS accurady, if I remember correctly. > > Chris > > --- Quote from the Trimble manual (ThunderboltBook2003.pdf), Page "3-5" --- > Note ? RG-59 is a 75 ohm coaxial cable. The ThunderBolt and the Bullet > antenna are > compatible with either 50-ohm or 75-ohm cable. Compared to most 50 ohm > cable, 75 > ohm cable provides superior transmissibility for the 1.5 GHz GPS signal and a > better quality cable for the price. Mismatched impedance is not a problem. > > Note ? The input impedance of the ThunderBolt RF input & its antenna > is 50 ohms. > > > > > > > > > _______________________________________________ > time-nuts mailing list -- time-nuts at febo.com > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > From phk at phk.freebsd.dk Tue Apr 7 16:22:06 2009 From: phk at phk.freebsd.dk (Poul-Henning Kamp) Date: Tue, 07 Apr 2009 16:22:06 +0000 Subject: [time-nuts] Characterising frequency standards In-Reply-To: Your message of "Wed, 08 Apr 2009 00:09:38 +1200." <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> Message-ID: <35851.1239121326@critter.freebsd.dk> In message <1231b6a80904070509m5b8bb638gbc088500444254c3 at mail.gmail.com>, Steve Rooke writes: >So why am I saying this, well from what I have read on this group and >on the web, I have been left with a feeling that it was vital to >capture every event over a samplig period to ensure an accurate >measurement. It is vital only to simplify the calculation of the uncertainties on the result more than the result itself. If you skip every other time interval, you have no information about noise of the obvious 1/p frequency, just like Nyquist says. Dividing a 10MHz signal to 1PPS, and measuring the adev on that, therefore gives us no right to talk about what happens on the fast side of tau=1sec. Aperiodic sampling can be an incredible powerfull tool to use instead: Comparing the two 10MHz signals by measuring the difference i duration between ramdomly chosen sequences of thousand samples, gives very detailed information, as long as you know the exact relative placement of your 1k sample runs relative to each other. The mathmatical handling is nasty though. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk at FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. From phk at phk.freebsd.dk Tue Apr 7 16:22:47 2009 From: phk at phk.freebsd.dk (Poul-Henning Kamp) Date: Tue, 07 Apr 2009 16:22:47 +0000 Subject: [time-nuts] Characterising frequency standards In-Reply-To: Your message of "Wed, 08 Apr 2009 00:39:10 +1200." <49DB496E.6030602@xtra.co.nz> Message-ID: <35862.1239121367@critter.freebsd.dk> In message <49DB496E.6030602 at xtra.co.nz>, Bruce Griffiths writes: >Steve Rooke wrote: >It is essential to measure the phase differences between every Nth zero >crossing without missing any such cycles. And he does, except it is only every 2N instead of 1N. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk at FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. From david at endor.com Tue Apr 7 17:15:54 2009 From: david at endor.com (David McGaw) Date: Tue, 07 Apr 2009 13:15:54 -0400 Subject: [time-nuts] Cabling GPS antennas In-Reply-To: <49DB4B4D.2070705@xtra.co.nz> References: <1231b6a80904070416j14adc226vb3e8994709acd8f8@mail.gmail.com> <20090407144031.69xl3jdog0skww4w@webmail.df.eu> <49DB4B4D.2070705@xtra.co.nz> Message-ID: <200904071715.n37HFiQp023687@mailhub24.dartmouth.edu> Hi Steve, I find it hard to believe myself, but the numbers don't lie. A 1.5:1 SWR junction gives 0.177dB transmission loss and a -13.98 dB reflection. If you have a true 50 ohm antenna and receiver and use 75 ohm LOSS-LESS cable, the transmission loss will be only 0.35dB and the doubly reflected wave will be 28dB down. Any line loss makes things rapidly better still. 15m of TV foam-type RG-6/U will have ~3.7dB cable loss or ~4dB total loss, and a reflection 35dB down. BTW, return loss of the cable itself is rated at -15dB @ 1500MHz! And, as has been pointed out, the SWR of the receiver and antenna will not be 1:1 either. Good luck, David At 08:47 AM 4/7/2009, you wrote: >The reason that such cable mismatch isnt a problem is that the VSWR of >the Thunderbolt input is relatively high. > >Bruce > >Christian Vogel wrote: > > Hi Steve, > > > > > >> these frequencies. I was thinking outside the square and see that > >> dual/quad screened RG6 is cheap and plentiful now but of course it's > >> 75Ohm and there would be a big fat impedance mismatch using this. I > >> thought about looking at fitting impedance matching baluns at each end > >> but that is not cheap and there are losses involved with this approach > >> anyway. > >> > > > > the manual of the Trimble Thunderbolt GPSDO recommends doing exactly > > that. 75Ohm cable obviously is cheaper, due to it being ubiquitously > > used for TV and video installations and has lower loss due to the > > higher impedance (impedance/resistance ratio). They (Trimble) claim > > that reflections will not introduce any problems. > > > > One can argue that, to cause interference effects, a wave has to > > travel back from the GPSO to the antenna and back to the GPDO (where > > it interferes with the direct signal). This will be attenuated by the > > SWR twice, and dampened by the cable loss twice. > > > > The issue at hand has been discussed at length one (two?) year(s) ago > > and included a link to an article that analytically analyzed the > > effect of multipath (of which the reflections are a specific case) on > > GPS accurady, if I remember correctly. > > > > Chris > > > > --- Quote from the Trimble manual (ThunderboltBook2003.pdf), Page "3-5" --- > > Note ? RG-59 is a 75 ohm coaxial cable. The ThunderBolt and the Bullet > > antenna are > > compatible with either 50-ohm or 75-ohm cable. Compared to most 50 ohm > > cable, 75 > > ohm cable provides superior transmissibility for the 1.5 GHz GPS > signal and a > > better quality cable for the price. Mismatched impedance is not a problem. > > > > Note ? The input impedance of the ThunderBolt RF input & its antenna > > is 50 ohms. > > > > > > > > > > > > > > > > > > _______________________________________________ > > time-nuts mailing list -- time-nuts at febo.com > > To unsubscribe, go to > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > > and follow the instructions there. > > > > > > >_______________________________________________ >time-nuts mailing list -- time-nuts at febo.com >To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts >and follow the instructions there. From peterl at standingwave.org Tue Apr 7 20:10:26 2009 From: peterl at standingwave.org (Peter Loron) Date: Tue, 7 Apr 2009 13:10:26 -0700 Subject: [time-nuts] CTS oscillator info? Message-ID: <8E78B99F-D366-44EB-B20A-58271758635C@standingwave.org> > I just bought an oscillator on ebay. Here's the basic description from > the listing, > "This is an auction for one CTS Knights 970-2162-0 (WP 93216-L1) 5MHz > OCXO oscillator." > > It is a double oven and actually has a frequency of 5.000055 MHz on > the > label, so 55 Hz above > 5 MHz. I'm hoping it is a very clean source and will be good for > beating > against other 5 MHz > sources to measure them, but I haven't found any more info on this one > with searches. > > Does anyone on the list have any guess what it might have been used > with? I'm guessing it may be > for some piece of measurement test equipment. Or does anyone have a > lead > on specs for the > quality of its output signal? > > The auction was 130297655960, if anyone wants to look at the pictures. > > thanks, > Rex Hello, group. The item Rex is referring to is one I sold to him. When I acquired the lot of OCXOs, I sent a mail to CTS, asking them for any information on them. They were able to supply me with the mechanical drawings, but the specs are proprietary as they were custom built for Lucent...likely embedded in some sort of comms equipment. I'm guessing that if they went to the expense of buying double-oven oscillators, they chose good specs for them. I'm thinking of desoldering the adjustment screws on one of them to see if I can tune it to 5.000000 MHz, although that is probably in noise floor of my equipment. For somebody (like me) who does not have a background in metrology and lacks any serious measuring equipment, is there a way to characterize items like this short of sending them to a lab? Thanks. -Pete From tvb at LeapSecond.com Tue Apr 7 20:16:14 2009 From: tvb at LeapSecond.com (Tom Van Baak) Date: Tue, 7 Apr 2009 13:16:14 -0700 Subject: [time-nuts] Characterising frequency standards References: <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> Message-ID: Steve, You've asked a couple of questions. Let me start with this. It is true that if one were only interested in the performance of a pendulum (or quartz or atomic) clock for averaging times of one day that all you would need is a series of time error (aka phase) measurements made about the same time once a day (doesn't have to be that exact). After one week, you'd have 7 error measurements (=6 frequency =5 stability points) and this is adequate to calculate the ADEV for tau 1 day. This alone allows you to rank your clock among all the other pendulum clocks out there. Note also you get time error and rate error from these few data points too. As another example, suppose you have a nice HP 10811A oscillator and want to measure its drift rate. In this case you could spend just 100 seconds and measure its frequency once a day, or even once every couple of days. Do this for a month and you'd have several dozen points. If you plot these frequency measurements you will likely see that they approximately fall on a line; the slope of the is the frequency drift rate of the 10811. The general shape of the points, or the fit of the line is a rough indication of how consistent the drift rate is or if it's increasing or decreasing. Neither of these examples require a lot of data. Both of these are real-world examples. OK so far? /tvb From rexa at sonic.net Tue Apr 7 20:56:11 2009 From: rexa at sonic.net (Rex) Date: Tue, 07 Apr 2009 13:56:11 -0700 Subject: [time-nuts] CTS oscillator info? In-Reply-To: <8E78B99F-D366-44EB-B20A-58271758635C@standingwave.org> References: <8E78B99F-D366-44EB-B20A-58271758635C@standingwave.org> Message-ID: <49DBBDEB.4020507@sonic.net> Peter Loron wrote: >> I just bought an oscillator on ebay. Here's the basic description from >> the listing, >> "This is an auction for one CTS Knights 970-2162-0 (WP 93216-L1) 5MHz >> OCXO oscillator." >> >> It is a double oven and actually has a frequency of 5.000055 MHz on >> the >> label, so 55 Hz above >> 5 MHz. I'm hoping it is a very clean source and will be good for >> beating >> against other 5 MHz >> sources to measure them, but I haven't found any more info on this one >> with searches. >> >> Does anyone on the list have any guess what it might have been used >> with? I'm guessing it may be >> for some piece of measurement test equipment. Or does anyone have a >> lead >> on specs for the >> quality of its output signal? >> >> The auction was 130297655960, if anyone wants to look at the pictures. >> >> thanks, >> Rex >> > > Hello, group. The item Rex is referring to is one I sold to him. When > I acquired the lot of OCXOs, I sent a mail to CTS, asking them for any > information on them. They were able to supply me with the mechanical > drawings, but the specs are proprietary as they were custom built for > Lucent...likely embedded in some sort of comms equipment. I'm guessing > that if they went to the expense of buying double-oven oscillators, > they chose good specs for them. > > I'm thinking of desoldering the adjustment screws on one of them to > see if I can tune it to 5.000000 MHz, although that is probably in > noise floor of my equipment. > > For somebody (like me) who does not have a background in metrology and > lacks any serious measuring equipment, is there a way to characterize > items like this short of sending them to a lab? > > Thanks. > > -Pete > > > A list member sent me a brief CTS datasheet. Looks like the oscillator is probably a version of JKSC-142. The info is brief and does not mention noise but the main feature is long term and temperature stability. STABILITY: +/-1x10^-7 for 20 yrs without any adjustment. I can't guess why Lucent would want them 55 Hz above 5 MHz unless it was some kind of measurement application, but I don't know much about telephone stuff. -Rex From rexa at sonic.net Tue Apr 7 21:32:15 2009 From: rexa at sonic.net (Rex) Date: Tue, 07 Apr 2009 14:32:15 -0700 Subject: [time-nuts] CTS oscillator info? In-Reply-To: <49DBBDEB.4020507@sonic.net> References: <8E78B99F-D366-44EB-B20A-58271758635C@standingwave.org> <49DBBDEB.4020507@sonic.net> Message-ID: <49DBC65F.1070606@sonic.net> Rex wrote: > A list member sent me a brief CTS datasheet. Looks like the oscillator > is probably a version of JKSC-142. The info is brief and does not > mention noise but the main feature is long term and temperature > stability. STABILITY: +/-1x10^-7 for 20 yrs without any adjustment. > > I can't guess why Lucent would want them 55 Hz above 5 MHz unless it was > some kind of measurement application, but I don't know much about > telephone stuff. > > -Rex > I think small attachments are ok. I cut out and shrunk the portion of the datasheet that seems to apply to this oscillator. Attached as a gif file. -------------- next part -------------- A non-text attachment was scrubbed... Name: jksc-142.gif Type: image/gif Size: 81999 bytes Desc: not available Url : http://www.febo.com/pipermail/time-nuts/attachments/20090407/b78b57c4/attachment-0001.gif From peterl at standingwave.org Tue Apr 7 21:38:38 2009 From: peterl at standingwave.org (Peter Loron) Date: Tue, 7 Apr 2009 14:38:38 -0700 Subject: [time-nuts] CTS oscillator info? In-Reply-To: <49DBC65F.1070606@sonic.net> (sfid-20090407_143023_462755_DED4CB6F) References: <8E78B99F-D366-44EB-B20A-58271758635C@standingwave.org> <49DBBDEB.4020507@sonic.net> <49DBC65F.1070606@sonic.net> (sfid-20090407_143023_462755_DED4CB6F) Message-ID: <08686AAF-4253-46AA-A99F-DEBFF7FDF519@standingwave.org> On Apr 7, 2009, at 2:32 PM, Rex wrote: > Rex wrote: >> A list member sent me a brief CTS datasheet. Looks like the >> oscillator is probably a version of JKSC-142. The info is brief and >> does not mention noise but the main feature is long term and >> temperature stability. STABILITY: +/-1x10^-7 for 20 yrs without any >> adjustment. >> >> I can't guess why Lucent would want them 55 Hz above 5 MHz unless >> it was some kind of measurement application, but I don't know much >> about telephone stuff. >> >> -Rex >> > > I think small attachments are ok. I cut out and shrunk the portion > of the datasheet that seems to apply to this oscillator. > > Attached as a gif file. > > > Rex, thanks for posting that information! -Pete From sar10538 at gmail.com Wed Apr 8 11:41:26 2009 From: sar10538 at gmail.com (Steve Rooke) Date: Wed, 8 Apr 2009 23:41:26 +1200 Subject: [time-nuts] Characterising frequency standards In-Reply-To: References: <1231b6a80904070509m5b8bb638gbc088500444254c3@mail.gmail.com> Message-ID: <1231b6a80904080441p7a747a3h1f73bf8a2df30350@mail.gmail.com> Tom, I understand fully the points that you have made but I have obviously not made my point clear to all and i apologise for my poor communication skills. This is what I'm getting at: Using your adev1.exe from http://www.leapsecond.com/tools/adev1.htm and processing various forms of gps.dat from http://www.leapsecond.com/pages/gpsdo-sim/gps.dat.gz. C:\Documents and Settings\Steve Rooke\Desktop>adev1.exe 1 gps1.dat) C:\Documents and Settings\Steve Rooke\Desktop>adev1.exe 1 gps2.dat) C:\Documents and Settings\Steve Rooke\Desktop>adev1.exe 1 : > Steve, > > You've asked a couple of questions. Let me start with this. > > It is true that if one were only interested in the performance > of a pendulum (or quartz or atomic) clock for averaging times > of one day that all you would need is a series of time error > (aka phase) measurements made about the same time once > a day (doesn't have to be that exact). After one week, you'd > have 7 error measurements (=6 frequency =5 stability points) > and this is adequate to calculate the ADEV for tau 1 day. > This alone allows you to rank your clock among all the other > pendulum clocks out there. Note also you get time error and > rate error from these few data points too. > > As another example, suppose you have a nice HP 10811A > oscill