[time-nuts] Frequency Divider
bruce.griffiths at xtra.co.nz
Thu Apr 2 21:37:37 UTC 2009
Luis Cupido wrote:
>> The CPLDs are programmed via the JTAG port.
>> Suitable JTAG programming cables are readily availble.
> Or you can build one to use the LPT port of your PC using just a 74HC244.
> Luis Cupido.
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Using a 74HC244 may be somewhat problematic with CPLDs that don't have
5V tolerant inputs.
Even when using a device with 5V tolerant inputs a 74HCT244 may be more
suitable for translating LVCMOS logic level outputs from the CPLD.
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