[time-nuts] DDS'ery

[Luis Cupido]

Hi,

I'm an Altera user and would say the DDS core generator
is really very good, I would expect it to be not too different from
Xilinx these days. (does anyone that lives on both worlds know better ?)

lc
ct1dmk.


On 6/21/2011 10:03 AM, Ulrich Bangert wrote:
> John,
>
> as usual I second your opinion and I did have already on my mind to suggest
> XILINX's DDS compiler to the group too.
>
> However your statement
>
>> to provide SFDR up to 150 dB (and I'd notice it if I were
>> getting much less than that in practice.)
>
> has pushed me up! When I tell the compiler to generate me a 150 dB SFDR DDS
> then it produces an block with 28 (!) bits output witdh for the DAC. So, I
> am asking myself what wonder-chips you may be using as DAC for your DDS that
> features a dynamic range high enough to really measure a 150 dB SFDR?
>
> Best regards
> Ulrich Bangert, DF6JB
>
>> -----Ursprüngliche Nachricht-----
>> Von: time-nuts-bounces at febo.com
>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von John Miles
>> Gesendet: Dienstag, 21. Juni 2011 00:52
>> An: 'Discussion of precise time and frequency measurement'
>> Betreff: Re: [time-nuts] DDS'ery
>>
>>
>> I'm not familiar with Altera's DDS options, but I will say
>> that Xilinx's DDS compiler is superb.  It can be configured
>> to provide SFDR up to 150 dB (and I'd notice it if I were
>> getting much less than that in practice.)
>>
>> As Javier hinted, the reason you can't use the MSB directly
>> is that its transition point is not necessarily stationary
>> between cycles of the frequency you're trying to synthesize.
>> It will flop around all over the place.  You need at least a
>> few more bits in most applications -- remember that in an
>> n-bit word, the magnitude represented by the n-1 LSBs is
>> almost as much as the bit-n MSB.
>>
>> When DDS technology was first becoming popular in the 1980s,
>> Qualcomm was one of the main vendors, and they required
>> external DACs.  High-speed DACs were pricy and used a lot of
>> power, so I imagine that a great many people tried feeding
>> the MSB directly to the filter, as I did.  It could be
>> feasible at some selected frequencies or at very high
>> clock/output ratios, but in the general case the output
>> signal is just comically awful.
>>
>> You would need a truly massive filter to provide the needed
>> flywheel effect to make up for those missing bits.  And it
>> would need to be a BPF, not just an LPF, because not all of
>> the artifacts associated with output quantization are above
>> the desired carrier frequency.  Sometimes the MSB's toggle
>> period is going to be shorter than it should be, and
>> sometimes it's going to be longer.
>>
>> -- john, KE5FX
>>
>>
>>> -----Original Message-----
>>> From: time-nuts-bounces at febo.com [mailto:time-nuts-
>> bounces at febo.com]
>>> On Behalf Of Luis Cupido
>>> Sent: Monday, June 20, 2011 9:46 AM
>>> To: Discussion of precise time and frequency measurement
>>> Subject: Re: [time-nuts] DDS'ery
>>>
>>> Gracias, Javier.
>>>
>>> As you read in my previous email I'm basically
>>> worried about close-in spurs (those that
>>> will pass through the PLL loop filter).
>>>
>>> will digest that 4th section... tks.
>>>
>>> ....
>>>
>>> Since I'm inside an FPGA... I'm eager to get
>>> spurs down without leaving the digital world...
>>> Anyone knows any literature covering that ?
>>>
>>> Thanks.
>>>
>>> Luis cupido.
>>> ct1dmk.
>>>
>>>
>>>
>>>
>>>
>>> On 6/20/2011 4:52 PM, Javier Herrero wrote:
>>>> To reduce the spurii due to quantization distortion. Here is an
>>>> explanation, in Section 4
>>>>
>>>> http://www.analog.com/static/imported-
>>> files/tutorials/450968421DDS_Tutorial_rev12-2-99.pdf
>>>>
>>>>
>>>> Regards,
>>>>
>>>> Javier
>>>>
>>>> El 20/06/2011 17:39, Luis Cupido escribió:
>>>>> Well, if we really need to filter it out
>>>>> we better filter the MSB and square it
>>>>> again...
>>>>>
>>>>> Why having a DAC for ???
>>>>>
>>>>> Right ?
>>>>>
>>>>> Luis Cupido.
>>>>> ct1dmk.
>>>>>
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>>>>>
>>>>>
>>>>
>>>
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