[time-nuts] FE-.5680A trimming resolution
lists at rtty.us
Mon Jan 30 13:18:28 UTC 2012
It's the whole "unlock and relock thing that I was trying to get around. In any PLL, the VCXO / VCO will need to pull a bit further than the lock range, just to get things lined up. Testing this sort of thing can be a pain.
On Jan 30, 2012, at 2:20 AM, Javier Herrero wrote:
> Also I expect that the range would be somewhat limited by the unit software, since the control word is 32-bit, same as the DDS program word with, and I don't think that the little thing would enable to program the DDS from zero to 32-bit. In any case, my idea was first to only monitor the DDS word (at serial port) and serial port offset message limits, and also to test in that way the lock range of the 5680A - this can be a bit tedious since when I programmed a 10Hz offset, the unit unlocked ant took several seconds to lock again.
> El 29/01/2012 21:41, Bob Camp escribió:
>> If you try to do full scale, check the range of your VCXO first. The digital test is much easier if you already know where your VCXO stops tuning.
>> On Jan 29, 2012, at 1:45 PM, Javier Herrero<jherrero at hvsistemas.es> wrote:
>>> I'm now gathering the unit self-updating of DDS data, that will take somewhat long... so I will try later or tomorrow. Since we have seen that the DDS values are reported back in a response to a command, it is easy to do without the need to have anything hooked to the SPI bus :)
>>> El 29/01/2012 19:37, Scott Newell escribió:
>>>> At 05:45 AM 1/29/2012, Javier Herrero wrote:
>>>>> For example, the following data has been gathered:
>>>>> Serial offset 00 00 00 00
>>>>> DDS A word: 44 02 62 F6 = 1141007094 = 5 313 228.32219 Hz
>>>>> DDS B word: 43 FD CC 8E = 1140706446 = 5 311 828.32085 Hz
>>>> Can you do a test at +/- fullscale offset as well?
>>>> This is a very exciting discovery. Nice work!
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> Javier Herrero
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