[time-nuts] World's most accurate PC clock!

Poul-Henning Kamp phk at phk.freebsd.dk
Mon Jul 4 03:49:14 EDT 2005


In message <20050703.152133.118722707.cfmd at bredband.net>, Magnus Danielson writ
es:

>> days and generate the 14.318MHz by PLL instead.
>
>Which should be an approximation to 14,31818 MHz I would assume, since that is
> 2
>2 *5*715909 Hz, but an approximation to that would be quite acceptable
>considering it is usually +/- 100 ppm (for real TV uses it should be
>+/- 3 ppm). Ever measured what is actually there in PLLed cases? (curiosity)

The correct frequency is 315/88 MHz, but that is not the original derivation
of it.  I found the real derivation on the web some time back, but now
I can't seem to find it again.

>One should figure out which pin is the input to the CMOS inverter usually used
>in such oscillators. This is where the signal shall be fed in.

Not all of them use a cmos inverter any more, so the data sheet should be
consulted.

-- 
Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
phk at FreeBSD.ORG         | TCP/IP since RFC 956
FreeBSD committer       | BSD since 4.3-tahoe    
Never attribute to malice what can adequately be explained by incompetence.




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