[time-nuts] More on paralleling output gates
SAIDJACK at aol.com
SAIDJACK at aol.com
Mon Apr 10 14:05:40 EDT 2006
Hi,
one of the problems with the PCB trick described in the previous email is
that PCB substrates are not very accurate in terms of impedance matching: +-10%
accuracy on the impedance is already asking a lot, especially when using
Asian manufacturers. Problems get worse when going inter-layer through vias.
These discontinuities and impedance mismatches cause signals to bounce around and
cause ringing etc.
It helps significantly to add a series resistor at the source since these
ringing effects will then be terminated at both ends of the PCB trace, rather
than only at the end of the line. Without the series terminator at the signal
source, the reflected wave would reach the source again, be reflected again,
and end up at the end termination resistor a second time...
>It's a common trick on PCBs to series terminate point to point clock lines
with the >impedance of the transmission line. You get a simple 2:1 divider
from the source resistor >and the transmission line, so the signal goes out at
half height. When the signal gets to >the far end where there isn't any
termination resistor, it bounces off resulting in a full height >signal. That's
what the receiving chip sees. When that reflection gets back to the source,
>it sees the source termination resistor and there are no reflections.
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