[time-nuts] Conditioning clock signal paths

Stephan Sandenbergh stephan at rrsg.ee.uct.ac.za
Wed Jun 28 06:26:56 EDT 2006


Can someone maybe clarify the following apparent paradox for me? 

High stability timing outputs (e.g. out of an OCXO) are usually sinusoids
which are then hard limited to become a digital signal. This digital signal
is required to have a high slew rate to immunize the signal against power
rail noise.

However, the higher your slew rates the higher the frequency harmonics
needed to generate your output. Following this, a clock output of, say 10MHz
which is generally viewed as a low frequency signal by RF guys,
requires/occupies a very high bandwidth of maybe a few hundred MHz.

On the other hand, it is generally accepted that phase noise (or clock
jitter) is reduced by reducing the noise bandwidth. This, however, lowers
your slew rate.

I guess in a fantasy world where there are no power rail fluctuations, no
1/f noise attributed by silicon and no thermal noise etc - Simply put free
of any noise. One could have operated digital systems from notched filtered
sinusoids. Then, the logic transition threshold and the rise time of the
sinusoid would be known. Accordingly, the logic would clock exactly at the
sinusoids crossover, every time.

Now for the paradox: Do you filter your digital signal to lower the noise
bandwidth? Or do you want a high as possible rise time (slew rate) to get
the best PSSR?

My gut tells me this is decided as a trade-off. However, some people have
warned me not to filter the output of digital signals. The reason being that
by filtering the matched 50ohm clock line you effectively mismatch it -
creating more noise due to the resultant reflections. (On the other hand, I
also know that only the fundamental of digital signals can be matched since
it occupies such a high bandwidth.)

So if this is a trade-off like I think it is - how do you decide on an
appropriate signal bandwidth? I guess it is a function of the clock's
stability? Am I making this more complex than it really is?

It would be of great help if you timing guru's can shed some light on this
topic for me.


Stephan Sandenbergh


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