[time-nuts] Gate propagation delay jitter
Enrico Rubiola
rubiola at femto-st.fr
Tue Apr 10 11:13:08 EDT 2007
My friends, if you worry about jitter there is a trick:
synchronize the signat to the clock with a D-type flip flop,
just at the output.
Maybe too trivial for you.
E.
Enrico Rubiola
professor of electronics
web: http://rubiola.org
e-mail: rubiola at femto-st.fr
FEMTO-ST Institute
32 av. de l'Observatoire
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