[time-nuts] Fury Interface Board simulation results

Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Dec 11 18:42:46 EST 2007


George

The circuit schematic for a BJT version of the JFET frequency is attached.
The biasing is a little more complex as it is necessary set each
frequency doubler BJT collector current at about 1mA or so to maximise
conversion gain.
The input impedance  is also around 50 ohms.
Have also minimised the number of different component values used.
Other transistors may be substituted but some care is required as the 
reverse voltage across the base emitter junction is about 2V for a
+13dBm input.
Some filtering of the output waveform is required.
The intended output load is 50 ohms.

The 200 ohm emitter series resistors together with the transformed
source impedance ensure that there is sufficient degeneration to keep
the phase noise low.

Obtaining suitable transistors for this circuit should be much easier
than obtaining suitable JFETS for the JFET doubler.

Whilst a diode doubler (at higher frequencies this may be the only
sensible option) could be used it would need both an input amplifier and
an output amplifier.

Bruce
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