[time-nuts] is there a "best bet" advanced hobbyist buildable GPSDOdesign?

[Bruce Griffiths]

michael taylor wrote:
> On Dec 11, 2007 3:53 PM, Bruce Griffiths <bruce.griffiths at xtra.co.nz> wrote:
>   
>> If you want simplicity and higher performance you can do far better with
>> fewer parts,
>> An expensive high resolution DAC can be replaced with a software
>> sigma-delta DAC that has higher resolution.
>> The complex phase detector can be replaced with a D flipflop.
>> Add a microprocessor plus an opamp or 2 to filter and scale the EFC
>> voltage and thats about all thats required in addition to a good GPS
>> timing receiver.
>> For improved performance a hardware circuit to correct the PPS sawtooth
>> error will improve the medium term stability significantly when using a
>> high performance GPS timing receiver that provides an estimate of this
>> error.
>>     
>
> You have made similar comments about I believe the same approach in
> the past. I was wondering if you have ever sketched out a schematic,
> even if only rough. Perhaps with a few suggested components to try
> (i.e. DAC, Op-Amp) that would be a good starting point for anyone who
> wanted to prototype and evaluate the performance of this approach.
>
> It is beyond my elementary design abilities to convert your
> description into a well implemented design on my own, but I would be
> interested in try to at least see if I could construct an unit using
> these suggested techniques.
>
> -Michael
>
>   
Michael

Will provide a suitable circuit schematic for the DAC portion by around
1300 UTC.
The circuit will be suitable for either a PWM or a sigma-delta DAC.
The design will also include the ability to set (by selecting the values
of a couple of resistors) the EFC range to suit most OCXOs.

A sigma-delta DAC has the advantage that its easier to filter its output
than that of an equivalent resolution PWM DAC.

Combining a pair of lower resolution DACs with a few resistors will
produce a higher resolution output, however there will be problems with
monotonicity (when the coarse DAC output changes) unless the system is
periodically calibrated to  accommodate drifts due to temperature and
time. This can of course be done in software (no need for external
trimmers) however the calibration circuitry adds considerable complexity.

When testing the sigma delta DAC concept in software start with a simple
first order sigma delta modulator and then try a second order modulator
(dont go to higher order than a 2nd order modulator as they arent
necessary for this application and stabilisation of high order
modulators adds considerable complexity and can be difficult to achieve).

A suitable D flipflop phase detector design will follow shortly thereafter.

Do you also want a circuit for a sawtooth corrector using one of the
Maxim/Dallas programmable delay lines?

You will need to write the software for the sawtooth corrector and for
the D flip flop phase detector.
However I can provide descriptions of what the software needs to do,
along with suggestions for suitable algorithms.

Bruce