[time-nuts] Austron PRR-10 GPS discliplined Rb...

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Jan 28 08:22:52 EST 2007


Ulrich Bangert wrote:
> Bruce,
>
> good to have you in the background with a look for the finer details.
>
>   
>> A frequency multiplier, either within the DDS, or external to it is 
>> required to generate a suitable DDS clock from either a 10MHz 
>> or 20MHz input.
>>     
>
> Of course! That's why i use a AD9852 which features BOTH an internal
> programable frequency multiplier as well as 48 bit phase accumulator
> resolution. AFAIK you cannot get a dds chip with higher resolution at
> the time. The people who need higher resolutions use tricky design
> around the dds. Stanford Research for example uses a 48 Bit resolution
> in their CG635 clock generator but time multiplex the lsd of the dds
> input with a 16 bit resolution pwm signal to get a 64 bit resolution
> clock (at least when taking the mean over a longer time).
>
> Best regards
> Ulrich Bangert, DF6JB
>
>   
>> -----Ursprüngliche Nachricht-----
>> Von: time-nuts-bounces at febo.com 
>> [mailto:time-nuts-bounces at febo.com] Im Auftrag von Dr Bruce Griffiths
>> Gesendet: Samstag, 27. Januar 2007 23:43
>> An: Discussion of precise time and frequency measurement
>> Betreff: Re: [time-nuts] Austron PRR-10 GPS discliplined Rb...
>>
>>
>>     
Ulrich

Since an adjustment range of a few ppm suffices to correct the frequency 
error of an OCXO (even one that has aged for several decades) a cascaded 
mix and divide technique can be used to increase the resolution by 
another 16 bits or so whilst reducing the close in phase noise, reducing 
the phase noise floor, and reducing DDS output spur levels.

The tradeoff is that the mix and divide technique increases the circuit 
complexity and cost somewhat, in that a mixer, a divider, a bandpass 
filter and an amplifier are required for each stage.
It would also be possible to use a DDS plus a cascaded set of mix and 
divide modules to generate the reference frequency input for another set 
of cascaded mix and divide modules plus another DDS.
The second circuit can then employ a longer chain of cascaded mix and 
divide modules to further extend the resolution by perhaps another 32 
bits or more whilst retaining an adjustment range of say 10 -100 ppm. In 
practice there may be few applications for such a 96 bit resolution DDS 
with a 10-100ppm adjustment range.

Bruce



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