[time-nuts] 5370B improvement report

SAIDJACK at aol.com SAIDJACK at aol.com
Sat Jun 23 05:03:21 EDT 2007

Hi guys,
I am back from a week long Asia trip. Here are some results of my 5370B  
modification/calibration running on the Jackson-Labs Fury 10MHz against a PRS10  
for the entire week.
After noticing that the Frequency Multiplier board (10MHz to 200MHz)  
trim-caps settings are really key to the RMS noise performance of the 5370B, I  came 
up with some modifications to the circuit to improve it's  performance.
The goal of this was to get a 200MHz ECL signal out of the A21 reference  
board with the least jitter:
1) take the 50MHz output of the board (TP2 on the A21 board for example)  and 
feed it into an ultra-low-noise crystal-oscillator 100MHz PLL. Set the  PLL 
loop-bandwidth very low, less than 1Hz to filter out all reference  noise.
2) take the 100MHz crystal output, and feed it into Q1 to multiply it to  
3) add a fast buffer before U1 to generate faster edge-rates into the  ECL 
The result of this works very well. The advantages are: the 50MHz tanks  
don't need to be adjusted as well as they needed to be adjusted before, since  the 
PLL filters out the 50MHz jitter. The 200MHz tank adjustment is not as  
critical as before since most of it is bypassed - only a single 200MHz trim-cap  
remains to be tweaked.
I used a Crystek PN CVHD-950X-100.000 ultra-low-phase-noise crystal  
oscillator (VCXO) for this, simply because it was available at Mouser.com  and because 
I could not get a 200MHz version.
It's 100MHz output is fed into a 74LVC74 divider to generate 50MHz, which  in 
turn feeds a 74LVC86 Exor  used as a phase-comparator. The other side of  the 
phase comparator is fed by the 50MHz from TP2 (a buffered CMOS version of  
it). This locks the very low jitter 100MHz Crystal output to the 10MHz 10811  
OCXO reference.
The result is quite good, no more need for tweaking all the  trim-caps!
The crystal certainly generates a more stable 100MHz signal than the  
multiplier does, and it is much easier to get 200MHz from the 100MHz CMOS output  
than from the 50MHz sine wave in the original circuit.
Of course an ECL/PECL/LVDS  200MHz VCXO would have done an even better  job, 
feeding it's output directly into U1 without any transistor tanks  etc.
In the end, this is all that the unit cares about: a very stable  low-jitter 
200MHz ECL reference.
BTW: this 200MHz doesen't even need to be phase locked with the 10MHz  
reference, I tried using a Jackson-Labs FireFox signal generator set to 200MHz  and 
running totally asynchronously and the resulting performance of the unit was  
just as good.
a disclaimer: please note that I am not suggesting to anyone to modify  their 
5370B, this is done at your own risk.
The attached image is the Fury GPSDO running against my FTS-4050 Cesium for  
some hours. The vertical scale is 14.5ns pk to pk. You can see the very low  
inherent jitter of <30ps.

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