[time-nuts] GPSDO Question

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Sep 1 23:19:25 EDT 2007

JOS Earthlink wrote:
> 73 de  K1JOS (Jerry)
> CCA #11906
> CRA #1777
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> Sent: Saturday, September 01, 2007 12:00 PM
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> Subject: time-nuts Digest, Vol 38, Issue 1
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> Hi Group,
> I just recently completed a GPSDO inside a HP5328A.  I was going to use the
> Schera board but opted for the VE2ZAZ.  At first I tried to cannibalize the
> HP5328A's internal power supply for either the +/-15VDC or +5/-5.2VDC supply
> but I discovered the hard way that they would not supply enough current
> (burnt out CR1 and Q7) or the supplies would not be well regulated.  I opted
> therefore to include inside the case a +/-12VDC swtiching supply powered
> externally by a 24VDC wall wart.  From the +/-12VDC dual supply I cleaned up
> the rails with an L7805 and L7905.  I was able to bring out to the the rear
> panel the 10Mhz and 5Mhz references plus the SMA GPS antenna connector.  On
> the side panel I put in a momentary pushbutton switch to reset the GPS if
> needed plus a DB9 RS232 for serial communicatiosn with either the GPS using
> software like VisualGPS) or to monitor the VE2ZAZ board status.  A simple
> DPDT switch next to the DB9 connector controls the serial selection.  I have
> complete pictures if anyone is interested and it works very nicely.
> Jerry
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It is amusing/distressing to see that the myth that using an FLL to lock
an oscillator to the PPS output of a GPS receiver is a good approach
still persists.
The optimum solution is a phase lock loop.
Whilst building an FLL is instructive/educational, if you want the best
GPSDO performance you should really use a PLL.


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