[time-nuts] GPSDO Question

[WB6BNQ]

Tom Van Baak wrote:

> > Jerry
> >
> > It is amusing/distressing to see that the myth that using an FLL to lock
> > an oscillator to the PPS output of a GPS receiver is a good approach
> > still persists.
> > The optimum solution is a phase lock loop.
> > Whilst building an FLL is instructive/educational, if you want the best
> > GPSDO performance you should really use a PLL.
> >
> > Bruce
>
> It would seem for timekeeping applications, a PLL-based
> GPSDO will inherit the long-term accuracy of GPS with
> great fidelity.
>
> But for many frequency (e.g., transmitters) or time interval
> applications (e.g., frequency counters with finite gate times),
> I'd like to understand, in detail, what the difference between
> a PLL- and FLL-based GPSDO really is.
>
> Can someone point me to real data or even simulations
> with plots that show rms or adev differences between the
> two camps?
>
> Thanks,
> /tvb
>

Hi Tom,

I have seen and am familiar with only one FLL loop.  It compared a counter’s
registers to a static register loaded with the wanted value.  This loop was read
to just -1x10^6.  With this scheme the granularity is obviously the +/- LSB
count, not counting the time base error.

Bill....WB6BNQ