[time-nuts] GPSDO Question - Clarification Please
tlinbeck at sbcglobal.net
Sun Sep 2 19:06:56 EDT 2007
I am confused by the PLL vs. FFL lock discussion. Does this concern the
Schera board vs. the VE2ZAZ methods of time base discipline? Can someone
share their thoughts on the subject?
73 de K4TEU (Tom(
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
Behalf Of Bruce Griffiths
Sent: Saturday, September 01, 2007 10:19 PM
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] GPSDO Question
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JOS Earthlink wrote:
> 73 de K1JOS (Jerry)
> CCA #11906
> CRA #1777
> -----Original Message-----
> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com]On
> Behalf Of time-nuts-request at febo.com
> Sent: Saturday, September 01, 2007 12:00 PM
> To: time-nuts at febo.com
> Subject: time-nuts Digest, Vol 38, Issue 1
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> Hi Group,
> I just recently completed a GPSDO inside a HP5328A. I was going to use
> Schera board but opted for the VE2ZAZ. At first I tried to cannibalize
> HP5328A's internal power supply for either the +/-15VDC or +5/-5.2VDC
> but I discovered the hard way that they would not supply enough current
> (burnt out CR1 and Q7) or the supplies would not be well regulated. I
> therefore to include inside the case a +/-12VDC swtiching supply powered
> externally by a 24VDC wall wart. From the +/-12VDC dual supply I cleaned
> the rails with an L7805 and L7905. I was able to bring out to the the
> panel the 10Mhz and 5Mhz references plus the SMA GPS antenna connector.
> the side panel I put in a momentary pushbutton switch to reset the GPS if
> needed plus a DB9 RS232 for serial communicatiosn with either the GPS
> software like VisualGPS) or to monitor the VE2ZAZ board status. A simple
> DPDT switch next to the DB9 connector controls the serial selection. I
> complete pictures if anyone is interested and it works very nicely.
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It is amusing/distressing to see that the myth that using an FLL to lock
an oscillator to the PPS output of a GPS receiver is a good approach
The optimum solution is a phase lock loop.
Whilst building an FLL is instructive/educational, if you want the best
GPSDO performance you should really use a PLL.
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