[time-nuts] GPSDO Question

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sun Sep 2 19:29:23 EDT 2007

Tom Van Baak wrote:
>> Jerry
>> It is amusing/distressing to see that the myth that using an FLL to lock
>> an oscillator to the PPS output of a GPS receiver is a good approach
>> still persists.
>> The optimum solution is a phase lock loop.
>> Whilst building an FLL is instructive/educational, if you want the best
>> GPSDO performance you should really use a PLL.
>> Bruce
> It would seem for timekeeping applications, a PLL-based
> GPSDO will inherit the long-term accuracy of GPS with
> great fidelity.
> But for many frequency (e.g., transmitters) or time interval
> applications (e.g., frequency counters with finite gate times),
> I'd like to understand, in detail, what the difference between
> a PLL- and FLL-based GPSDO really is.
> Can someone point me to real data or even simulations
> with plots that show rms or adev differences between the
> two camps?
> Thanks,
> /tvb

When the integrator in the loop has finite gain this leads to a phase
error in a PLL and a frequency error in an FLL.

The performance data for most of the FLL and PLL GPSDOs is lacking.
In most cases a plot of frequency accuracy is given without specifying
exactly how it was obtained.
A plot of the Allan deviation vs tau would surely be more informative.
The other problem is that in most cases the potential performance is
limited by the resolution of the EFC DAC.

The frequency accuracy data published for all of the FLL disciplined
GPSDOs that I've seen seems to indicate that perhaps the short term
stability of their otherwise good OCXOs is severely degraded.

A frequency lock loop is appropriate for a passive frequency standard
(atomic or resonator) whereas a phase lock loop is suited to active
frequency standards.


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