[time-nuts] 5 MHZ PIC PPS Divider?

Stanley Reynolds stanley_reynolds at yahoo.com
Tue Apr 15 22:36:20 EDT 2008


That application note will give you an introduction to metastability.

A pair of multi GHz D flipflops should ensure that the probability of
metastability is less than once in a hundred years or longer.

Just make sure you wait long enough for both the ECL and the extension
counters to settle.

A better method is to read a very long counter on the fly (64 bits or
more) at the (synchronised) PPS edge. However with ripple counters this
gets tricky as one has to sample each bit at suitable times to ensure
that the sampled count is actually valid.

Software extension of the count chain (after the PIC counter) is also

I'd just interpolate a 10MHz clock: you can do this all with a PIC and
ADC and some inexpensive analog hardware.


Thank you the pointers, I have found these explanations of interpolate :
As I understand it the trick is to measure the fractional parts of the wave at both the start and end or just the end if the start is synchronized, for a improvement in resolution at lower clock speeds.

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