[time-nuts] Fast frequency counting question
magnus at rubidium.dyndns.org
Sun May 4 20:14:09 EDT 2008
From: "John Miles" <jmiles at pop.net>
Subject: Re: [time-nuts] Fast frequency counting question
Date: Sun, 4 May 2008 16:55:29 -0700
Message-ID: <PKEGJHPHLLBACEOICCBJKEGJHGAB.jmiles at pop.net>
> > The quickest and easiest way to achieve the required resolution is to
> > buy a high speed (~100MHz) sampling ADC evaluation kit from Analog
> > Devices, Linear Technology etc, use a low phase noise crystal oscillator
> > (eg Wenzel ULN or equivalent performance device) or equivalent bandpass
> > filter the output and use as the sampling clock source. Then either:
> > 1) Sample the 40MHz signal directly (possibly after some bandpass
> > filtering) then post process the raw data.
> > 2) Use a mixer to produce a ~1MHz output bandpass filter it and sample
> > this signal (amplifying if necessary) with the ADC then post process
> > the raw data. This will achieve lower noise. However the mixer LO has to
> > have very low phase noise.
> > High speed ADC evaluation kits are readily available (at least from
> > Linear) and considerably cheaper than a timer counter with equivalent
> > resolution and noise f such an instrument is available at all.
> > The LTC evaluation kits include a board with local sample storage and a
> > USB interface to a PC.
> The last time I looked at those eval boards, though, they were pretty
> adamant about not releasing API specs, so you couldn't use them as platforms
> for your own DAQ applications. Irritating, but I can see why, because
> they're probably just breaking even on the boards.
> Would be nice if that's no longer the case. Failing that, one of the GNU
> Radio USRP boards might be the most economical way to go.
> Also: the effect to be studied must be coming from some type of circuit
> built with some standard semiconductor process, which in turn is driven by
> some sort of clock. If you go nuts with sampling precision, aren't you just
> going to get more information than the underlying process is capable of
> generating? (I'm probably not phrasing that very well, but you get the
> idea, hopefully.)
Oh... what can happend the first 40000 cycles in an oscillators power on time?
Caps gets biasing, silicon heating up and biases moves, transient behaviours
time out and it also takes a few cycles to start cleaning out noise. The AGC
takes time to bias...
Not to speak about the actual transient of power-on...
Then, the initial drift of the crystal itself?
The first few cycles will not be pretty. That's for sure. Interesting that they
need to measure it.
The heat-up time should be specified in the datasheets. There are different
levels to heat up in this aspect... digital circuits usually needs a low jitter
enought clock for the initial operation. Only for full operation the stability
come into play. Just don't release the reset before you approach something of
a usefull clock.
It is to be expected. If you depend on the first cycles to be clean, I guess
you have set yourself up for trouble.
I always assume the oscillator will be dirty. I have never dreamt of assuming
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