[time-nuts] Driving clocks from 1pps

Neville Michie namichie at gmail.com
Thu Sep 4 19:32:47 EDT 2008


Hi,
The motors in quartz clocks and watches (mainly) are driven by  
alternating pulses about 20ms long at about 1.4 volts.
As has been mentioned this can be done with CMOS, connecting the coil  
to two outputs and pulsing the outputs alternately.
However some of the movements are sensitive to being over-driven and  
will not step properly if the voltage is too high
even if the pulse is shorter. This is because of the delicate setup  
made to be assymmetrical so it always moves forward.
The rotor has to move forward a little to absorb the energy to  
complete the step.
These movements stick to the pole for the stronger shorter pulse or  
may even step backwards.
One very good alternative that drives all movements that I have tried  
is to make a 0.5 Hertz squarewave of say 5 volts,
and connect it to the coil via a capacitor and a series resistor.  
There always seems to be a best capacitor value and best resistor value
to make any movement step most reliably. The capacitor controls the  
current delivered and the resistor the time it is delivered over.
The capacitors are in the order of 50 mfd the resistors 200 ohms but  
may vary back or forward by an order of magnitude.
cheers,
Neville Michie


On 05/09/2008, at 7:30 AM, Murray Greenman wrote:

> In the light of the latest posts on driving clocks from 1pps, it  
> sounds
> as though I'd better rethink what I was planning!
>
> I am in the middle of the design of a micro which uses a 10MHz crystal
> to provide a digital clock, but the time is kept in line via GPS  
> using a
> 1pps NCO, which is steered digitally, rather than altering the 10MHz
> oscillator in GPSDO fashion.
>
> The plan was to provide two outputs (biphase) at 1pps to drive slave
> clocks, but in the light of the notes from Brooke and Chuck, I  
> would be
> better off just providing a single output, and use a series cacacitor.
>
> Chuck, I would expect that the 1pps would need to be about 50% duty
> cycle, or at least have a pulse width of 100ms or so. I can imagine a
> clock driven from 1pps with a low duty cycle would sound quite
> different.
>
> 73,
> Murray ZL1BPU
>
>
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