[time-nuts] time-nuts Frequency Divider

Bruce Griffiths bruce.griffiths at xtra.co.nz
Thu Apr 2 23:28:31 UTC 2009


The problem is more accurately described as:
When the bias network dc level at the 74AC04 (or 74HC04) inverter input
isn't equal to the switching threshold of the particular device then AM
modulation on the input signal is converted to phase noise as switching
no longer occurs at the zero crossing of the input signal.
Such behaviour is inherent when using a Schmitt trigger circuit and it
cannot be cured with a feedback circuit that stabilises the output duty

A well designed limiter + filter cascade in front of the comparator,
Schmitt trigger or logic gate can be used to minimise such AM to PM
conversion whilst minimising the output jitter.


Mike Monett wrote:
>   > Message: 3
>   > Date: Fri, 03 Apr 2009 09:04:59 +1300
>   > From: Bruce Griffiths <bruce.griffiths at xtra.co.nz>
>   > Subject: Re: [time-nuts] Frequency Divider
>   > Hal Murray wrote:
>   >>> A large  resistor connected between the input  and  output would
>   >>> accommodate threshold variations better. Even better would  be a
>   >>> feedback loop that adjusts the input bias point to  maintain the
>   >>> output duty cycle at 50%.
>   >> Isn't that resistor a feedback loop?
>   >> I played  with  that setup in the lab many years  ago.  It didn't
>   >> work as  well  as  I was expecting. I didn't  figure  out  why it
>   >> didn't work better.
>   >> Maybe some gain in the feedback path would help. Then we  have to
>   >> consider stability. Ugh.
>   > Hal
>   > Yes, a  resistor  connected  between the input  and  output  of an
>   > inverter is a feedback loop but the loop gain is relatively low.
>   > With a high amplitude input threshold variations from  the nominal
>   > can cause the input protection diodes to conduct.
>   > Once these  diodes  conduct   the  output  jitter  may deteriorate
>   > significantly (it does for HCMOS inverters).
>   > Using a  non  inverting   integrator   in  the  feedback  path can
>   > accurately stabilise the duty cycle.
>   > Bruce
>   The 74HC  and 74AC input threshold tolerance is +/- 30%.  This means
>   the threshold can vary from 1.5V to 3.5V with a Vcc of 5V.
>   This limits  the  maximum input signal to 3V  p-p  or  +13.5dBm, and
>   leads to  a very subtle flaw discovered in some  amazing engineering
>   work by Martein Bakker, PA3AKE.
>   If the threshold is not controlled, it can cause AM noise to convert
>   to PM  noise  and  degrade the jitter.  This  occurs  in  the Analog
>   Devices AD9910 1GHz DDS chip.
>   Martein Bakker  discovered  this in his  noise  analysis,  and Kevin
>   Wheatly gave a nice entry in his blog on how to fix it:
>   http://www.m0khz.com/?p=589
>   Mike
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