[time-nuts] Updated Divider Jitter Results - 74HC390

Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Apr 4 23:30:28 UTC 2009


John

I can't find a spec for the Wavecrest 2075 input amplifier/trigger
circuit noise but it could be as high as 1mV rms given its 800MHz+ input
bandwidth.

If the noise is 1mV rms:
Then an input signal slew rate of 1V/ns is required to keep the jitter
contribution of the amplifier input noise below 1ps rms.
A 3 stage limiter cascade with an overall slope gain of about 12x can be
used to increase the slew rate of a 10MHz 2V pp input signal to 1V/ns.
With an appropriate distribution of limiter stage gain and bandwidth,
the jitter contribution due to limiter noise and Wavecrest input noise
can be held below1.2ps rms.
The jitter contribution due to amplifier input noise with such an input
signal connected directly to the Wavecrest input would be about 16ps rms.

Bruce

John Ackermann N8UR wrote:
> I can do that, but was hoping to isolate the performance of the Wenzel 
> waveform conversion circuit.  An initial test showed jitter of about 25 
> ps -- which is about the same as for the whole divider chain, so you may 
> be correct that the input amplifiers are limiting.  But also, I was 
> doing a quick and dirty setup without paying much attention to how the 
> signal was coupled.  I'll be able to improve on that in tomorrow's 
> experiments.
>
> John
> ----
>
> Bruce Griffiths said the following on 04/04/2009 05:37 PM:
>   
>> John
>>
>> With a slow slew rate input signal like a 10MHz sinewave the Wavecrest
>> jitter due to the noise of its wideband input amplifiers may be quite high.
>>
>> So it may be better to measure the relative jitter of 2 dividers.
>>
>> Bruce
>>
>> John Ackermann N8UR wrote:
>>     
>>> Hi Brian --
>>>
>>> It's good to collect this data; thanks.  It's interesting that your std
>>> dev in the first test seems to increase significantly with the number of
>>> samples; I haven't seen that kind of scaling here (1K sample and 10k
>>> sample turned in very similar std dev).  From what Poul-Henning said
>>> earlier, your first run may suffer the same distortion as my data at the
>>> bottom of this thread.
>>>
>>> I just finished rerunning the TADD-2 test using a Wavecrest DTS-2075
>>> (the first real use I've had for that box!) and with 1 PPS input on the
>>> start channel, 10 MHz from the same source on the stop channel, and 10K
>>> samples, I got 22.0 ps of jitter, and a 92 ps min/max range.  (As far as
>>> I can determine, the Wavecrest doesn't allow you to use an external
>>> reference, and its internal reference runs at 100 MHz so it probably
>>> wouldn't be useful in this measurement.)
>>>
>>> That's consistent with what I measured earlier with the 5370B when I
>>> didn't have the reference and the inputs in coherence.  It appears that
>>> the test below, where I used the same reference for *everything*
>>> triggered the problem that Poul-Henning warned about, so those results
>>> should be disregarded.
>>>
>>> While I haven't done any testing to validate this, I think the complaint
>>> about the 74HC390 dividers isn't so much their jitter in normal use, but
>>> the tempco problems the cascaded stages can cause.  If you can do it, it
>>> would be interesting to measure the phase change over temperature --
>>> I've done a preliminary experiment on that for the TADD-2, but plan to
>>> rerun it with much better measurement technique.
>>>
>>> I'm also hoping to do a jitter and tempco test of the Wenzel input
>>> conditioning circuit by itself.  I really like that circuit for its wide
>>> input amplitude range.
>>>
>>> John
>>> ----
>>> Brian Kirby said the following on 04/04/2009 04:18 PM:
>>>   
>>>       
>>>> I will report some results on a asynchronous divider, which I basically 
>>>> copied from Dr. Thomas Clark's designs, which everybody likes to report 
>>>> as a bad design.
>>>>
>>>> The 10 MHz input signal is coupled thru a resistor and capacitor.  On 
>>>> the other side of the capacitor is the resistive divider that is tied to 
>>>> Vcc and ground - it biases the signal to 2.5 volts, which is feed to the 
>>>> input of the 74HC132.   The output of the 74HC132 feeds several 74HC390s 
>>>> until it becomes a buffered 1 pulse per second signal.  I also have 
>>>> buffered 5 MHz and 1 MHz outputs.  The other 3/4 of the 74HC132 are used 
>>>> to externally synchronize the 74HC390s.
>>>>
>>>> I used the Thunderbolt as the source of 10 MHz and it was feed to the 
>>>> divider, and the stop input on the HP5370B.  The 5370B was run on 
>>>> internal clock.  The 1 PPS from the divider feed the start input on the 
>>>> 5370B.
>>>>
>>>> 100 seconds   TI 79.865 nS   MIN 79.80 nS   MAX 79.98 nS   STD 36.4 pS.
>>>> 1000 seconds   TI 79.831 nS   MIN 79.71 nS   MAX 80.00 nS   STD 49.9 pS
>>>> 10K seconds   TI   80.1552 nS   MIN 79.79 nS MAX 80.88 nS   STD 271 pS
>>>> 100K planned
>>>>
>>>> Also a second test, using the Thunderbolt as a source of 10 MHz and it 
>>>> was  feed to the divider, the stop input on the 5370B and the external 
>>>> clock of the 5370B.  The 1 PPS from the divider feed the start input on 
>>>> the 5370B.
>>>>
>>>> 100 seconds   TI   75.002 nS   MIN 74.96 nS   MAX 75.04 nS   STD 22.5 pS
>>>> 1000 seconds   TI    74.931 nS   MIN 74.80 nS  MAX 75.04 nS   STD 56.8 pS
>>>> 10K seconds   TI   77.5135 nS  MIN 77.40 nS  MAX 77.62 nS  STD 35.9 pS
>>>> 100K measurement in progress.
>>>>
>>>> I believe having STD in parts of 10-14th is fairly respectable for 
>>>> amateur designs..
>>>>
>>>> Brian KD4FM
>>>>
>>>> John Ackermann N8UR wrote:
>>>>     
>>>>         
>>>>> I just finished a jitter test of the first TADD-2 built on the 
>>>>> production circuit board.
>>>>>
>>>>> The configuration was somewhat optimized from what I used for the 
>>>>> earlier tests.
>>>>>
>>>>> A single 10 MHz source was daisy-chained to the TADD-2 input, to the 
>>>>> 5370B external reference input, and to the 5370B STOP channel.  The 1 
>>>>> PPS output from the TADD-2 was connected to the 5370B START channel. 
>>>>> Thus any reference jitter shouldn't be common-mode, and using the 
>>>>> reference clock on the STOP channel avoids the need for a second 
>>>>> divider, and ensures that the time interval is small (always less than 
>>>>> 100 ns; in this case, about 90 ns).
>>>>>
>>>>> For a 10,000 sample run, the standard deviation was 12.1 picoseconds, 
>>>>> and the peak-to-peak variation was 70 picoseconds.  Based on experiments 
>>>>> I ran a few years ago, I think this is pretty much the noise floor of 
>>>>> the 5370B and the divider could be better than this.
>>>>>
>>>>> John
>>>>>
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>>>>>   
>>>>>       
>>>>>           
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