[time-nuts] FreeBSD, NetBSD, or Minix-III?

Hal Murray hmurray at megapathdsl.net
Sun May 17 19:48:39 UTC 2009


> Yes, but then, if it did happen, then you need to read low again. If you do
> the 4 reads as a block (say, with interrupts disabled), then you get a nice
> deterministic timing for the code.  In practice, it's just a design decision
> which way one does it.

Let's see if I understand your idea...

If the two highs are the same, you know a carry didn't happen between reading 
the highs so the answer is high, first-low.  That gives you an answer that 
corresponds to some time when you read the first low.

If the two highs differ, you know a carry did happen but you don't know if 
the first low was before or after the carry.  You know the second low was 
after the carry.  So use the second high, second low.  That gives you a time 
between the carry and reading the second low.

I think that works without disabling interrupts.

If we are doing this with a FPGA and have interrupts disabled or a kernel 
lock or only one user or .., it would be easy to latch the other half on the 
first read so you always got a coordinated pair with just two reads.


> No, if the high parts differs, then the MSB of the lower part
> indicates which of the higher parts to go with it, MSB low is the
> late high read and MSB high is the early high read. Infact, by always
> look at the MSB then it will always be correct. With a second lower
> read will the low read point in time be modulated and hence jitter is
> added. 

My head hurts, but I think I have convinced myself that will work.  Thanks.

If there is no carry, you get the time of reading the low half.

If there is a carry...  If the MSB of the low half is high, you get a time 
that is someplace between reading the first high half and reading the low.  
If the MSB of the low half is low, you get a time that is someplace between 
the carry and reading the second high.


-- 
These are my opinions, not necessarily my employer's.  I hate spam.






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