[time-nuts] Advantages & Disadvantages of the TPLL Method

WarrenS warrensjmail-one at yahoo.com
Mon Jun 14 22:04:53 UTC 2010

Bruce posted
>"If and only if injection locking isn't significant."

No problem then, because it is not significant.
Can place this one under the 'ADVANTAGE' side.

I have tested this thoroughly in many ways.
I do understand the concerns and doubts, especially with an unbuffered HP 
10811 as the reference.
The 10811s are pretty sensitive to injection locking and "phase pulling".
Unlike most other methods, one of the many unique properties that the TPLL 
method has is that injection locking is normally not a problem with it.
I find it is generally unnecessary to buffer either the Ref Osc or the DUT.
This is one of the many features that helps make the simple TPLL so simple.
(also it does not hurt or change anything to add a proper buffer)
The lack of injection locking is one of the advantages that contributes to 
its exceptional and unbelievable performance.

I did not leave the buffers out of the simple TPLL BB that was tested 
because of my lack of knowledge, but because of my "extra" knowledge on the 
subject that showed that they were unnecessary.
More than once, I have tried to explain the reason why injection locking is 
not a problem with my version of the TPLL method, but until one proves it 
for their self, more words from me will not help.
I do understand the skepticism and doubt, and I know why it is so hard to 
believe this for those that have not worked with is this type of method 
I guess someone should write one of those fancy math papers, if it has not 
already been done, that explains it in more convincing terms than I've been 
able to.
It is hard for me to believe that paper has not already been written, But 
then it is hard for me to believe that the TPLL is not used more often. 
There are plenty of places that one of the TPLL methods well give the best 
overall solution.



[time-nuts] Advantages & Disadvantages of the TPLL Method
Bruce Griffiths bruce.griffiths at xtra.co.nz

WarrenS wrote:
> Long explanations, cause I try to explain, the best I can, when I say
> something is "WRONG or misleading"
> Magnus Posted:
>> EFC linearity will remain an issue for analog oscillators.
>> The oscillator gain will differ depending on offset voltage and
>> temperature.
> TRUE it is an issue, but somewhat misleading because it need NOT be a
> problem or limitation (mostly)
> EFC Linearity can be an issue because the TPLL is limited by the
> "performance" of the reference oscillator in lots of ways.
> Oscillator EFC gain or linearity are not likely to be of much concern
> or a limitation for high end performance.
> The gain nonlinearity I've measured can vary two to one over the full
> range of a good Oscillator but it is more like 10% over the normally
> used range, if one stays well away from the end points.
> NOT so good but livable if you are not making something real accurate.
> For all my accurate stuff, when using a HP 10811, I limit the
> full-scale change to 1e-9 or 1e-8 at most.
> This uses such a small part of the total EFC range, that the
> nonlinearity effects are generally below the noise level and of little
> concern at all.
> The fact that Oscillator gain does differ with the EFC voltage (offset
> voltage), means if you want to get max accuracy out of the TPLL, it
> will need to be calibrated at the EFC offset voltage it is being used
> at.  One simple solution, if the OSC also has a independent manual
> Freq adjustment like the single oven 10811, is to use it always set
> the EFC voltage to be near zero volts.
> BTW calibration need not be much of a problem, because it can be a
> static calibration.
If and only if injection locking isn't significant.
This needs to be established for each setup.
The simplest way to take the effects of injection locking into account
is to measure the effective EFC "gain" with the loop closed.

> What I use for a finial calibration & check is the 2G turn over, which
> I measure very accurately by other means before hand and then use that
> as a known freq offset to check operation and calibration. Of course
> there are any number of other ways.
> As far as temperature having ANY effect on EFC gain, that is a total
> NON issue.
> If temperature had any effect on EFC Gain then Temperature would also
> effect Osc Frequency at a fixed EFC voltage,
> which would then effect the OSC freq drift and stability,
> that would then effect anything that the Osc was used for, NOT just
> the TPLL.
> The TPLL actually has a slight advantage over other methods,
> because the PLL will adjust the freq to be correct, even if the EFC
> effect should change.
>>> I think it is reasonable to assume that a TPLL weighs in at about
>>> 200 USD with all support mixers, amplifiers, ADCs etc.  if you don't
>>> have the parts
>> It is still a fairly cheap solution.
> Yes I think that is ONE reasonable number to use and a fair conclusion.
> BUT there are others.
> The EBAY cost of the TPLL can be easy under $10, not including the
> reference Osc and the ADC.
> Do note, NONE of items above are plural, Only one is needed per system
> unlike some other methods.
> Because the cost of the Ref Osc is so variable and depends so much on
> what one is doing, I have noticed that its cost is generally not
> included in the base price. I think even on the $20K+  TSC 5120A that
> the reference Osc is an extra cost option.
> The ADC is another BIG variable, depending on your needs and skill
> level and junk box, almost no limit in cost at the high end,
> and can be as low as $0.00 dollars if you are a student doing a
> science project.
> It can also be as low as $1.00 if one is good at programming PICS or
> other micros with built in ADC's.
> The only other major part in the TPLL with any cost over $1 is the
> Phase detector.
> The one I use most is a micro-circuits $15 single price device, but
> I've used all sorts of dual balanced mixers,
> and if one is real cheap and good at design, I have found that a PD
> based on a 50 cent XOR gate works fine.
> ws
> ***************************** 

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