[time-nuts] yet another GPSDO design, or so

Bruce Griffiths bruce.griffiths at xtra.co.nz
Tue Jun 29 20:28:38 UTC 2010


Hal Murray wrote:
> bruce.griffiths at xtra.co.nz said:
>    
>> Its possible to build a 24 bit resolution D/A using a synchronously
>> filtered PWM circuit. A pair of PWM outputs and a few relatively low
>> precision resistors and  capacitors together with a low noise low drift
>> reference are required. The technique takes advantage of the fact that the
>> required EFC voltage  changes slowly and isnt updated at a highg rate. The
>> synchronous filter technique eliminates the very long time constant  RC
>> filters required with an asynchronously filtered PWM waveform.
>>      
> 24 bits is 16,777,216.  At a reasonable clock rate, that's one second.
>    
Not if one uses a pair of 16bit PWM circuits to produce a DAC with 24 
bit resolution.
a few 0.1% resistors then suffice to achieve 24 bit linearity.
> Another approach is to distribute the individual bits rather than clump them
> together.  If you want 1/2, send 10101010 rather than 11110000.  You would
> have to do something like build a bit pattern in memory and use a serial port
> to send it out.
>    

With a synchronous filter the settling time (for small output changes) 
is equal to the PWM period.
The synchronous filter uses a variation of a dual slope error 
integrator, the output of which when sampled is equal to the desired output.
The effect of dielectric absorption in the error integrator can be 
reduced by implementing a mutislope integrator rather than a dual slope 
version.
Its then possible to use a pair of 8 bit PWM signals to achieve 24 bit 
resolution.

> That shifts the frequency of the junk so that it's easier to filter out
> and/or reduces the amplitude.  If you send 10101010, you have lots of energy
> but it's at 8 MHz.  If you send 1000000, you have energy at 1 Hz, but it's
> only 1/16000000 as big.  Or something like that.  [Since this is a linear
> system, you will get that spur with any odd number of 1s.]
>
> I can't determine if that's good enough.  I think the math is similar to the
> spurs you get from a DDS.
>
>
>    
Simulated that, and Ulrich did some testing, the spurs can be problematic.

The synchronous PWM circuit is much easier to filter as the synchronous 
output noise amplitude (with a constant input) due to sampling charge 
injection need not be more than a few microvolts. That is there is a 
small spur with an amplitude of a few microvolts at the PWM repetition rate.

>
>    


Bruce




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