[time-nuts] Frequency divider PCB: Current status on"pre-orders", and pointers to documentation.

Thu Mar 18 23:17:14 UTC 2010

Hi

Thus my earlier set of posts about this point, and which CPLD's were the better ones to use for this sort of thing. 

Bob

On Mar 18, 2010, at 6:14 PM, Bruce Griffiths wrote:

> You need to select the CPLD with some care.
> Typically a low power CMOS CPLD uses an internal state machine to transfer the configuration data sored in internal EEPROM (or similar) to internal CMOS RAM cells that control the CPLD internal interconnections/routing.
> 
> This intialisation process occurs during power up.
> After this initialisation the EEPROM storage is powered off to reduce the static power consumption.
> Some CPLDs turn the internal initialisation state machine oscillator off when this process is complete, some do not.
> 
> Thus the internal intialisation state machine oscillator is a potential source of unwanted asynchronous phase modulation of the divider outputs.
> 
> Bruce
> 
> Bob Camp wrote:
>> Hi
>> 
>> I think I'd just take the design over to a reasonable CPLD and be done it,
>> if you are trying to improve it's floor. Having everything on a single
>> "lump" of high speed silicon takes care of a lot of issues.
>> 
>> Bob
>> 
>> -----Original Message-----
>> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
>> Behalf Of David C. Partridge
>> Sent: Thursday, March 18, 2010 8:41 AM
>> To: 'Discussion of precise time and frequency measurement'
>> Subject: Re: [time-nuts] Frequency divider PCB: Current status
>> on"pre-orders", and pointers to documentation.
>> 
>> I've just had in interesting offline chat with Warren S.
>> 
>> Basic outline is that this divider is plenty good enough to use with e.g. a
>> TBolt (which was my design target), and probably also for the less than
>> totally committed time nuts.
>> 
>> To quote him:
>> 
>> "What I'm saying is does not meet the Nut cases description of a low noise
>> buffer / divider."
>> For good performance, do make absolutely certain that the power supply for
>> this board isn't fed from the same PSU as your Rb or GPSDO, or if it is,
>> make sure you take the regulated 12V from that supply and feed this board
>> through another stage of cleanup using a 5V linear regulator and decoupling
>> caps right close to the power input connector.   Linear supply rather than
>> switched (I admit that mine is switched, then post regulated).  Star
>> grounding of course.
>> 
>> But for the ultimate time nuttery level of low jitter (low pS level), the
>> following changes would NEED to be made.
>> 
>> 1) Transformer coupled input clock shaper with multi-stage filtering to
>> restrict input fed to comparator to only the intended single input frequency
>> (10MHz).
>> 
>> 2) Change the power supply to the board to be (say) 12V or 9V.  Then use
>> several 5V on board regulators to feed:
>> 
>>  a) the clock shaper
>>  b) the main '163 divider
>>  c) the 4017 divider chain
>>  d) each 74AC541 output driver and related FFs.
>> 
>> Did I get that right Warren?
>> 
>> This ensures that if e.g. the switched output is set for 1Hz, that the 5V
>> supply for the other parts of the board doesn't twitch in sympathy when the
>> '541 switches.
>> 
>> 3) Maybe use BIG earth bond terminal and feed +ve supply in on single
>> header.
>> 
>> Warren, please jump in to add further points
>> 
>> Warren is of the view that using COGs and thin film resistors isn't
>> necessary except possibly to use thin film parts for R4&  R5
>> 
>> Regards,
>> David Partridge
>> Email:david.partridge at perdrix.co.uk
>> 
>> -----Original Message-----
>> From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On
>> Behalf Of David C. Partridge
>> Sent: 17 March 2010 18:28
>> To: TekScopes at yahoogroups.com; TekScopes2 at yahoogroups.com;
>> hp_agilent_equipment at yahoogroups.com; TestEquipTrader at yahoogroups.com;
>> 'Discussion of precise time and frequency measurement'
>> Subject: [time-nuts] Frequency divider PCB: Current status on
>> "pre-orders",and pointers to documentation.
>> 
>> The current situation is that I have almost enough statements of intent to
>> get to the magic 50 which will allow a price of GBP14.50 per board plus
>> delivery.   For the avoidance of doubt, this is the price for a bare PCB,
>> not for a kit, and definitely not for a made up board.
>> 
>> I intend to "keep the book open" until 18:00 Zulu (UTC or GMT) on Sunday
>> 21st March, I will then count up what I have and order that many boards (and
>> maybe a few over to get a nice round number).
>> 
>> I've received numerous reqeusts for the design documentation, schematic, and
>> a bill of materials
>> 
>> They can all be downloaded from my website, but there's no way (yet) to
>> navigate to them (a round tuit problem).
>> 
>> Write up:
>> 
>> <http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202.pdf>
>> 
>> Schematic:
>> 
>> <http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Schemat
>> ic.pdf>
>> 
>> and BOM:
>> 
>> <http://www.perdrix.co.uk/FrequencyDivider/Frequency%20Divider%202%20Bill%20
>> of%20Materials.pdf>
>> 
>> The schematic and write up have both been updated today, and the BOM is new
>> today.
>> 
>> For those who worry about SMT soldering, you don't need a reflow oven, it
>> can all be done with tweezers, a small tipped iron, fine solder wire, and
>> liquid flux (or a flux pen).  A good pair of strong reading glasses helps
>> too!   See:
>> 
>> <http://www.curiousinventor.com/guides/Surface_Mount_Soldering/101>
>> 
>> I've also had questions on part pricing:  Back in 2008, the cost to populate
>> one PCB using a MAX999, thick film resistors, and standard (X7R) chip
>> capacitors was about GBP28 including Molex headers and SMB sockets.   I
>> don't expect it to be massively different now.   I'm afraid I don't have
>> full parts kits, and the necessary up front costs to do so is more than my
>> finances allow at present.
>> 
>> FWIW, the ADCMP600 is a bit pricier than the MAX999, and is supposed to be
>> "better", though I'm not sure in what respects it is better.
>> 
>> If you want the lowest possible level of phase noise, you would follow the
>> bill of materials recommendations and use thin film resistors and C0G
>> capacitors in the clock shaper part of the circuit at the very least, but
>> this adds considerably to the cost (for example 100nF C0G 1206 capacitors
>> are about 1 pound each, while an X7R part is only a few pence).
>> 
>> Regards,
>> David Partridge
>> 
>> 
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> 
> 
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