[time-nuts] Schematic and BOM

David C. Partridge david.partridge at dsl.pipex.com
Fri Mar 19 23:11:37 UTC 2010


Tom, 

I designed the original version of the board in 2008.   I think the TADD2 came along a few months after I did the first
batch of boards.

If I remember correctly, John Ackermann expressed some interest at the time, but never followed up after I sent the
design docs to him.  Possibly because my board wasn't the right size to fit the TAPR enclosures, or because he had
already started down the PIC route.

I just visited the TAPR site and had a read of the manual and a good look at the schematic.  

Here are my comments for whatever they're worth:

I'm not sure why, but I can't quite see how you can do precision timing using a micro (or for that matter a PLD).   I
feel that there's just too much silicon there to be predictable at sub nano-second levels.   I will however admit that
this is just prejudice, as I've never tried it and my concerns may be totally unfounded.

The TADD2 may have better LF rejection in the input stage as it's using a transformer input, rather than a capacitively
coupled input.

The TADD2 doesn't provide 5MHz and 1MHz outputs (assuming 10MHz input).

The duty cycle of the TADD2 outputs isn't 50%.  I can't remember why I made the decision, but I set a design goal for my
divider that all outputs would have a 50% duty cycle (i.e. square wave rather than pulse).

The TADD2 suffers from noticeable crosstalk.  I believe that my design avoids that to a very large degree (at the
expense of having unused gates).

The TADD2 has quite few more outputs than my design.

My design does NOT allow the outputs to be synchronised to a PPS input, whereas the TADD2 does.   I don't think it would
be hard to add to my design, but I've never really thought about it.

I know that the outputs on my design are short-circuit proof.  I assume the TADD2 is too?

As far as I can determine, the outputs of the TADD2 are not re-clocked to the input clock, and therefore are probably
more likely to suffer from jitter.  OTOH I don't have the equipment to measure the jitter on my design, so can't state
how clean or otherwise it ACTUALLY is.

Regards,
David Partridge
Email:david.partridge at perdrix.co.uk

-----Original Message-----
From: time-nuts-bounces at febo.com [mailto:time-nuts-bounces at febo.com] On Behalf Of Tom Van Baak
Sent: 19 March 2010 21:33
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Schematic and BOM

David,

Did you see the TAPR TADD board(s) before you started your divider project? I'm curious what features (or missing
features) led you to your board design.

Thanks,
/tvb


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