[time-nuts] DDS'ery narrow scoped.

Luis Cupido cupido at mail.ua.pt
Tue Jun 21 00:19:40 UTC 2011


Many thanks to you all, for the info.
This is indeed a great forum.

My aplic. is a DDS signal that
will serve as reference for a pll with a relatively
narrow loop filter. As I said before.

Most replies presume the analog world with DAC
filters etc etc. But that I know ;-)
I'm digging out the possibilities in the digital side
not involving going back to analog and back to digital.
this is how this started :-)

Now that you all have been so kind in the great comments
you gave, please let me just be
very very very specific.

Imagine an FPGA and a square wave coming out.
Just that. Nothing more.

(That is what I had in mind when querying about the MSB usage in
the first place.)

My first approach was the ACC MSB
(and that is working already on the bench.)

So I'm researching a way to have that digital output cleaner (spurs) 
without leaving the digital(FPGA) world sticking to the block diagram
of one FPGA one digital output. Specially worried about close in spurs 
(the far away ones won't bother me much).

That is really scenario I'm trying to picture if there is any hope to
generate a cleaner digital output out of an FPGA (dds with whatever 
processing required to be done after and producing a square wave).

Thanks for your patience.

Luis Cupido.

P.S. At the moment I'm testing on the bench with a real FPGA cyclone III
with a 48bit dds at 100MHz fclock and at circa 6 and 18MHz output and it 
is not that bad. I got better than -60dBc in the desired ranges.
So not too unhappy for a start ;-) PLL cleans 99% of it...
but the close in spurs are annoying.

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