[time-nuts] Sidereal timekeeping

[Bob Camp]

Hi

The question can be easily worked out. A PIC  running a 32,768 Hz clock will pull X ua doing this or that. I don't know X as I sit here, but it's a number that comes off a data sheet. That much current off of two or three AA cells will let you run for Y days. My guess is that Y is a pretty big number. If it's not, put in C's or even D cells. At some point the number gets big.

The drive for the motor is pretty simple, or it was last time I did all this (1970's). Having the PIC drive the motor is not all that hard. The code likely fits in a pretty small part. Weather you use a PIC or something else is open to study. There probably are parts that pull less current running at low speed than the PIC. I can think of a half dozen parts I'd check out. I'd also look for something that's happy with less voltage than most of the PIC's.

It would take more time to lay out the pc board than to write the code once you had a target processor and motor in mind.   

Bob


On May 18, 2011, at 12:01 AM, Hal Murray wrote:

> 
> lists at rtty.us said:
>> In a full sized wall clock, most of the power is to the motor. On a wrist
>> watch - it depends on how well the watch is built. 
> 
> Thanks.
> 
> I think that means that it's not silly to generate a PPSS (Pulse per Sidereal 
> Second) signal by counting to 364/365 of 32678 rather than letting a 15 bit 
> counter wrap around.
> 
> If "most" means 90% and we use another factor of 10 to implement the 
> compare/reset, that only drops the battery lifetime by a factor of 2.
> 
> Divide the target count by 2 and toggle one more FF if you need better 
> symmetry on the output.
> 
> -----------
> 
> Hacking the crystal adds another dimension to the hardware/firmware/software 
> tower.
> 
> Is there a term for that?
> 
> ----------
> 
> The party line for something like this is that 1/2 the power goes into the 
> bottom bit.  (assuming we are talking about the logic and not the motor)
> 
> I wonder what the power ratio (battery lifetime ratio) is for custom CMOS vs 
> say, 4000 CMOS, or C, or HC, or low power CPLD or ???   The CPLD might be 
> interesting since you don't have to drive external pins/pads.  There is 
> probably some 4000/HC chip that includes a counter but would save power 
> because it doesn't bring the bottom bit or two out to a pin.
> 
> 
> 
> -- 
> These are my opinions, not necessarily my employer's.  I hate spam.
> 
> 
> 
> 
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