[time-nuts] PICTIC II ready-made?

David davidwhess at gmail.com
Fri Apr 27 14:22:48 UTC 2012


On Fri, 27 Apr 2012 15:52:33 +0200, Attila Kinali <attila at kinali.ch>
wrote:

>On Wed, 25 Apr 2012 19:17:43 -0300
>Daniel Mendes <dmendesf at gmail.com> wrote:
>
>> About replacing the 74ACT175... there´s a company called "Potato Semi" 
>> (well.. they make "chips", right?) whose sole business is to make damn 
>> fast 74 logic. Their chips can be bought at ebay in small quantities. 
>> Look at this 600MHz D flip flop:
>> 
>> http://www.potatosemi.com/potatosemiweb/datasheet/PO74G74A.pdf
>
>Hmm... looks interesting. Though, i probably would take
>standard ECL instead of those because of higher availability
>(you can get them from mouser, digikey & co).

I would like to see some real world test results.  They charge $3 per
74G chip plus shipping through their Ebay store so the total price is
not much lower than ECL from Mouser or Digikey.

>But good to know that at least someone is still trying to improve
>standard 74xx devices, for all those who do not want to use an CPLD/FPGA.

I have been going through various papers plus the Xilinx and Altera
forums reading about time delay counter design in connection with a
project I am working on involving equivalent time and high bandwidth
sampling.  One of the problems they have with the FPGA and CPLD
designs in significant input jitter even before the delay time chain
is considered.  For best results, all I/Os and other functions have to
be inactive during the measurement.  One of the papers discussed
disabling the LED heartbeat indicator to gain about 50ps of accuracy.



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