[time-nuts] Using a frequency synthesizer replacement for motherboard oscillator

Bob Camp lists at rtty.us
Sat Dec 1 02:58:29 UTC 2012


The problem just the clock it's also the operating system. If it's not designed with timing in mind (= it's an RTOS at some level) then you will have sloppy timing. Counters can help, but they are not the entire solution. If your email (or anti-virus or ...) program can pop up and monopolize the cpu for a chunk of a second (as in 10's or 100's of ms),  precision timing isn't going to work very well. There's only so much you can do after the fact. If the pps edge was supposed to go out 27 ms ago, and you only got control back now, you are out of luck. 


On Nov 30, 2012, at 9:19 PM, David I. Emery <die at dieconsulting.com> wrote:

> On Fri, Nov 30, 2012 at 04:24:38PM -0600, shalimr9 at gmail.com wrote:
>> I am not sure that a precision clock will help if the cpu is busy and skips clock cycles. I believe this is one of the problems with general purpose OSes like Windows.
>> I believe the better boards like the Soekis use hardware dividers to alleviate the cpu busy problem.
>> Didier
> 	For what it is worth, for many generations now all major CPUs
> have had kernel software readable nanosecond level time of day time
> stamping counters that are clocked from the incoming clock to the CPU
> chip and run continuously and steadily without skipped or added ticks
> whatever the CPU is doing.   And in addition to these time stamping
> counters, most all CPU chip sets also include "real time clock"
> interrupts which again are  driven off of continuously counting counters
> referenced to the clock input to the CPU and can be programmed to
> interrupt ever n ticks of the master clock - regardless of CPU activity.
> 	Obviously while servicing the real time clock interrupts is
> usually a very high priority, depending on how the OS works and what
> privileges real time priority apps have occasionally a real time
> interrupt can be serviced so slowly that another one happens before it
> is cleared.   Some OS real time clock handlers attempt to spot these
> cases and adjust their idea of time to compensate.
> 	Any OS based PLL driven by time stamping 1 PPS timing interrupts
> WILL see some jitter in its time stamps due to bus and internal CPU
> latencies and use of interrupt off intervals to protect against race
> conditions. This noise is unavoidable and does depend on CPU load and
> even  how fast the CPU clocks are set to run at any instant (modern CPUS
> dynamically adjust clock rate in various areas of their logic to
> conserve power and reduce heat).
> 	So for a very fine control a hardware based 1PPS event time
> stamper will provide greater accuracy and less jitter, especially if it
> is driven by a high accuracy external clock source locked to some time
> reference.
> 	But of course it IS  useful to clock the CPU with an accurate
> clock as that then means the internal CPU time stamp counter and real
> time tick interrupt is ticking at a known rate - starting from some
> epoch that can be eventually calibrated over time - and multiple 1 PPS
> ticks - within a few ns or so of 1 PPS GPS or other similar time.
> 	If the CPU clock is unstable and wanders around with time,
> temperature, power and fan activity it then becomes necessary - as the
> timing 1PPS PLLs built into many modern kernels do - to try to measure
> its frequency error and drift and estimate the error phase between it
> and true time. If the CPU clock  is locked to a reference, this is not
> as hard a thing to do as the only relative unknown is when exactly the
> zero epoch on the counter occurred.
> -- 
>  Dave Emery N1PRE/AE, die at dieconsulting.com  DIE Consulting, Weston, Mass 02493
> "An empty zombie mind with a forlorn barely readable weatherbeaten
> 'For Rent' sign still vainly flapping outside on the weed encrusted pole - in 
> celebration of what could have been, but wasn't and is not to be now either."
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