[time-nuts] Questions about TAC frontend, and some measurements

Magnus Danielson magnus at rubidium.dyndns.org
Fri Dec 21 22:31:23 UTC 2012

Hi Fabio,

On 12/21/2012 01:43 PM, FabioEb at quipo.it wrote:
> Hello, while waiting fot the final doom, or a new
> job (tough times here) here is another update of
> the work I'm doing, sorry for the looong mail,
> hope I'm not boring the readers.
> I have a question about a some measurements I
> made, and I'd like an opinion about a frontend
> schematic I designed.
> First the question about the problem:
> in this graph (bottom right) there is the time
> interval between the PPS from the PA6H GPS
> module and the 10MHz form the FE5680A,
> uncrambled and corrected for linear drift.
> The graph periodically makes big steps, and
> this happens in the morning hours, in the
> few captures I made so far the fact happens
> around 6am-8am in the morning:
> http://www.flickr.com/photos/14336723@N08/8294131424/
> another previous capture with span enough to
> include 2 mornings:
> http://www.flickr.com/photos/14336723@N08/8294131660/

Like Bob said, start logging the temperature.

Since you have about 86400 s period on this behaviour, I expect that 
heating up in the morning (sun or just habits of humans roughly aligned 
with sun patterns) be the reason, so this would be temperature 
dependent. Plotting supply voltage may be another reason.

> I will make more tests to check if the problem is in
> the gps receiver or in the FE5680 or in the way I'm taking
> measurements. This will take a while.
> Maybe there is a simple explanation that I cannot see
> since I'm a total newbie i this field.
> Where should I search first for the problem?

If you assume temperature sensitivity, you can apply temperature on 
either of these parts to see what triggers the reaction.

Make sure that one part settles before pushing the other, so you know 
what is the effect of what.

> How I'm taking the measurements:
> the measurements are taken with the racal 1992
> connected to the point OutD in the centre of the
> frontend I'm building:
> http://www.flickr.com/photos/14336723@N08/8293076065/
> The OutD will spit out a short negative pulse,
> the width of this pulse is the same (or very near)
> than the phase time interval between the rising
> edges of the pps and the 10MHz.
> The counter logs the pulse width using a 100MHz
> scope probe set to 10x, DC coupled.

Do you really get 1-2 cycle long difference measures that way?
You risk a high non-linearity at the small difference side otherwise, as 
it takes time to wake the transistors.

> The plots are made using this script I wrote for the task :
> http://pastebin.com/XmKQp9gR
> The (rude) script tries to unscramble the data, remove
> outliers and correct for linear drift.
> If it's useful I will upload the raw log data.
> The frontend circuit:
> As I wrote before I'm trying to feed a microcontroller
> with 10MHz from a Rb oscillator and a PPS pulse from
> a GPS module and see if I can obtain a good starting
> point for building my own GPSDO.
> Now I'm testing a front end that will present to the
> micro both the PPS and 10MHz nicely squared, and
> an analogue representation of the time interval between
> the rising pulses of the sources.
> What do you think of the circuit I designed?
> (thanks to many resources coming from
> this list, I passed much time on ko4bb site
> and many others I dont even remember, thank you
> all!) here the asc file for LTSpice:
> http://pastebin.com/94H78jxs
> I'm using components I had around or scavenged
> in scrap electronics I had.
> The TAC seem to work, but now I need a better
> opamp (the LM358 has too much current
> flowing in-out of the inputs), here a pair
> of captures taken directly from C1 capacitor, 90nS pulse:
> http://www.flickr.com/photos/14336723@N08/8293075961/
> and a 50nS one:
> http://www.flickr.com/photos/14336723@N08/8294131200/
> The red trace is the input GPS PPS.

As I commented, you might want 1-2 cycles to pass, so adding a second 
DFF might be needed for that task.

Like that you try your interpolator wings!

I do recommend you to check out the Wenzel clock input stage, which is 
being deployed in the TADD-2 divider. Squares up sine clocks nicely.


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