[time-nuts] ANFSCD - Synchronizing time in home video recorders

Tom Van Baak tvb at LeapSecond.com
Thu Feb 2 17:07:02 UTC 2012


2.048 MHz has a cycle period of just 488.28125 ns so a PIC/AVR is (far) too slow to use the same trick I did on the low frequency 32 kHz.

I think you'll have to use a PLL for that one. How about a 16 kHz compare rate: 10 MHz / 625 = 16000 Hz = 2.048 MHz / 128


  ----- Original Message ----- 
  From: Azelio Boriani 
  To: Tom Van Baak ; Discussion of precise time and frequency measurement 
  Sent: Thursday, February 02, 2012 8:18 AM
  Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders

  Amazing... there is always something to learn from TVB. Now I'll try to derive a 2.048MHz G.703-13 clock from a 10MHz clock. I suspect that the procedure is similar, even if 2048KHz is not quite a power of 2.

  On Thu, Feb 2, 2012 at 4:35 PM, Tom Van Baak <tvb at leapsecond.com> wrote:

    Hi Roberto,

    The motivation for this, I assume most list members know, is to
    drive cheap quartz stepper motor clocks with precise 32 kHz
    frequency, one derived from an atomic or GPS 10 MHz.

    The 10 MHz to 32 kHz PIC divider I wrote uses a sort of binary
    "leap year" algorithm to adjust the digital output phase to be as
    close as possible to the ideal 32.768 kHz phase on each cycle
    and also to have zero long-term error.

    I'm not sure how well a multi-level leap year algorithm relates
    Breseham's algorithm. I tracked down his 1965 plotter article.
    There might be common ground there.

    With non-integral ratios like this case, or without external analog
    components (e.g., PLL), it seems some level of jitter is always
    unavoidable. So the goal was to make it as mathematically small
    as possible, and furthermore, to be able to do the math within a
    half cycle, which is only 15 microseconds.

    I'll send you an early draft of the PIC code; the version that was
    most clear before I had to pinch too many cycles and added too
    many features. Let me know what you think.

    I also simulated the algorithm on a PC and measured the ADEV
    and phase noise. That simulation code is file 10m32k.c under:



    ----- Original Message ----- From: "Roberto Barrios" <rbarrioss at msn.com>
    To: "Tom Van Baak" <tvb at leapsecond.com>; "Discussion of precise time and frequency measurement" <time-nuts at febo.com>
    Sent: Thursday, February 02, 2012 5:09 AM
    Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders

      Hi Tom,

      I'm interested in that divider. Actually, insterested in knowing how it works, not in the .HEX file.

      Breseham's algorith works but has inherent jitter and I've found no other solutions for situations like that.

      I'd live to know how it is done.

      Thank you,
      Roberto EB4EQA

      -----Mensaje original----- From: Tom Van Baak
      Sent: Thursday, February 02, 2012 10:34 AM
      To: Discussion of precise time and frequency measurement
      Subject: Re: [time-nuts] ANFSCD - Synchronizing time in home video recorders

        I think I've seen comments about making 32 KHz from 10 MHz in a PIC or AVR.

        tvb has this web page, but I don't see a 32 KHz option:


      Yes, I have a PIC divider that takes 5 or 10 MHz input and
      outputs a 32.768 kHz square wave with minimal jitter and
      no long-term phase offset. Contact me off-line if interested.


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