[time-nuts] Rubidium Performance: DDS noise effect on 10 MHz
beale at bealecorner.com
Sat Feb 4 05:32:13 UTC 2012
> From: John Miles <jmiles at pop.net>
> So far, the FE-5680A is doing well in the ADEV department, but its AD9832
> DDS chip adds some substantial noise and spurs to the 10 MHz output. [...]
> The overall SSB C/N ratio I'm seeing between 1 Hz - 100 kHz is pretty much
> in line with Analog Devices' data sheet, as are the spur levels.
In the current 5680A units, the 10 MHz output comes from the 60 MHz VCXO (divided by 6 in CPLD) and not direct from a DDS. If my architecture understanding is right, the DDS signal output is mixed with the VCXO output only at the 114th harmonic of 60 MHz, and it's the PLL (looking at the optical signal from the Rb) that drives the VCXO to keep it lined up. As I understand it, DDS phase noise should be divided by a factor of 6*114 by the time it appears at the 10 MHz output, and at larger frequency offsets the amplitude should also be (significantly) reduced by the PLL loop filter.
I don't have any phase noise measurement tools myself, so this is just an academic argument, but if there is significantly more noise on the 10 MHz than expected for a 60 MHz VCXO, I wonder if it's just inadequate filtering of an internal power rail. Is the unit under test being driven by a linear, or switching supply?
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