[time-nuts] Controlling FEI 5680A
Chris Albertson
albertson.chris at gmail.com
Sun Jan 15 04:48:51 UTC 2012
On Sat, Jan 14, 2012 at 4:32 AM, <EWKehren at aol.com> wrote:
> I have no expertise when it comes to filter design or programming PIC's or
> other micro controllers. But I know what works for me. For 11 years I have
> been using Shera controllers with very good results. (I still have some new
> assembled extra A&A boards, if any one is interested, please contact me
> off list) Over the years I have made hardware work around's and made my own
> boards ending up with 120 and 240 samples and 100 MHz clock in stead of 24
> MHz. Over time chips are harder to get. The solution is an Altera MAX 3000
> gate array and that input circuit can be implemented on a $ 2 100 MHz
> version or $ 5 200 MHz version using either a 100 MHz or 200 MHz clock. That
> circuit works with the present Shera PIC but that is a 28 pin $ 4 device.
> Since in this application the controller does not have to be all things
> for all devices it would make sense to use a PIC16F688 or any other 14 pin
> device.
Have you thought about putting the PIC _INSIDE_ the Altera FPGA?
It's a common trick to implement a microcontroller in the FPGA and you
can get the code for just about any CPU core online. Here is an
example of "virtual PIC":
http://www.embeddedtronics.com/pic_core.html
If the PIC fits inside then that is one less chip on the PCB. The
example above found that could run the virtual PIC a little faster
than a real pic so you don't give up any performance
--
Chris Albertson
Redondo Beach, California
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