[time-nuts] WWVB BPSK Receiver Project?
Jim Lux
jimlux at earthlink.net
Thu Mar 15 14:29:58 UTC 2012
On 3/15/12 6:50 AM, shalimr9 at gmail.com wrote:
> Poul-Henning,
>
> Do you need 16 bits or can you get by with a 12 bit ADC?
>
> Have you considered using an FPGA for signal processing? It seems you need a fairly serious CPU to handle that much data.
>
You could use an FPGA, but the data rate isn't all that high. The
signal is fairly narrow band (<1 kHz, I should think). What you might
want to do is build a ADC/FPGA combo that provides a nice USB/Ethernet
interface for the sample stream which has been digital downconverted and
filtered. the FPGA takes care of the icky glue logic details and does
a bit of decimation.
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