[time-nuts] WWVB BPSK Receiver Project?
Poul-Henning Kamp
phk at phk.freebsd.dk
Thu Mar 15 22:13:21 UTC 2012
In message <20120315152620.8347488e049854218aed4aa6 at kinali.ch>, Attila Kinali w
rites:
>> Do you need 16 bits or can you get by with a 12 bit ADC?
In general: The more the merrier, for a digital dude like me, having
more bits is easier than getting AGC working correctly :-)
>> Have you considered using an FPGA for signal processing? It seems
> you need a fairly serious CPU to handle that much data.
I have considered FPGA, DSP would probably be more suitable, but
if I can do it in an ARM with C/Assy code, I prefer that.
>I think Poul-Henning is refering to his AducLoran receiver,
That's one of the few experiements I bothered to document, I've been
doing similar stuff with DCF77 phase-code etc.
As long as you're after time/freq, you can use very deep averaging
which only takes a few instructions per sample, so for instance
the 42MHz Aduc7026 chip copes nicely with a single Loran-C signal.
I think I could squeeze a Loran-C navigation solution into it, if
I wanted to and as long as we're not talking too high speeds (again
allowing deep averaging) but I have not bothered.
A modern PC has a lot of computing power for stuff like this, and
is great for prototyping code, before dumping into a smaller chip.
That's how I found out that the circular-buffer averaging comb-filter
is a much better and stronger signal discriminator than almost anything
else you can come up with, for frequency/phase reception.
See for instance: http://phk.freebsd.dk/loran-c/CW/
--
Poul-Henning Kamp | UNIX since Zilog Zeus 3.20
phk at FreeBSD.ORG | TCP/IP since RFC 956
FreeBSD committer | BSD since 4.3-tahoe
Never attribute to malice what can adequately be explained by incompetence.
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