[time-nuts] 1. Clock ensembling; 2. Delay controller-synthesizer -- preprints of this year's UFFC IFCS-EFTF contributions

[Marek Peca]

Dear time-nuts

In case of interest, you may check our fresh conference preprints from 
IEEE--UFFC International Frequency Control Symposium -- European Frequency 
and Time Forum 2013, just finished:

1. Clock Composition by Wiener Filtering Illustrated on Two Atomic Clocks
- about clock ensembling using estimator
- advantages over PLL&FLL (+ case study)
- much simpler in LTI case over currently used Kalman filters

2. Programmable Delay Controller Allowing Frequency Synthesis and 
Arbitrary Binary Waveform Generation
- controllable delay line within FPGA fabric
- likely novel enhancement, possibly allowing to replace DDSes etc.
- still unsure, if it may actually improve frequency control circuits and 
become widespread, or remain a curiosity only...

You can read papers and view poster/presentation at:
http://rtime.felk.cvut.cz/~pecam1/eftf/

Best regards,
Marek


P.s> After proceedings will be published, I'll replace by IEEE marked 
versions, in accordance with Copyright agreement.