[time-nuts] First success with very simple, very low cost GPSDO, under $8
kd0gls at mninter.net
Thu Apr 10 12:52:59 EDT 2014
In my case, the cold-start frequency of my OCXO with EFC at midpoint was off sufficiently far that I needed a minimum number of remainder bits to know which way to initially steer it. Don't recall the exact number I needed, but it was more than eight at 10 MHz. Like this design, I had 16 bits to work with, which gave me a usable range.
> On Apr 10, 2014, at 11:35, Brian Lloyd <brian at lloyd.com> wrote:
> On Wed, Apr 9, 2014 at 11:43 PM, Tom Van Baak <tvb at leapsecond.com> wrote:
>>> You are right in the I don't even need data cycles. All I want is the
>>> error which is 5,000,000 minus the count. this is hopefully zero.
>> Correct. Keep the counter running. No need to zero it, ever. Use
>> differential measurements. Essentially you are using binary modulus
> Chinese remainder theorem. Use that and stop worrying about how big your
> word is. Since we have these really great integer divisors we can use
> between 1e7 and 1e0, it becomes trivial. Your counter word only needs to be
> large enough to handle the maximum possible accumulated error in an
> interval. In fact, you probably can get by comfortably with an 8-bit
> Brian Lloyd, WB6RQN/J79BPL
> 706 Flightline Drive
> Spring Branch, TX 78070
> brian at lloyd.com
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