[time-nuts] First success with very simple GPSDO

[Hal Murray]

albertson.chris at gmail.com said:
> 2) then switch to a mode where we look only at the last few bits of the
> counter.   I think this will actually perform better than mode #1 above
> because there is zero chance of the two interrupts happening at the same
> time causing your PPS sample to be delayed because you had interrupts
> disabled while counting an overflow. 

If you use the capture register, you don't have to worry about timing quirks 
due to interrupts.

Unless the CPU is doing something complicated (like serving web pages), you 
can do the whole thing without any interrupts.  Just use a polling loop that 
checks the ready-now? status for all the things the CPU has to do.


-- 
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