[time-nuts] 'CPLDs for clock dividers' Thread

John C. Westmoreland, P.E. john at westmorelandengineering.com
Sun Jan 5 21:11:33 EST 2014


Hello All,

I was looking at the archives - what was the outcome of this:

Thanks to everyone for their advice.  I bought a CoolRunner II
development board (only $39!) and will let you know how it goes.

Matt

On Wed, Feb 3, 2010 at 10:59 AM, Matt Ettus <boyscout at gmail.com
<https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts>> wrote:
>* Does anyone have any experience using CPLDs for very low phase noise
*>* dividers?  You can get an XC9536XL from Xilinx for around $1, and I
*>* thought it would make a good divide by 2 through 10 device.
*>>* Matt*

A lot of the discussion focused on the difficulties of downloading the tools for
Altera or Xilinx - the Max II family from Altera was recommended - but there was
no apparent outcome or resolution to this thread - seemingly.

Does anyone have that CPLD recommendation?

Thanks,
John Westmoreland


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