[time-nuts] Si570 question

Orin Eman orin.eman at gmail.com
Tue Nov 18 14:19:53 EST 2014

I have one of these: http://sdr-kits.net/PA0KLT_Description.html

built with the CML output Si570 that goes to 1417 MHz (!)

There is a schematic in the assembly manual that's linked to from that
page.  They use 100n and 1n capacitors in parallel on Vdd and 4K7 pullups
on SCL/SDA.  They have 100n DC blocks directly on the output pins.

Into a 50 ohm load, the CML outputs produce about 4dBm as I recall.
Obviously, the CMOS output will be different.

There is a review of a different Si570 kit on the Clifton Labs site:


I got similar results comparing my kit against an HP 8640B.  The Si570
beats the 8640B close in just as shown on the Clifton Labs site.

Some Softrock SDR radios also use the Si570.  They use a single 10n
capacitor on Vdd and 2K2 pullups...:


I have the Softrock Ensemble RXTX.  It works fine on RX, but unfortunately
I have not been able to get satisfactory image rejection on TX.  I suspect
the FST3253.

So, it looks like decoupling isn't that critical - 10n or 100n||1n in these
examples.  1K pullups on SDA/SCL seem to be overkill and anything
reasonable <= 4K7 should work.


On Tue, Nov 18, 2014 at 7:59 AM, Jim Lux <jimlux at earthlink.net> wrote:

> I'm sure someone here has fooled with the Si570.
> I just got a few of them (CMOS output), and am about to deadbug one of
> them to fool with it (unless there's some convenient protoboard out there
> available.. I didn't look too long and hard, but some casual googling
> didn't find one).
> Looking at AN334 from SiLabs:
> It looks like you just need a 10nF bypass on the Vcc, a pull down on the
> OE (1k), 1k pullups to 3.3V on SDA/SCL (which is going to be driven by a
> 3.3V teensy 3.0/3.1 microcontroller)
> 150 ohm loads to ground, followed by a 0.1 uF DC block?
> I'm going to be running it at less than 50 MHz (although the parts I got
> are preset to 100 MHz)
> Any traps for the unwary?
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