[time-nuts] Practical considerations making a lab standard with an LTE lite

Charles Steinmetz csteinmetz at yandex.com
Sun Nov 23 08:28:51 EST 2014

Dave wrote:

>It would be great if there was a circuit published which can give 50 Ohn
>output impedance from a 12-15 power supply,  which
>a) Doesn't load the TCXO
>b) Doesn't degrade the phase noise.

WRT loading the TCXO, someone should establish quantitatively how 
high the load impedance must be to avoid significant negative 
effects.  Said mentioned 1M ohm, which is the "other" common lab 
instrument input impedance besides 50 ohms, but I would be very 
surprised to find that the load resistance really needs to be that 
high.  Why does this matter?  The lower the impedance you load the 
oscillator with, the more power you get out of it; therefore, the 
lower the power gain that is necessary to develop an output signal 
you can use to feed the external world -- and, consequently, the less 
noise you are forced to add to the signal during amplification.

I would recommend testing the LTE with a 1M ohm load resistance to 
establish a baseline.

1)  Measure and record the outout voltage.

2)  Measure and record the levels of the first few harmonics in 
relation to the carrier.

3)  Get a qualitative feel for the levels of higher harmonics.

Then, start reducing the load impedance (I would start with 10k ohms, 
then move to 1k ohms), paying attention to:

a)  The output voltage

b)  The levels of the first few harmonics in relation to the carrier, and

c)  The levels of higher harmonics, if they increase faster than the 
first few as the load resistance decreases.

When you get to the point where the output voltage drops to 1/2 of 
the 1M ohm voltage, you have reached the output impedance of the LTE 
board (matched source and load impedances).  As a general matter, it 
would not be useful to use a load impedance lower than this.  If you 
reach this point without a significant increase in the output 
harmonics, great -- use this impedance as the input resistance of 
your buffer amplifier.  If, however, the harmonics increase faster 
(with decreasing load resistance) and become objectionable before you 
reach the 1/2 voltage point, you must decide how much distortion is 
acceptable and use the load resistance that produces this level of 
harmonics.  In this case, you trade off distortion and noise.

So, the first step is for someone to do the experiment and find out 
how low the input resistance of the buffer amp can be as a practical 
matter.  Then, a buffer amp topology can be chosen for best 
performance with this input resistance.

Also, determine how many oscillator-frequency outputs you need 
(including outputs that will feed dividers, multipliers, or other 
circuitry internal to the buffer box).  This will also influence the 
optimum choice of buffer amp topology.

Best regards,


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