[time-nuts] Digital Mixing with a BeagleBone Black and D Flip Flop

Simon Marsh subscriptions at burble.com
Mon Nov 24 11:13:48 EST 2014

Thanks Pablo.

I've been finding that my implementation is a very good noise detector 
(in all kinds of fun ways) and my most recent effort has been at the 
hardware level in better layout, shielding and in reducing the number of 
noise sources.

The impact of non-random noise is that transitions near an edge get 
quantised to the noise source, particularly the first and last 
transitions of a set. This leads to some of the simpler edge detection 
algorithms perfoming very poorly as they carry through this quantisation.

Clearly, the cleaner the hardware implementation the less impact 
external noise will be until, hopefully, it is below requirements. At 
some point though I may get to a hardware/software tradeoff where the 
cost of reducing noise via hardware becomes more expensive than a 
complex edge detection algorithm that could remove the noise in software 

Of course, everyone will have their own definition of what 'cost' and 
'more expensive' means but in my case software solutions are relatively 
cheap as I'm using a general purpose processor rather than FPGA.



On 24/11/2014 11:59, pablo alvarez wrote:
>> The current implementation used in WR was developed by Tomasz
>> Wlostowski in the frame of his MSc thesis, following the ideas of
>> Pablo Alvarez which Bruce pointed to earlier. As you can see in
>> Tomasz's dissertation [1], there was not a lot of investigation on
>> optimal strategies for DDTMD noise. The precision at the time was
>> deemed more than adequate. It is very timely that you bring up this
>> subject now, because I hope to start looking at ways to optimize phase
>> noise in WR in the coming months, and noise coming from the DDMTD
>> phase detector is definitely something I want to look at. I will be
>> very interested in your ideas and findings regarding optimal
>> strategies for the de-glitcher.
> Hi Simon and Javier,
> I arrive late to this discussion but I would like to add my grain of salt.
> As Javier says there was not a detailed optimization of the DDMTD
> architecture as jitter was already limited by all the surrounding
> electronics. I would like to add that much of the noise rejection is due to
> the implementation of a median estimator for the incoming edge position
> respect to the "slightly-offset" oscillator. It is easy and fun to proof
> that this median estimator can be implemented with a counter counting the
> number of sampled zeros and a simple state machine state machine that
> places counter start in a safe zone. In fact, when you think it out, the
> most curious thing is that this algorithm is nothing more than a sort of
> generalization of the bang-bang architecture to measure phase offsets.
> Cheers,
> Pablo
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