[time-nuts] Practical considerations making a lab standard with an LTE lite
csteinmetz at yandex.com
Tue Nov 25 07:12:23 EST 2014
> > So driving 50 Ohms inputs is not optimal here, 1M inputs are much
> better for
> > this purpose.
>That only works if you have a (very) short connection to the next stage.
>Things get interesting if you have, say, 10 feet of unterminated coax.
Thinking that the output was a sine wave, I previously suggested
testing to determine what its actual impedance is and to proceed
accordingly. Said pointed out that it is not a sine output, but
rather 3v CMOS. Still, I think it is worthwhile to test to see what
the actual output capability is. For example, most HC and AC CMOS
outputs will source and sink 20-25mA. The Fairchild "advanced CMOS
family characteristics" document says:
>All SSI and MSI devices (AC, ACT, ACQ or ACTQ) are
>guaranteed to source and sink 24 mA. 74AC/ACTxxx
>devices are capable of driving 50 [ohm] transmission lines.
Some of the newer CMOS logic is similar, including Fairchild
TinyLogic UHS (NC7xZ series), LCX, and LVC devices. Now AFAIK, we do
not know what CMOS device is used for the TCXO output -- and it may
well not be any of these. Testing will provide a definitive answer,
and it may show that there are better options than a 1M termination.
Of course, the TCXO output is used internally to the LTE Lite (and
may be used internally to the TCXO itself), so one cannot count on
having all of the rated device output current available to drive an
external load. Avoid anything that pulls the output logic levels
very far down (logic high) or up (logic low), say by more than 200mV
(such as a termination resistance that is too low), or materially
distorts the output wave shape (such as a Tee or Pi filter, which one
might consider to convert the output to a sine wave and match it to coax).
To test, one would use a voltage divider from the logic supply
voltage to ground, with the TCXO output feeding the center point of
the divider. (See attached diagram.) I will be very surprised if it
will not drive 10k + 10k with ease (already MUCH better than 1M), and
1k + 1k is a distinct possibility [NOTE: in some cases, this scheme
works best if the resistor to the positive supply is about 50% higher
than the one to ground, for example 1.5k + 1k]. You may even find
that it will drive 100 + 100 (or 150 + 100) without problems, in
which case it should directly drive 50 ohm coax. With any of these,
best performance in the final installation will be achieved with the
termination resistors at the far end of any wire, PC trace, or
transmission line longer than a few inches. [Note that the divider
scheme is the right way to terminate CMOS logic for analog uses at
any impedance -- to terminate in 1M ohm, one would use 2M + 2M,
although at that level it matters less.]
Because the CMOS device is a saturated switch, the TCXO and LTE Light
power dissipation will not increase by a significant amount with the
increased load current. The logic supply will need to source some
extra power, but only 45mW even for the 100 + 100 ohm output network.
If the gods are truly with us, we may even find that the TCXO output
will source and sink sufficient current to drive a Tee network if the
circuit is designed properly -- say, a divider with 150 + 150 ohm
resistors (or 220 + 150) feeding a series 10nF capacitor and 200 ohm
resistor to a Tee network using 10uH/50.5pF/10uH -- which would drive
a 0dBm sine wave into terminated 50 ohm coax with harmonics below
-40dBc. (See attached diagram.) This requires peak currents from
the CMOS output of +/- 5mA. But don't count on this until you test
and verify, and don't be surprised if the TCXO output will not
support it. [If one can live with a sine output of < 0dBm, the
divider resistors and the series resistor can all be increased in
value until it does work.]
"All electronics is analog."
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