[time-nuts] Digital Mixing with a BeagleBone Black and D Flip Flop

Bruce Griffiths bruce.griffiths at xtra.co.nz
Wed Oct 15 14:51:06 EDT 2014


On Wednesday, October 15, 2014 03:27:41 PM Javier Serrano wrote:
> Do you have a precise idea of what the offset in frequency is between
> your DUT(s) and the slightly-offset oscillator? If that offset is too
> big compared with the jitter of your clock signals and your
> flip-flops, that would explain why you see no glitches. Locking to
> your DUT frequency is a good way to make sure you control the offset.
> Small frequency offsets are typically implemented by multiplying by
> (N-1)/N with N big enough. There is a trick (from NIST I think) for
> achieving high N by cascading two PLLs which multiply by M-1 and M+1
> respectively. The effective multiplication factor is then (M^2 - 1).
> Making M^2=N and inserting the divide-by-N in between the multipliers
> gives you the global (N-1)/N. We don't use this trick, but it can be
> handy in some circumstances. BTW, does anybody have a pointer to the
> original reference for it?

JPL used this in an early version of the offset source for their frequency 
stability analyser.

Starting with a 100MHz clock both the 100MHz and 100MHZ/N were used to 
drive a LSB (lower sideband mixer) a low noise VCXO is phase locked via the 
LSB mixer output. The VCXO output and VCXO/N is fed to a USB mixer and 
the final low noise VCXO is locked via this mixer output to a frequency of 
100MHz(1-1/N^2).
I'll try and retrieve a link to this paper (by Greenhall??).

Bruce

> 
> The current implementation used in WR was developed by Tomasz
> Wlostowski in the frame of his MSc thesis, following the ideas of
> Pablo Alvarez which Bruce pointed to earlier. As you can see in
> Tomasz's dissertation [1], there was not a lot of investigation on
> optimal strategies for DDTMD noise. The precision at the time was
> deemed more than adequate. It is very timely that you bring up this
> subject now, because I hope to start looking at ways to optimize phase
> noise in WR in the coming months, and noise coming from the DDMTD
> phase detector is definitely something I want to look at. I will be
> very interested in your ideas and findings regarding optimal
> strategies for the de-glitcher.
> 
> Cheers,
> 
The LTC6957 appears to have significantly lower phase noise (and hence 
jitter) than the comparator circuit. Its performance at 10MHz appears 
comparable to that of the Holzworth HX2410. The LTC6957 close in phase 
noise (with 10MHz input) is better than indicated on the datasheet at least 
according to my measurements with a Timepod.

Bruce

> Javier
> 
> [1] http://www.ohwr.org/documents/80
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