[time-nuts] Digital Mixing with a BeagleBone Black and D Flip Flop
kb8tq at n1k.org
Wed Oct 15 18:16:02 EDT 2014
Most ECL families have more trouble with 1/F noise than fast silicon saturated logic. That makes them poor candidates for this sort of thing.
On Oct 15, 2014, at 9:13 AM, Gerhard Hoffmann <dk4xp at arcor.de> wrote:
> Am 15.10.2014 um 11:29 schrieb Bruce Griffiths:
>> Typically a 74HC164 shift register has internal cycle to cycle sampling jitter of about 4ps or so when used as a mixer, a 74AC device has about 1/4 of this jitter or around 1ps. Faster CMOS devices have even less internal jitter.
> do you have any data on MC100EP51 & friends? In the datasheet they seem to claim
> sth. in the low ps also, which would be disappointing in comparison to 74AC or 74LVC
> regards, Gerhard
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