[time-nuts] Clock level conversion 5V -> 3.3V

Vasco Soares vesoares at deea.isel.ipl.pt
Tue Sep 30 20:37:22 EDT 2014


I would suggest some 3.3V logic (inverter) gate with 5V tolerant inputs 
from Little Logic TI portfolio. There are buffered and unbuffered gate 
available.



Em 2014-09-30 22:46, Mark Haun escreveu:
> Is there a "best" way to do this without adding phase noise?  For 
> example, a
> 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input.  Is a 
> resistive
> divider the way to go?
> 
> Mark
> 
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