[time-nuts] schematics of frequency counter
gigneil at gmail.com
Sat Jan 3 09:01:56 EST 2015
I would reconsider the LDOs while you have some time to play with them.
The TPS79333DBVR is not even remotely "ultralow noise" at most offsets,
despite what TI may say.
For 5V5 and under up to about 600ma, I would suggest you take a look at the
ADM7155 (adjustable) or ADM7154 (fixed). If you need 800ma, the 7150 is
here for you.
The TI part has nearly 35 uVRMS of noise at just 2.8a with not very good
PSRR. The 7155 will produce less than 1.0 μVRMS Total Integrated Noise
from 100 Hz to 100 KHz and 1.6 from 10 to 100 KHz,and that's without an RC
noise compensation network. Its a fabulous part for a sensitive
application like yours.
I'm hoping I am right in assuming that the noise performance of the LDOs is
a concern, and don't mean to even dare suggest that you've done anything
but a great job! :-)
On Sat, Dec 27, 2014 at 5:34 AM, Li Ang <lllaaa at gmail.com> wrote:
> Hi Charles,
> In my circuit, the VCC is 5v. I've noticed my bias and emitter resistor
> is something need to be changed. I will play with the resistors and see if
> it improves. Thanks.
> 2014-12-27 6:42 GMT+08:00 Charles Steinmetz <csteinmetz at yandex.com>:
> > Li Ang wrote:
> > RF pnp transistor is harder to get. I would like the front end works
> >> at 300MHz.
> >> My questions:
> >> 1) why the difference of DC bias of the 2 NPN matters? I thought only
> >> frequency part is useful to a counter, amplitude information is useless
> >> right?
> > You want the circuit to switch near the mid-point of the input sine wave,
> > and at exactly the same place every time. How you bias the transistors
> > determines how well this is accomplished.
> > You also want the output to switch fast and cleanly between a low voltage
> > very near 0v ("ground") to a high voltage very near 3v (Vcc, logic high).
> > An NPN cannot do that, biased the way that you have them connected (the
> > emitter of the output transistor Q301 can only pull the output down to a
> > little less than 1v due to R315, which may sort of work but is not a
> > way to run 3v logic). This operation also saturates Q301, which is bad
> > performance. See simulated results below.
> > In order for an NPN to provide a useful output for 3v logic, (i) its
> > emitter must be grounded, and (ii) it must either be run into saturation
> > use a Baker clamp. Running the transistor into saturation must be
> > particularly if you want to reach 300MHz, and a Baker clamp raises the
> > "logic low" output voltage to >0.5v (not a good thing with 3v logic).
> > it is very much better to use a PNP differential pair. For a 300MHz
> > circuit, I would use BFT93 (and even that barely gets you to 300MHz).
> > 2) what's is the C4 in your circuit for?
> > C4 makes Q1 and Q2 a differential (emitter-coupled) pair at RF
> > frequencies, but not at DC. So, the circuit has no gain at DC and
> > therefore the DC errors between Q1 and Q2 cause much less output error
> > they would if the emitters were connected directly together.
> > 3) If the noise is more important than the gain, what kind of transistor
> >> should I choose? The Ft near 300MHz ones(BFS17, 2SC9018) or Ft far
> >> 300MHz ones(BFP420, BFP183,BFR93) ?
> > Far beyond. The Ft is the frequency where a transistor completely runs
> > out of gain. You want to operate at a much lower frequency where the
> > transistor still has substantial gain, particularly with fast RF
> > transistors, which generally have much lower DC hfe than general-purpose
> > transistors like 3904 and 3906. Note that the simulation of the circuit
> > you published (simulated results below) barely works at even 20MHz. As I
> > noted above, even the BFT93 barely gets you to 300MHz with a 1Vrms input.
> > Best regards,
> > Charles
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